From 5e08ac606c6b56e0ab3a48ca1fb41484494be17d Mon Sep 17 00:00:00 2001 From: xiaqilin Date: Wed, 20 Sep 2023 19:23:36 +0800 Subject: [PATCH 1/4] feat(ieee802154): update ieee802154 sleep logic and support modem sleep --- components/esp_phy/src/btbb_init.c | 8 +-- .../ieee802154/driver/esp_ieee802154_dev.c | 49 +++++++++++++------ components/ieee802154/esp_ieee802154.c | 10 ---- .../ieee802154/include/esp_ieee802154.h | 10 ---- .../src/port/esp_openthread_sleep.c | 4 +- .../main/esp_ot_sleepy_device_config.h | 3 +- 6 files changed, 40 insertions(+), 44 deletions(-) diff --git a/components/esp_phy/src/btbb_init.c b/components/esp_phy/src/btbb_init.c index 4a1841cfda..5939ec0e28 100644 --- a/components/esp_phy/src/btbb_init.c +++ b/components/esp_phy/src/btbb_init.c @@ -22,11 +22,11 @@ static uint8_t s_btbb_access_ref = 0; #include "btbb_retention_reg.h" static const char* TAG = "btbb_init"; -#if SOC_PM_RETENTION_HAS_CLOCK_BUG -#define BTBB_LINK_OWNER ENTRY(3) -#else +// #if SOC_PM_RETENTION_HAS_CLOCK_BUG +// #define BTBB_LINK_OWNER ENTRY(3) +// #else #define BTBB_LINK_OWNER ENTRY(0) | ENTRY(2) -#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG +// #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG static esp_err_t btbb_sleep_retention_init(void) { diff --git a/components/ieee802154/driver/esp_ieee802154_dev.c b/components/ieee802154/driver/esp_ieee802154_dev.c index 5d93f18953..c5866fe2d1 100644 --- a/components/ieee802154/driver/esp_ieee802154_dev.c +++ b/components/ieee802154/driver/esp_ieee802154_dev.c @@ -30,6 +30,12 @@ #include "esp_pm.h" #include "esp_private/esp_clk.h" #include "esp_private/sleep_retention.h" +static bool g_sleep_rf = false; +// #if SOC_PM_RETENTION_HAS_CLOCK_BUG +// #define BTBB_LINK_OWNER ENTRY(3) +// #else +#define IEEE802154_LINK_OWNER ENTRY(0) | ENTRY(2) +// #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG #endif #define CCA_DETECTION_TIME 8 @@ -673,6 +679,8 @@ IEEE802154_STATIC void tx_init(const uint8_t *frame) esp_err_t ieee802154_transmit(const uint8_t *frame, bool cca) { + ieee802154_wakeup(); + ieee802154_enter_critical(); tx_init(frame); @@ -700,6 +708,9 @@ esp_err_t ieee802154_transmit_at(const uint8_t *frame, bool cca, uint32_t time) { uint32_t tx_target_time; uint32_t current_time; + + ieee802154_wakeup(); + tx_init(frame); IEEE802154_SET_TXRX_PTI(IEEE802154_SCENE_TX_AT); if (cca) { @@ -741,6 +752,7 @@ esp_err_t ieee802154_receive(void) // already in rx state, don't abort current rx operation return ESP_OK; } + ieee802154_wakeup(); ieee802154_enter_critical(); rx_init(); @@ -753,7 +765,7 @@ esp_err_t ieee802154_receive_at(uint32_t time) { uint32_t rx_target_time = time - IEEE802154_RX_RAMPUP_TIME_US; uint32_t current_time; - + ieee802154_wakeup(); rx_init(); IEEE802154_SET_TXRX_PTI(IEEE802154_SCENE_RX_AT); set_next_rx_buffer(); @@ -773,7 +785,7 @@ static esp_err_t ieee802154_sleep_init(void) #if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE #define N_REGS_IEEE802154() (((IEEE802154_MAC_DATE_REG - IEEE802154_REG_BASE) / 4) + 1) const static sleep_retention_entries_config_t ieee802154_mac_regs_retention[] = { - [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_IEEE802154_LINK(0x00), IEEE802154_REG_BASE, IEEE802154_REG_BASE, N_REGS_IEEE802154(), 0, 0), .owner = ENTRY(3) }, + [0] = { .config = REGDMA_LINK_CONTINUOUS_INIT(REGDMA_MODEM_IEEE802154_LINK(0x00), IEEE802154_REG_BASE, IEEE802154_REG_BASE, N_REGS_IEEE802154(), 0, 0), .owner = IEEE802154_LINK_OWNER }, }; err = sleep_retention_entries_create(ieee802154_mac_regs_retention, ARRAY_SIZE(ieee802154_mac_regs_retention), REGDMA_LINK_PRI_7, SLEEP_RETENTION_MODULE_802154_MAC); ESP_RETURN_ON_ERROR(err, IEEE802154_TAG, "failed to allocate memory for ieee802154 mac retention"); @@ -785,38 +797,41 @@ static esp_err_t ieee802154_sleep_init(void) IRAM_ATTR void ieee802154_enter_sleep(void) { #if CONFIG_FREERTOS_USE_TICKLESS_IDLE - esp_phy_disable(); -#if SOC_PM_RETENTION_HAS_CLOCK_BUG - sleep_retention_do_extra_retention(true);// backup -#endif - ieee802154_disable(); // IEEE802154 CLOCK Disable + if (g_sleep_rf == false) { + esp_phy_disable(); + g_sleep_rf = true; + } #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE } IRAM_ATTR void ieee802154_wakeup(void) { #if CONFIG_FREERTOS_USE_TICKLESS_IDLE - ieee802154_enable(); // IEEE802154 CLOCK Enable -#if SOC_PM_RETENTION_HAS_CLOCK_BUG - sleep_retention_do_extra_retention(false);// restore -#endif - esp_phy_enable(); + if (g_sleep_rf) { + esp_phy_enable(); + g_sleep_rf = false; + } #endif //CONFIG_FREERTOS_USE_TICKLESS_IDLE } esp_err_t ieee802154_sleep(void) { - ieee802154_enter_critical(); + if (ieee802154_get_state() != IEEE802154_STATE_SLEEP) { + ieee802154_enter_critical(); + stop_current_operation(); + ieee802154_set_state(IEEE802154_STATE_SLEEP); - stop_current_operation(); - ieee802154_set_state(IEEE802154_STATE_SLEEP); + ieee802154_exit_critical(); - ieee802154_exit_critical(); + ieee802154_enter_sleep(); // colse rf + } return ESP_OK; } esp_err_t ieee802154_energy_detect(uint32_t duration) { + ieee802154_wakeup(); + ieee802154_enter_critical(); stop_current_operation(); @@ -832,6 +847,8 @@ esp_err_t ieee802154_energy_detect(uint32_t duration) esp_err_t ieee802154_cca(void) { + ieee802154_wakeup(); + ieee802154_enter_critical(); stop_current_operation(); diff --git a/components/ieee802154/esp_ieee802154.c b/components/ieee802154/esp_ieee802154.c index 909faff774..64aef9ecea 100644 --- a/components/ieee802154/esp_ieee802154.c +++ b/components/ieee802154/esp_ieee802154.c @@ -334,16 +334,6 @@ uint8_t esp_ieee802154_get_recent_lqi(void) return ieee802154_get_recent_lqi(); } -void esp_ieee802154_enter_sleep(void) -{ - ieee802154_enter_sleep(); -} - -void esp_ieee802154_wakeup(void) -{ - ieee802154_wakeup(); -} - __attribute__((weak)) void esp_ieee802154_receive_done(uint8_t *data, esp_ieee802154_frame_info_t *frame_info) { diff --git a/components/ieee802154/include/esp_ieee802154.h b/components/ieee802154/include/esp_ieee802154.h index 22d3acb52d..96de1a0775 100644 --- a/components/ieee802154/include/esp_ieee802154.h +++ b/components/ieee802154/include/esp_ieee802154.h @@ -111,16 +111,6 @@ esp_ieee802154_state_t esp_ieee802154_get_state(void); */ esp_err_t esp_ieee802154_sleep(void); -/** - * @brief The IEEE 802.15.4 enter sleep. - */ -void esp_ieee802154_enter_sleep(void); - -/** - * @brief The IEEE 802.15.4 wakeup. - */ -void esp_ieee802154_wakeup(void); - /** * @brief Set the IEEE 802.15.4 Radio to receive state. * diff --git a/components/openthread/src/port/esp_openthread_sleep.c b/components/openthread/src/port/esp_openthread_sleep.c index fa6fdb3fcd..0077253eab 100644 --- a/components/openthread/src/port/esp_openthread_sleep.c +++ b/components/openthread/src/port/esp_openthread_sleep.c @@ -34,8 +34,7 @@ esp_err_t esp_openthread_sleep_init(void) void esp_openthread_sleep_process(void) { - if (esp_ieee802154_get_state() == ESP_IEEE802154_RADIO_SLEEP) { - esp_ieee802154_enter_sleep(); + if (s_ot_sleep == false && esp_ieee802154_get_state() == ESP_IEEE802154_RADIO_SLEEP) { esp_pm_lock_release(s_pm_lock); s_ot_sleep = true; } @@ -45,7 +44,6 @@ void esp_openthread_wakeup_process(void) { if (s_ot_sleep) { esp_pm_lock_acquire(s_pm_lock); - esp_ieee802154_wakeup(); s_ot_sleep = false; } } diff --git a/examples/openthread/ot_sleepy_device/main/esp_ot_sleepy_device_config.h b/examples/openthread/ot_sleepy_device/main/esp_ot_sleepy_device_config.h index d5b9383c06..cd4453383a 100644 --- a/examples/openthread/ot_sleepy_device/main/esp_ot_sleepy_device_config.h +++ b/examples/openthread/ot_sleepy_device/main/esp_ot_sleepy_device_config.h @@ -25,6 +25,7 @@ } #endif +// When JIRA PM-3 fix, uart clock can autoswitch. #define ESP_OPENTHREAD_DEFAULT_HOST_CONFIG() \ { \ .host_connection_mode = HOST_CONNECTION_MODE_CLI_UART, \ @@ -38,7 +39,7 @@ .stop_bits = UART_STOP_BITS_1, \ .flow_ctrl = UART_HW_FLOWCTRL_DISABLE, \ .rx_flow_ctrl_thresh = 0, \ - .source_clk = UART_SCLK_DEFAULT, \ + .source_clk = UART_SCLK_XTAL, \ }, \ .rx_pin = UART_PIN_NO_CHANGE, \ .tx_pin = UART_PIN_NO_CHANGE, \ From 7b176501e3e9c711869fbbce45aac0afb268391e Mon Sep 17 00:00:00 2001 From: cjin Date: Thu, 21 Sep 2023 11:30:49 +0800 Subject: [PATCH 2/4] feat(ble): update ble sleep logic for esp32h2 --- components/bt/controller/esp32h2/bt.c | 19 +++---------------- 1 file changed, 3 insertions(+), 16 deletions(-) diff --git a/components/bt/controller/esp32h2/bt.c b/components/bt/controller/esp32h2/bt.c index d29822f90c..1336dd222c 100644 --- a/components/bt/controller/esp32h2/bt.c +++ b/components/bt/controller/esp32h2/bt.c @@ -40,12 +40,9 @@ #include "hci_uart.h" #include "bt_osi_mem.h" -#if SOC_PM_RETENTION_HAS_CLOCK_BUG -#include "esp_private/sleep_retention.h" -#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG - #if CONFIG_FREERTOS_USE_TICKLESS_IDLE #include "esp_private/sleep_modem.h" +#include "esp_private/sleep_retention.h" #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE #ifdef CONFIG_BT_BLUEDROID_ENABLED @@ -447,6 +444,7 @@ void esp_bt_rtc_slow_clk_select(uint8_t slow_clk_src) case MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL: ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using main XTAL as clock source"); modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (320 - 1)); + break; case MODEM_CLOCK_LPCLK_SRC_RC_SLOW: ESP_LOGI(NIMBLE_PORT_LOG_TAG, "Using 136 kHz RC as clock source, can only run legacy ADV or SCAN due to low clock accuracy!"); modem_clock_select_lp_clock_source(PERIPH_BT_MODULE, slow_clk_src, (5 - 1)); @@ -474,9 +472,6 @@ IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg) } #if CONFIG_FREERTOS_USE_TICKLESS_IDLE r_ble_rtc_wake_up_state_clr(); -#if SOC_PM_RETENTION_HAS_CLOCK_BUG - sleep_retention_do_extra_retention(true); -#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG #endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE */ esp_phy_disable(); #ifdef CONFIG_PM_ENABLE @@ -493,9 +488,6 @@ IRAM_ATTR void controller_wakeup_cb(void *arg) #ifdef CONFIG_PM_ENABLE esp_pm_lock_acquire(s_pm_lock); r_ble_rtc_wake_up_state_clr(); -#if CONFIG_FREERTOS_USE_TICKLESS_IDLE && SOC_PM_RETENTION_HAS_CLOCK_BUG - sleep_retention_do_extra_retention(false); -#endif /* CONFIG_FREERTOS_USE_TICKLESS_IDLE && SOC_PM_RETENTION_HAS_CLOCK_BUG */ #endif //CONFIG_PM_ENABLE esp_phy_enable(); s_ble_active = true; @@ -546,7 +538,7 @@ esp_err_t controller_sleep_init(void) } #if CONFIG_FREERTOS_USE_TICKLESS_IDLE /* Create a new regdma link for BLE related register restoration */ - rc = sleep_modem_ble_mac_modem_state_init(1); + rc = sleep_modem_ble_mac_modem_state_init(0); assert(rc == 0); esp_sleep_enable_bt_wakeup(); ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer"); @@ -924,11 +916,6 @@ esp_err_t esp_bt_controller_disable(void) esp_pm_lock_release(s_pm_lock); #endif // CONFIG_PM_ENABLE s_ble_active = false; - } else { -#if CONFIG_FREERTOS_USE_TICKLESS_IDLE - /* Avoid consecutive backup of register cause assertion */ - sleep_retention_module_deinit(); -#endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE } ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED; return ESP_OK; From 40996f804aec4ef1eefd34ead34bcef404361523 Mon Sep 17 00:00:00 2001 From: cjin Date: Thu, 21 Sep 2023 11:31:53 +0800 Subject: [PATCH 3/4] change: remove has clock bug macro for esp32h2 --- components/esp_phy/src/btbb_init.c | 8 ++++---- components/soc/esp32h2/include/soc/Kconfig.soc_caps.in | 4 ---- components/soc/esp32h2/include/soc/soc_caps.h | 1 - 3 files changed, 4 insertions(+), 9 deletions(-) diff --git a/components/esp_phy/src/btbb_init.c b/components/esp_phy/src/btbb_init.c index 5939ec0e28..4a1841cfda 100644 --- a/components/esp_phy/src/btbb_init.c +++ b/components/esp_phy/src/btbb_init.c @@ -22,11 +22,11 @@ static uint8_t s_btbb_access_ref = 0; #include "btbb_retention_reg.h" static const char* TAG = "btbb_init"; -// #if SOC_PM_RETENTION_HAS_CLOCK_BUG -// #define BTBB_LINK_OWNER ENTRY(3) -// #else +#if SOC_PM_RETENTION_HAS_CLOCK_BUG +#define BTBB_LINK_OWNER ENTRY(3) +#else #define BTBB_LINK_OWNER ENTRY(0) | ENTRY(2) -// #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG +#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG static esp_err_t btbb_sleep_retention_init(void) { diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index 11b7544a2c..e80aec35f6 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -1183,10 +1183,6 @@ config SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG bool default y -config SOC_PM_RETENTION_HAS_CLOCK_BUG - bool - default y - config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION bool default y diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index 4467ab10bf..e2080e6c47 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -487,7 +487,6 @@ #define SOC_PM_MODEM_RETENTION_BY_REGDMA (1) #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1) /*! Date: Thu, 21 Sep 2023 11:56:09 +0800 Subject: [PATCH 4/4] fix(ieee802154): using link0/2 for ieee802154 in esp32h2 chip --- .../ieee802154/driver/esp_ieee802154_dev.c | 44 ++++++++----------- .../private_include/esp_ieee802154_dev.h | 12 ----- examples/openthread/.build-test-rules.yml | 3 +- .../openthread/ot_sleepy_device/README.md | 4 +- .../main/esp_ot_sleepy_device_config.h | 2 +- examples/openthread/pytest_otbr.py | 4 -- 6 files changed, 24 insertions(+), 45 deletions(-) diff --git a/components/ieee802154/driver/esp_ieee802154_dev.c b/components/ieee802154/driver/esp_ieee802154_dev.c index c5866fe2d1..7760c049ff 100644 --- a/components/ieee802154/driver/esp_ieee802154_dev.c +++ b/components/ieee802154/driver/esp_ieee802154_dev.c @@ -30,12 +30,12 @@ #include "esp_pm.h" #include "esp_private/esp_clk.h" #include "esp_private/sleep_retention.h" -static bool g_sleep_rf = false; -// #if SOC_PM_RETENTION_HAS_CLOCK_BUG -// #define BTBB_LINK_OWNER ENTRY(3) -// #else +static bool s_rf_closed = false; +#if SOC_PM_RETENTION_HAS_CLOCK_BUG +#define IEEE802154_LINK_OWNER ENTRY(3) +#else #define IEEE802154_LINK_OWNER ENTRY(0) | ENTRY(2) -// #endif // SOC_PM_RETENTION_HAS_CLOCK_BUG +#endif // SOC_PM_RETENTION_HAS_CLOCK_BUG #endif #define CCA_DETECTION_TIME 8 @@ -52,6 +52,7 @@ static uint8_t s_recent_rx_frame_info_index; static portMUX_TYPE s_ieee802154_spinlock = portMUX_INITIALIZER_UNLOCKED; static esp_err_t ieee802154_sleep_init(void); +static void ieee802154_rf_enable(void); static IRAM_ATTR void event_end_process(void) { @@ -679,8 +680,7 @@ IEEE802154_STATIC void tx_init(const uint8_t *frame) esp_err_t ieee802154_transmit(const uint8_t *frame, bool cca) { - ieee802154_wakeup(); - + ieee802154_rf_enable(); ieee802154_enter_critical(); tx_init(frame); @@ -708,9 +708,7 @@ esp_err_t ieee802154_transmit_at(const uint8_t *frame, bool cca, uint32_t time) { uint32_t tx_target_time; uint32_t current_time; - - ieee802154_wakeup(); - + ieee802154_rf_enable(); tx_init(frame); IEEE802154_SET_TXRX_PTI(IEEE802154_SCENE_TX_AT); if (cca) { @@ -752,7 +750,7 @@ esp_err_t ieee802154_receive(void) // already in rx state, don't abort current rx operation return ESP_OK; } - ieee802154_wakeup(); + ieee802154_rf_enable(); ieee802154_enter_critical(); rx_init(); @@ -765,7 +763,7 @@ esp_err_t ieee802154_receive_at(uint32_t time) { uint32_t rx_target_time = time - IEEE802154_RX_RAMPUP_TIME_US; uint32_t current_time; - ieee802154_wakeup(); + ieee802154_rf_enable(); rx_init(); IEEE802154_SET_TXRX_PTI(IEEE802154_SCENE_RX_AT); set_next_rx_buffer(); @@ -794,22 +792,22 @@ static esp_err_t ieee802154_sleep_init(void) return err; } -IRAM_ATTR void ieee802154_enter_sleep(void) +IRAM_ATTR static void ieee802154_rf_disable(void) { #if CONFIG_FREERTOS_USE_TICKLESS_IDLE - if (g_sleep_rf == false) { + if (s_rf_closed == false) { esp_phy_disable(); - g_sleep_rf = true; + s_rf_closed = true; } #endif // CONFIG_FREERTOS_USE_TICKLESS_IDLE } -IRAM_ATTR void ieee802154_wakeup(void) +IRAM_ATTR static void ieee802154_rf_enable(void) { #if CONFIG_FREERTOS_USE_TICKLESS_IDLE - if (g_sleep_rf) { + if (s_rf_closed) { esp_phy_enable(); - g_sleep_rf = false; + s_rf_closed = false; } #endif //CONFIG_FREERTOS_USE_TICKLESS_IDLE } @@ -820,18 +818,15 @@ esp_err_t ieee802154_sleep(void) ieee802154_enter_critical(); stop_current_operation(); ieee802154_set_state(IEEE802154_STATE_SLEEP); - ieee802154_exit_critical(); - - ieee802154_enter_sleep(); // colse rf + ieee802154_rf_disable(); // colse rf } return ESP_OK; } esp_err_t ieee802154_energy_detect(uint32_t duration) { - ieee802154_wakeup(); - + ieee802154_rf_enable(); ieee802154_enter_critical(); stop_current_operation(); @@ -847,8 +842,7 @@ esp_err_t ieee802154_energy_detect(uint32_t duration) esp_err_t ieee802154_cca(void) { - ieee802154_wakeup(); - + ieee802154_rf_enable(); ieee802154_enter_critical(); stop_current_operation(); diff --git a/components/ieee802154/private_include/esp_ieee802154_dev.h b/components/ieee802154/private_include/esp_ieee802154_dev.h index bf80282369..7fc5756134 100644 --- a/components/ieee802154/private_include/esp_ieee802154_dev.h +++ b/components/ieee802154/private_include/esp_ieee802154_dev.h @@ -178,18 +178,6 @@ uint8_t ieee802154_get_recent_lqi(void); */ ieee802154_state_t ieee802154_get_state(void); -/** - * @brief The IEEE 802.15.4 enter sleep. - * - */ -void ieee802154_enter_sleep(void); - -/** - * @brief The IEEE 802.15.4 wakeup. - * - */ -void ieee802154_wakeup(void); - /** The following three functions are only used for internal test. **/ /** * @brief The clear channel assessment done. diff --git a/examples/openthread/.build-test-rules.yml b/examples/openthread/.build-test-rules.yml index abb3a51091..49f5744824 100644 --- a/examples/openthread/.build-test-rules.yml +++ b/examples/openthread/.build-test-rules.yml @@ -45,7 +45,8 @@ examples/openthread/ot_rcp: reason: only test on esp32c6 <<: *openthread_dependencies +# To add support for the ESP32-C6 in TZ-302 examples/openthread/ot_sleepy_device: enable: - - if: IDF_TARGET in ["esp32h2", "esp32c6"] + - if: IDF_TARGET in ["esp32h2"] <<: [*openthread_dependencies, *openthread_sleep_dependencies] diff --git a/examples/openthread/ot_sleepy_device/README.md b/examples/openthread/ot_sleepy_device/README.md index a41def3d99..5c832db28d 100644 --- a/examples/openthread/ot_sleepy_device/README.md +++ b/examples/openthread/ot_sleepy_device/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32-C6 | ESP32-H2 | -| ----------------- | -------- | -------- | +| Supported Targets | ESP32-H2 | +| ----------------- | -------- | # OpenThread Sleepy Device Example diff --git a/examples/openthread/ot_sleepy_device/main/esp_ot_sleepy_device_config.h b/examples/openthread/ot_sleepy_device/main/esp_ot_sleepy_device_config.h index cd4453383a..73bd029b27 100644 --- a/examples/openthread/ot_sleepy_device/main/esp_ot_sleepy_device_config.h +++ b/examples/openthread/ot_sleepy_device/main/esp_ot_sleepy_device_config.h @@ -25,7 +25,7 @@ } #endif -// When JIRA PM-3 fix, uart clock can autoswitch. +// When JIRA PM-3 is fixed, the UART clock will automatically switch. #define ESP_OPENTHREAD_DEFAULT_HOST_CONFIG() \ { \ .host_connection_mode = HOST_CONNECTION_MODE_CLI_UART, \ diff --git a/examples/openthread/pytest_otbr.py b/examples/openthread/pytest_otbr.py index 2ae516518b..eabb1cc24b 100644 --- a/examples/openthread/pytest_otbr.py +++ b/examples/openthread/pytest_otbr.py @@ -548,10 +548,6 @@ def test_TCP_NAT64(Init_interface:bool, dut: Tuple[IdfDut, IdfDut, IdfDut]) -> N @pytest.mark.openthread_sleep @pytest.mark.parametrize( 'config, count, app_path, target', [ - ('cli_h2|sleepy_c6', 2, - f'{os.path.join(os.path.dirname(__file__), "ot_cli")}' - f'|{os.path.join(os.path.dirname(__file__), "ot_sleepy_device")}', - 'esp32h2|esp32c6'), ('cli_c6|sleepy_h2', 2, f'{os.path.join(os.path.dirname(__file__), "ot_cli")}' f'|{os.path.join(os.path.dirname(__file__), "ot_sleepy_device")}',