Merge branch 'bugfix/bootloader_uart_custom_gpio_v4.2' into 'release/v4.2'

bootloader: fixed the issue custom_uart_gpio doesn't take effect (v4.2)

See merge request espressif/esp-idf!17309
This commit is contained in:
Michael (XIAO Xufeng) 2022-03-16 11:39:36 +08:00
commit 16629eaf99
4 changed files with 39 additions and 61 deletions

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@ -305,11 +305,13 @@ static void bootloader_init_uart_console(void)
const uint32_t tx_idx = tx_idx_list[uart_num];
const uint32_t rx_idx = rx_idx_list[uart_num];
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[uart_rx_gpio], PIN_FUNC_GPIO);
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[uart_rx_gpio]);
gpio_pad_pullup(uart_rx_gpio);
gpio_matrix_out(uart_tx_gpio, tx_idx, 0, 0);
gpio_matrix_in(uart_rx_gpio, rx_idx, 0);
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[uart_tx_gpio], PIN_FUNC_GPIO);
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, uart_reset[uart_num]);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, uart_reset[uart_num]);

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@ -251,11 +251,13 @@ static void bootloader_init_uart_console(void)
const uint32_t tx_idx = tx_idx_list[uart_num];
const uint32_t rx_idx = rx_idx_list[uart_num];
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[uart_rx_gpio], PIN_FUNC_GPIO);
PIN_INPUT_ENABLE(GPIO_PIN_MUX_REG[uart_rx_gpio]);
gpio_pad_pullup(uart_rx_gpio);
gpio_matrix_out(uart_tx_gpio, tx_idx, 0, 0);
gpio_matrix_in(uart_rx_gpio, rx_idx, 0);
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[uart_tx_gpio], PIN_FUNC_GPIO);
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, uart_reset[uart_num]);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, uart_reset[uart_num]);

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@ -1,16 +1,10 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
/*
* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32.
#ifndef _SOC_UART_CHANNEL_H
#define _SOC_UART_CHANNEL_H

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@ -1,61 +1,41 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
/*
* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
// This file defines GPIO lookup macros for available UART IO_MUX pins on ESP32S2.
#ifndef _SOC_UART_CHANNEL_H
#define _SOC_UART_CHANNEL_H
//UART channels
#define UART_GPIO1_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 1
#define UART_GPIO3_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 3
#define UART_GPIO19_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_CTS_DIRECT_GPIO_NUM 19
#define UART_GPIO22_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_RTS_DIRECT_GPIO_NUM 22
#define UART_GPIO43_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_TXD_DIRECT_GPIO_NUM 43
#define UART_GPIO44_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_RXD_DIRECT_GPIO_NUM 44
#define UART_GPIO16_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_CTS_DIRECT_GPIO_NUM 16
#define UART_GPIO15_DIRECT_CHANNEL UART_NUM_0
#define UART_NUM_0_RTS_DIRECT_GPIO_NUM 15
#define UART_TXD_GPIO1_DIRECT_CHANNEL UART_GPIO1_DIRECT_CHANNEL
#define UART_RXD_GPIO3_DIRECT_CHANNEL UART_GPIO3_DIRECT_CHANNEL
#define UART_CTS_GPIO19_DIRECT_CHANNEL UART_GPIO19_DIRECT_CHANNEL
#define UART_RTS_GPIO22_DIRECT_CHANNEL UART_GPIO22_DIRECT_CHANNEL
#define UART_TXD_GPIO43_DIRECT_CHANNEL UART_GPIO43_DIRECT_CHANNEL
#define UART_RXD_GPIO44_DIRECT_CHANNEL UART_GPIO44_DIRECT_CHANNEL
#define UART_CTS_GPIO16_DIRECT_CHANNEL UART_GPIO16_DIRECT_CHANNEL
#define UART_RTS_GPIO15_DIRECT_CHANNEL UART_GPIO15_DIRECT_CHANNEL
#define UART_GPIO10_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_TXD_DIRECT_GPIO_NUM 10
#define UART_GPIO9_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_RXD_DIRECT_GPIO_NUM 9
#define UART_GPIO6_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_CTS_DIRECT_GPIO_NUM 6
#define UART_GPIO11_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_RTS_DIRECT_GPIO_NUM 11
#define UART_TXD_GPIO10_DIRECT_CHANNEL UART_GPIO10_DIRECT_CHANNEL
#define UART_RXD_GPIO9_DIRECT_CHANNEL UART_GPIO9_DIRECT_CHANNEL
#define UART_CTS_GPIO6_DIRECT_CHANNEL UART_GPIO6_DIRECT_CHANNEL
#define UART_RTS_GPIO11_DIRECT_CHANNEL UART_GPIO11_DIRECT_CHANNEL
#define UART_GPIO17_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_TXD_DIRECT_GPIO_NUM 17
#define UART_GPIO16_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_RXD_DIRECT_GPIO_NUM 16
#define UART_GPIO8_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_CTS_DIRECT_GPIO_NUM 8
#define UART_GPIO7_DIRECT_CHANNEL UART_NUM_2
#define UART_NUM_2_RTS_DIRECT_GPIO_NUM 7
#define UART_GPIO17_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_TXD_DIRECT_GPIO_NUM 17
#define UART_GPIO18_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_RXD_DIRECT_GPIO_NUM 18
#define UART_GPIO20_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_CTS_DIRECT_GPIO_NUM 20
#define UART_GPIO19_DIRECT_CHANNEL UART_NUM_1
#define UART_NUM_1_RTS_DIRECT_GPIO_NUM 19
#define UART_TXD_GPIO17_DIRECT_CHANNEL UART_GPIO17_DIRECT_CHANNEL
#define UART_RXD_GPIO16_DIRECT_CHANNEL UART_GPIO16_DIRECT_CHANNEL
#define UART_CTS_GPIO8_DIRECT_CHANNEL UART_GPIO8_DIRECT_CHANNEL
#define UART_RTS_GPIO7_DIRECT_CHANNEL UART_GPIO7_DIRECT_CHANNEL
#define UART_RXD_GPIO18_DIRECT_CHANNEL UART_GPIO18_DIRECT_CHANNEL
#define UART_CTS_GPIO20_DIRECT_CHANNEL UART_GPIO20_DIRECT_CHANNEL
#define UART_RTS_GPIO19_DIRECT_CHANNEL UART_GPIO19_DIRECT_CHANNEL
#endif