ci: misc fixes for newlib test app

Enabled additional tests for C2, added config for testing with newlib nano
as well as cleaned up old configs
This commit is contained in:
Marius Vikhammer 2023-05-09 10:24:43 +08:00
parent 75d00928f5
commit 1590fbd31c
7 changed files with 33 additions and 35 deletions

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@ -123,43 +123,51 @@ TEST_CASE("test asctime", "[newlib]")
TEST_ASSERT_EQUAL_STRING(buf, time_str); TEST_ASSERT_EQUAL_STRING(buf, time_str);
} }
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32H2)
static bool fn_in_rom(void *fn) static bool fn_in_rom(void *fn)
{ {
const int fnaddr = (int)fn; const int fnaddr = (int)fn;
return (fnaddr >= SOC_IROM_MASK_LOW && fnaddr < SOC_IROM_MASK_HIGH); return (fnaddr >= SOC_IROM_MASK_LOW && fnaddr < SOC_IROM_MASK_HIGH);
} }
/* Older chips have newlib nano in rom as well, but this is not linked in due to us now using 64 bit time_t
and the ROM code was compiled for 32 bit.
*/
#define PRINTF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2))
#define SSCANF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && CONFIG_IDF_TARGET_ESP32C2)
TEST_CASE("check if ROM or Flash is used for functions", "[newlib]") TEST_CASE("check if ROM or Flash is used for functions", "[newlib]")
{ {
#if CONFIG_NEWLIB_NANO_FORMAT || ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT #if PRINTF_NANO_IN_ROM || (ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT && !CONFIG_NEWLIB_NANO_FORMAT)
TEST_ASSERT(fn_in_rom(vfprintf)); TEST_ASSERT(fn_in_rom(vfprintf));
#else #else
TEST_ASSERT_FALSE(fn_in_rom(vfprintf)); TEST_ASSERT_FALSE(fn_in_rom(vfprintf));
#endif // CONFIG_NEWLIB_NANO_FORMAT || ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT #endif // PRINTF_NANO_IN_ROM || (ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT && !CONFIG_NEWLIB_NANO_FORMAT)
#if (CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C2)) || ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT #if SSCANF_NANO_IN_ROM || (ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT && !CONFIG_NEWLIB_NANO_FORMAT)
TEST_ASSERT(fn_in_rom(sscanf)); TEST_ASSERT(fn_in_rom(sscanf));
#else #else
TEST_ASSERT_FALSE(fn_in_rom(sscanf)); TEST_ASSERT_FALSE(fn_in_rom(sscanf));
#endif // (CONFIG_NEWLIB_NANO_FORMAT && CONFIG_IDF_TARGET_x) || ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT #endif // SSCANF_NANO_IN_ROM || (ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT && !CONFIG_NEWLIB_NANO_FORMAT)
#if defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_SPIRAM) #if defined(CONFIG_IDF_TARGET_ESP32)
TEST_ASSERT(fn_in_rom(atoi));
TEST_ASSERT(fn_in_rom(strtol)); #if defined(CONFIG_SPIRAM_CACHE_WORKAROUND)
#elif defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32S3) \ TEST_ASSERT_FALSE(fn_in_rom(atoi));
|| defined(CONFIG_IDF_TARGET_ESP32C2) || defined(CONFIG_IDF_TARGET_ESP32C6) TEST_ASSERT_FALSE(fn_in_rom(strtol));
/* S3 and C3 always use these from ROM */
TEST_ASSERT(fn_in_rom(atoi));
TEST_ASSERT(fn_in_rom(strtol));
#else #else
TEST_ASSERT(fn_in_rom(atoi));
TEST_ASSERT(fn_in_rom(strtol));
#endif //CONFIG_SPIRAM_CACHE_WORKAROUND
#elif CONFIG_IDF_TARGET_ESP32S2
/* S2 do not have these in ROM */ /* S2 do not have these in ROM */
TEST_ASSERT_FALSE(fn_in_rom(atoi)); TEST_ASSERT_FALSE(fn_in_rom(atoi));
TEST_ASSERT_FALSE(fn_in_rom(strtol)); TEST_ASSERT_FALSE(fn_in_rom(strtol));
#endif // defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_SPIRAM) #else
TEST_ASSERT(fn_in_rom(atoi));
TEST_ASSERT(fn_in_rom(strtol));
#endif // defined(CONFIG_IDF_TARGET_ESP32)
} }
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32H2)
#ifndef CONFIG_NEWLIB_NANO_FORMAT #ifndef CONFIG_NEWLIB_NANO_FORMAT
TEST_CASE("test 64bit int formats", "[newlib]") TEST_CASE("test 64bit int formats", "[newlib]")

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@ -549,16 +549,14 @@ TEST_CASE("test time functions wide 64 bits", "[newlib]")
#endif // !_USE_LONG_TIME_T #endif // !_USE_LONG_TIME_T
// IDF-6962 following test cases don't pass on C2
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)
#if defined( CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER ) && defined( CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER ) #if defined( CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER ) && defined( CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER )
extern int64_t s_microseconds_offset; extern int64_t s_microseconds_offset;
static const uint64_t s_start_timestamp = 1606838354; static const uint64_t s_start_timestamp = 1606838354;
static RTC_NOINIT_ATTR uint64_t s_saved_time; static __NOINIT_ATTR uint64_t s_saved_time;
static RTC_NOINIT_ATTR uint64_t s_time_in_reboot; static __NOINIT_ATTR uint64_t s_time_in_reboot;
typedef enum { typedef enum {
TYPE_REBOOT_ABORT = 0, TYPE_REBOOT_ABORT = 0,
@ -579,6 +577,9 @@ static void print_counters(void)
static void set_initial_condition(type_reboot_t type_reboot, int error_time) static void set_initial_condition(type_reboot_t type_reboot, int error_time)
{ {
s_saved_time = 0;
s_time_in_reboot = 0;
print_counters(); print_counters();
struct timeval tv = { .tv_sec = s_start_timestamp, .tv_usec = 0, }; struct timeval tv = { .tv_sec = s_start_timestamp, .tv_usec = 0, };
@ -651,4 +652,3 @@ TEST_CASE_MULTIPLE_STAGES("Timestamp after abort is correct in case RTC & High-r
TEST_CASE_MULTIPLE_STAGES("Timestamp after restart is correct in case RTC & High-res timer have + big error", "[newlib][reset=SW_CPU_RESET]", set_timestamp2, check_time); TEST_CASE_MULTIPLE_STAGES("Timestamp after restart is correct in case RTC & High-res timer have + big error", "[newlib][reset=SW_CPU_RESET]", set_timestamp2, check_time);
TEST_CASE_MULTIPLE_STAGES("Timestamp after restart is correct in case RTC & High-res timer have - big error", "[newlib][reset=SW_CPU_RESET]", set_timestamp3, check_time); TEST_CASE_MULTIPLE_STAGES("Timestamp after restart is correct in case RTC & High-res timer have - big error", "[newlib][reset=SW_CPU_RESET]", set_timestamp3, check_time);
#endif // CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER && CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER #endif // CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER && CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER
#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C2)

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@ -10,8 +10,8 @@ from pytest_embedded import Dut
'config', 'config',
[ [
pytest.param('default', marks=[pytest.mark.supported_targets]), pytest.param('default', marks=[pytest.mark.supported_targets]),
pytest.param('options', marks=[pytest.mark.supported_targets]),
pytest.param('single_core_esp32', marks=[pytest.mark.esp32]), pytest.param('single_core_esp32', marks=[pytest.mark.esp32]),
pytest.param('single_core_esp32s2', marks=[pytest.mark.esp32s2]),
pytest.param('psram_esp32', marks=[pytest.mark.esp32]), pytest.param('psram_esp32', marks=[pytest.mark.esp32]),
pytest.param('release_esp32', marks=[pytest.mark.esp32]), pytest.param('release_esp32', marks=[pytest.mark.esp32]),
pytest.param('release_esp32c2', marks=[pytest.mark.esp32c2]), pytest.param('release_esp32c2', marks=[pytest.mark.esp32c2]),

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@ -0,0 +1,2 @@
# Test all chips with nano off, nano on is tested in options config
CONFIG_NEWLIB_NANO_FORMAT=n

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@ -0,0 +1,2 @@
# Test with misc newlib config options turned on
CONFIG_NEWLIB_NANO_FORMAT=y

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@ -1,12 +1,2 @@
CONFIG_IDF_TARGET="esp32" CONFIG_IDF_TARGET="esp32"
CONFIG_SPIRAM=y CONFIG_SPIRAM=y
# moved from old psram config
CONFIG_ESP_INT_WDT_TIMEOUT_MS=800
CONFIG_SPIRAM_OCCUPY_NO_HOST=y
CONFIG_ESP_WIFI_RX_IRAM_OPT=n
CONFIG_ESP_WIFI_IRAM_OPT=n
# Disable encrypted flash reads/writes to save IRAM in this build configuration
CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=n
CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY=y
CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y

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@ -1,4 +0,0 @@
CONFIG_IDF_TARGET="esp32s2"
CONFIG_FREERTOS_UNICORE=y
# IDF-6964 test nano format in this configuration (current tests are not passing, so keep disabled for now)
CONFIG_NEWLIB_NANO_FORMAT=n