From 157efcfdbc48313a832fb0325651fe58eee04241 Mon Sep 17 00:00:00 2001 From: Fu Zhibo Date: Thu, 6 Jun 2024 10:55:16 +0800 Subject: [PATCH] feat: support regi2c for esp32c5 --- .../src/esp32c5/bootloader_esp32c5.c | 10 ++++++---- components/esp_rom/CMakeLists.txt | 5 +---- .../esp32c5/mp/esp32c5/Kconfig.soc_caps.in | 2 +- .../esp_rom/esp32c5/mp/esp32c5/esp_rom_caps.h | 2 +- .../esp_rom/patches/esp_rom_hp_regi2c_esp32c5.c | 15 +++------------ 5 files changed, 12 insertions(+), 22 deletions(-) diff --git a/components/bootloader_support/src/esp32c5/bootloader_esp32c5.c b/components/bootloader_support/src/esp32c5/bootloader_esp32c5.c index f73ec1291a..3a11e2c29e 100644 --- a/components/bootloader_support/src/esp32c5/bootloader_esp32c5.c +++ b/components/bootloader_support/src/esp32c5/bootloader_esp32c5.c @@ -42,9 +42,8 @@ #include "soc/lp_wdt_reg.h" #include "hal/efuse_hal.h" #include "hal/lpwdt_ll.h" -#if SOC_MODEM_CLOCK_SUPPORTED #include "modem/modem_lpcon_reg.h" -#endif +#include "modem/modem_syscon_reg.h" static const char *TAG = "boot.esp32c5"; @@ -88,9 +87,12 @@ static void bootloader_super_wdt_auto_feed(void) static inline void bootloader_hardware_init(void) { /* Enable analog i2c master clock */ -#if SOC_MODEM_CLOCK_SUPPORTED SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN); + SET_PERI_REG_MASK(MODEM_LPCON_CLK_CONF_FORCE_ON_REG, MODEM_LPCON_CLK_I2C_MST_FO); // TODO: IDF-8667 Remove this? +#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION SET_PERI_REG_MASK(MODEM_LPCON_I2C_MST_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_SEL_160M); +#else // CONFIG_IDF_TARGET_ESP32C5_MP_VERSION + SET_PERI_REG_MASK(MODEM_SYSCON_CLK_CONF_REG, MODEM_SYSCON_CLK_I2C_MST_SEL_160M); #endif } @@ -163,7 +165,7 @@ esp_err_t bootloader_init(void) } #endif // !CONFIG_APP_BUILD_TYPE_RAM - // check whether a WDT reset happend + // check whether a WDT reset happened bootloader_check_wdt_reset(); // config WDT bootloader_config_wdt(); diff --git a/components/esp_rom/CMakeLists.txt b/components/esp_rom/CMakeLists.txt index 76f70665f6..caf93738c7 100644 --- a/components/esp_rom/CMakeLists.txt +++ b/components/esp_rom/CMakeLists.txt @@ -36,10 +36,7 @@ else() # Override regi2c implementation in ROM if(CONFIG_ESP_ROM_HAS_REGI2C_BUG OR CONFIG_ESP_ROM_WITHOUT_REGI2C) if(target STREQUAL "esp32c6" OR target STREQUAL "esp32c5") - # TODO: [ESP32C5] IDF-8824 - if(NOT CONFIG_IDF_TARGET_ESP32C5_MP_VERSION) - list(APPEND sources "patches/esp_rom_hp_regi2c_${target}.c") - endif() + list(APPEND sources "patches/esp_rom_hp_regi2c_${target}.c") else() list(APPEND sources "patches/esp_rom_regi2c_${target}.c") endif() diff --git a/components/esp_rom/esp32c5/mp/esp32c5/Kconfig.soc_caps.in b/components/esp_rom/esp32c5/mp/esp32c5/Kconfig.soc_caps.in index 688612fcdb..683cb27bad 100644 --- a/components/esp_rom/esp32c5/mp/esp32c5/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32c5/mp/esp32c5/Kconfig.soc_caps.in @@ -55,7 +55,7 @@ config ESP_ROM_HAS_SPI_FLASH bool default y -config ESP_ROM_HAS_REGI2C_BUG +config ESP_ROM_WITHOUT_REGI2C bool default y diff --git a/components/esp_rom/esp32c5/mp/esp32c5/esp_rom_caps.h b/components/esp_rom/esp32c5/mp/esp32c5/esp_rom_caps.h index 9006d78b2f..9a6142c20f 100644 --- a/components/esp_rom/esp32c5/mp/esp32c5/esp_rom_caps.h +++ b/components/esp_rom/esp32c5/mp/esp32c5/esp_rom_caps.h @@ -19,7 +19,7 @@ #define ESP_ROM_HAS_HEAP_TLSF (1) // ROM has the implementation of the tlsf and multi-heap library #define ESP_ROM_HAS_LAYOUT_TABLE (1) // ROM has the layout table #define ESP_ROM_HAS_SPI_FLASH (1) // ROM has the implementation of SPI Flash driver -#define ESP_ROM_HAS_REGI2C_BUG (1) // ROM has the regi2c bug +#define ESP_ROM_WITHOUT_REGI2C (1) // ROM has no regi2c APIs TODO: IDF-10110 need refactor #define ESP_ROM_HAS_NEWLIB (1) // ROM has newlib (at least parts of it) functions included #define ESP_ROM_HAS_NEWLIB_NORMAL_FORMAT (1) // ROM has the newlib normal/full version of formatting functions (as opposed to the nano versions) #define ESP_ROM_WDT_INIT_PATCH (1) // ROM version does not configure the clock diff --git a/components/esp_rom/patches/esp_rom_hp_regi2c_esp32c5.c b/components/esp_rom/patches/esp_rom_hp_regi2c_esp32c5.c index 2fc060575c..f1de569127 100644 --- a/components/esp_rom/patches/esp_rom_hp_regi2c_esp32c5.c +++ b/components/esp_rom/patches/esp_rom_hp_regi2c_esp32c5.c @@ -7,17 +7,7 @@ #include "esp_attr.h" #include "soc/i2c_ana_mst_reg.h" #include "modem/modem_lpcon_reg.h" -/** - * BB - 0x67 - BIT0 - * TXRF - 0x6B - BIT1 - * SDM - 0x63 - BIT2 - * PLL - 0x62 - BIT3 - * BIAS - 0x6A - BIT4 - * BBPLL - 0x66 - BIT5 - * ULP - 0x61 - BIT6 - * SAR - 0x69 - BIT7 - * PMU - 0x6d - BIT8 -*/ +#include "soc/pmu_reg.h" #define REGI2C_BIAS_MST_SEL (BIT(8)) #define REGI2C_BBPLL_MST_SEL (BIT(9)) @@ -87,7 +77,8 @@ static IRAM_ATTR uint8_t regi2c_enable_block(uint8_t block) uint32_t i2c_sel = 0; REG_SET_BIT(MODEM_LPCON_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_EN); - REG_SET_BIT(MODEM_LPCON_I2C_MST_CLK_CONF_REG, MODEM_LPCON_CLK_I2C_MST_SEL_160M); + REG_SET_BIT(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB); // TODO: IDF-8642 Move to pmu_init() + REG_SET_BIT(PMU_RF_PWC_REG, PMU_XPD_PERIF_I2C); // TODO: IDF-8642 Move to pmu_init() /* Before config I2C register, enable corresponding slave. */ switch (block) {