example: add example for ram loadable app

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wuzhenghui 2023-01-29 10:33:44 +08:00
parent db61945537
commit 151c3b335b
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# The following lines of boilerplate have to be in your project's
# CMakeLists in this exact order for cmake to work correctly
cmake_minimum_required(VERSION 3.16)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(ram_loadable_app)

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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
# RAM loadable app Example
Starts a FreeRTOS task to print "Hello World". The segments of this application are
fully linked and run in internal RAM.
(See the README.md file in the upper level 'examples' directory for more information about examples.)
## How to use example
### Hardware Required
This example should be able to run on any commonly available ESP32 development board.
### Configure the project
```
idf.py menuconfig
```
This step is optional, the default settings in `sdkconfig.defaults` are already set to enable the ram_loadable app feature.
`CONFIG_APP_BUILD_TYPE_RAM` is enable by default so that all programs and data are linked into internal RAM. For more information about `CONFIG_APP_BUILD_TYPE_RAM` you can refer to the description in menuconfig.
(Enabling `APP_BUILD_TYPE_PURE_RAM_APP` option IDF will not compile the `spi_flash` related code into bin, which will save a lot of internal ram space. For `esp32` target, limited by its RAM layout, the available RAM space for the app is too small to accommodate this example without this option enabled, so this option is selected by default for esp32 target.)
### Build and Load to RAM
Build the project and load it to the chip's internal RAM, then run monitor tool to view serial output:
```
idf.py set-target {target name}
idf.py build
esptool.py -p PORT --no-stub load_ram build/ram_loadable_app.bin
idf.py -p PORT monitor
```
(Replace PORT with the name of the serial port to use.)
(To exit the serial monitor, type ``Ctrl-]``.)
(For ram_loadable_app, after the chip is reset, it will start from flash by default, so the program will be executed directly after loading to ram. Therefore, manually open idf.py monitor will lose part of the log at startup because the serial port cannot be opened in time, so it is recommended to use a separate serial converter to monitor the output of the UART TX pin)
See the Getting Started Guide for full steps to configure and use ESP-IDF to build projects.

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idf_component_register(SRCS "ram_loadable_app_example_main.c"
INCLUDE_DIRS "")

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/*
* SPDX-FileCopyrightText: 2010-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: CC0-1.0
*/
#include <stdio.h>
#include <inttypes.h>
#include "sdkconfig.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "esp_chip_info.h"
void app_main(void)
{
printf("Hello world!\n");
/* Print chip information */
esp_chip_info_t chip_info;
esp_chip_info(&chip_info);
printf("This is %s chip with %d CPU core(s), WiFi%s%s, ",
CONFIG_IDF_TARGET,
chip_info.cores,
(chip_info.features & CHIP_FEATURE_BT) ? "/BT" : "",
(chip_info.features & CHIP_FEATURE_BLE) ? "/BLE" : "");
printf("silicon revision %d, ", chip_info.revision);
printf("Minimum free heap size: %"PRIu32" bytes\n", esp_get_minimum_free_heap_size());
printf("App is running in RAM !\n");
uint32_t uptime = 0;
while (1) {
printf("Time since boot: %"PRIu32" seconds...\n", uptime++);
vTaskDelay(1000 / portTICK_PERIOD_MS);
}
}

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CONFIG_APP_BUILD_TYPE_RAM=y
# Save size
CONFIG_VFS_SUPPORT_IO=n
# Reset is meaningless to ram_app
CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y