From 14475f0925ee72bfbfb49178805e7c8de8c0bca4 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Wed, 22 Mar 2023 11:19:41 +0800 Subject: [PATCH] soc: regenerate modem header with regtool --- .../include/modem/modem_lpcon_struct.h | 124 +++++ .../esp32h2/include/modem/modem_syscon_reg.h | 506 +++++++++--------- .../include/modem/modem_syscon_struct.h | 140 +++++ 3 files changed, 517 insertions(+), 253 deletions(-) create mode 100644 components/soc/esp32h2/include/modem/modem_lpcon_struct.h create mode 100644 components/soc/esp32h2/include/modem/modem_syscon_struct.h diff --git a/components/soc/esp32h2/include/modem/modem_lpcon_struct.h b/components/soc/esp32h2/include/modem/modem_lpcon_struct.h new file mode 100644 index 0000000000..6e57c6f5f4 --- /dev/null +++ b/components/soc/esp32h2/include/modem/modem_lpcon_struct.h @@ -0,0 +1,124 @@ +/** + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#include +#ifdef __cplusplus +extern "C" { +#endif + +typedef union { + struct { + uint32_t clk_en:1; + uint32_t reserved_1:31; + }; + uint32_t val; +} modem_lpcon_test_conf_reg_t; + +typedef union { + struct { + uint32_t clk_coex_lp_sel_osc_slow:1; + uint32_t clk_coex_lp_sel_osc_fast:1; + uint32_t clk_coex_lp_sel_xtal:1; + uint32_t clk_coex_lp_sel_xtal32k:1; + uint32_t clk_coex_lp_div_num:12; + uint32_t reserved_16:16; + }; + uint32_t val; +} modem_lpcon_coex_lp_clk_conf_reg_t; + +typedef union { + struct { + uint32_t reserved_0:1; + uint32_t clk_coex_en:1; + uint32_t clk_i2c_mst_en:1; + uint32_t reserved_3:2; + uint32_t clk_fe_mem_en:1; + uint32_t reserved_6:26; + }; + uint32_t val; +} modem_lpcon_clk_conf_reg_t; + +typedef union { + struct { + uint32_t reserved_0:1; + uint32_t clk_coex_fo:1; + uint32_t clk_i2c_mst_fo:1; + uint32_t reserved_3:2; + uint32_t clk_fe_mem_fo:1; + uint32_t reserved_6:26; + }; + uint32_t val; +} modem_lpcon_clk_conf_force_on_reg_t; + +typedef union { + struct { + uint32_t pwr_tick_target:6; + uint32_t reserved_6:26; + }; + uint32_t val; +} modem_lpcon_tick_conf_reg_t; + +typedef union { + struct { + uint32_t reserved_0:1; + uint32_t rst_coex:1; + uint32_t rst_i2c_mst:1; + uint32_t reserved_3:29; + }; + uint32_t val; +} modem_lpcon_rst_conf_reg_t; + +typedef union { + struct { + uint32_t reserved_0:2; + uint32_t agc_mem_force_pu:1; + uint32_t agc_mem_force_pd:1; + uint32_t pbus_mem_force_pu:1; + uint32_t pbus_mem_force_pd:1; + uint32_t reserved_6:2; + uint32_t i2c_mst_mem_force_pu:1; + uint32_t i2c_mst_mem_force_pd:1; + uint32_t chan_freq_mem_force_pu:1; + uint32_t chan_freq_mem_force_pd:1; + uint32_t modem_pwr_mem_wp:3; + uint32_t modem_pwr_mem_wa:3; + uint32_t modem_pwr_mem_ra:2; + uint32_t modem_pwr_mem_rm:4; + uint32_t reserved_24:8; + }; + uint32_t val; +} modem_lpcon_mem_conf_reg_t; + +typedef union { + struct { + uint32_t date:28; + uint32_t reserved_28:4; + }; + uint32_t val; +} modem_lpcon_date_reg_t; + + +typedef struct { + volatile modem_lpcon_test_conf_reg_t test_conf; + volatile modem_lpcon_coex_lp_clk_conf_reg_t coex_lp_clk_conf; + volatile modem_lpcon_clk_conf_reg_t clk_conf; + volatile modem_lpcon_clk_conf_force_on_reg_t clk_conf_force_on; + volatile modem_lpcon_tick_conf_reg_t tick_conf; + volatile modem_lpcon_rst_conf_reg_t rst_conf; + volatile modem_lpcon_mem_conf_reg_t mem_conf; + volatile modem_lpcon_date_reg_t date; +} modem_lpcon_dev_t; + +extern modem_lpcon_dev_t MODEM_LPCON; + +#ifndef __cplusplus +_Static_assert(sizeof(modem_lpcon_dev_t) == 0x20, "Invalid size of modem_lpcon_dev_t structure"); +#endif + +#ifdef __cplusplus +} +#endif diff --git a/components/soc/esp32h2/include/modem/modem_syscon_reg.h b/components/soc/esp32h2/include/modem/modem_syscon_reg.h index aad78ebf38..b44ec31a70 100644 --- a/components/soc/esp32h2/include/modem/modem_syscon_reg.h +++ b/components/soc/esp32h2/include/modem/modem_syscon_reg.h @@ -2,7 +2,7 @@ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 - *//*description: */ + */ #pragma once #include @@ -11,278 +11,278 @@ extern "C" { #endif -#define MODEM_SYSCON_TEST_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0x0) -/* MODEM_SYSCON_CLK_EN : R/W ;bitpos:[0] ;default: 1'b0 ; */ -/*description: .*/ +#define MODEM_SYSCON_TEST_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0x0) +/* MODEM_SYSCON_CLK_EN : R/W; bitpos: [0]; default: 0; */ +/* description: .*/ #define MODEM_SYSCON_CLK_EN (BIT(0)) -#define MODEM_SYSCON_CLK_EN_M (BIT(0)) -#define MODEM_SYSCON_CLK_EN_V 0x1 +#define MODEM_SYSCON_CLK_EN_M (MODEM_SYSCON_CLK_EN_V << MODEM_SYSCON_CLK_EN_S) +#define MODEM_SYSCON_CLK_EN_V 0x00000001U #define MODEM_SYSCON_CLK_EN_S 0 -#define MODEM_SYSCON_CLK_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0x4) -/* MODEM_SYSCON_CLK_DATA_DUMP_EN : R/W ;bitpos:[31] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_DATA_DUMP_EN (BIT(31)) -#define MODEM_SYSCON_CLK_DATA_DUMP_EN_M (BIT(31)) -#define MODEM_SYSCON_CLK_DATA_DUMP_EN_V 0x1 -#define MODEM_SYSCON_CLK_DATA_DUMP_EN_S 31 -/* MODEM_SYSCON_CLK_BLE_TIMER_EN : R/W ;bitpos:[30] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_BLE_TIMER_EN (BIT(30)) -#define MODEM_SYSCON_CLK_BLE_TIMER_EN_M (BIT(30)) -#define MODEM_SYSCON_CLK_BLE_TIMER_EN_V 0x1 -#define MODEM_SYSCON_CLK_BLE_TIMER_EN_S 30 -/* MODEM_SYSCON_CLK_BLE_TIMER_APB_EN : R/W ;bitpos:[29] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_BLE_TIMER_APB_EN (BIT(29)) -#define MODEM_SYSCON_CLK_BLE_TIMER_APB_EN_M (BIT(29)) -#define MODEM_SYSCON_CLK_BLE_TIMER_APB_EN_V 0x1 -#define MODEM_SYSCON_CLK_BLE_TIMER_APB_EN_S 29 -/* MODEM_SYSCON_CLK_MODEM_SEC_EN : R/W ;bitpos:[28] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_MODEM_SEC_EN (BIT(28)) -#define MODEM_SYSCON_CLK_MODEM_SEC_EN_M (BIT(28)) -#define MODEM_SYSCON_CLK_MODEM_SEC_EN_V 0x1 -#define MODEM_SYSCON_CLK_MODEM_SEC_EN_S 28 -/* MODEM_SYSCON_CLK_MODEM_SEC_APB_EN : R/W ;bitpos:[27] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN (BIT(27)) -#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_M (BIT(27)) -#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_V 0x1 -#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_S 27 -/* MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN : R/W ;bitpos:[26] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN (BIT(26)) -#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_M (BIT(26)) -#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_V 0x1 -#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_S 26 -/* MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN : R/W ;bitpos:[25] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN (BIT(25)) -#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_M (BIT(25)) -#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_V 0x1 -#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_S 25 -/* MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN : R/W ;bitpos:[24] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN (BIT(24)) -#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_M (BIT(24)) -#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_V 0x1 -#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_S 24 -/* MODEM_SYSCON_CLK_ZB_MAC_EN : R/W ;bitpos:[23] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_ZB_MAC_EN (BIT(23)) -#define MODEM_SYSCON_CLK_ZB_MAC_EN_M (BIT(23)) -#define MODEM_SYSCON_CLK_ZB_MAC_EN_V 0x1 -#define MODEM_SYSCON_CLK_ZB_MAC_EN_S 23 -/* MODEM_SYSCON_CLK_ZB_APB_EN : R/W ;bitpos:[22] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_ZB_APB_EN (BIT(22)) -#define MODEM_SYSCON_CLK_ZB_APB_EN_M (BIT(22)) -#define MODEM_SYSCON_CLK_ZB_APB_EN_V 0x1 -#define MODEM_SYSCON_CLK_ZB_APB_EN_S 22 -/* MODEM_SYSCON_CLK_ETM_EN : R/W ;bitpos:[21] ;default: 1'b0 ; */ -/*description: .*/ +#define MODEM_SYSCON_CLK_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0x4) +/* MODEM_SYSCON_CLK_ETM_EN : R/W; bitpos: [21]; default: 0; */ +/* description: .*/ #define MODEM_SYSCON_CLK_ETM_EN (BIT(21)) -#define MODEM_SYSCON_CLK_ETM_EN_M (BIT(21)) -#define MODEM_SYSCON_CLK_ETM_EN_V 0x1 +#define MODEM_SYSCON_CLK_ETM_EN_M (MODEM_SYSCON_CLK_ETM_EN_V << MODEM_SYSCON_CLK_ETM_EN_S) +#define MODEM_SYSCON_CLK_ETM_EN_V 0x00000001U #define MODEM_SYSCON_CLK_ETM_EN_S 21 +/* MODEM_SYSCON_CLK_ZB_APB_EN : R/W; bitpos: [22]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_ZB_APB_EN (BIT(22)) +#define MODEM_SYSCON_CLK_ZB_APB_EN_M (MODEM_SYSCON_CLK_ZB_APB_EN_V << MODEM_SYSCON_CLK_ZB_APB_EN_S) +#define MODEM_SYSCON_CLK_ZB_APB_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_ZB_APB_EN_S 22 +/* MODEM_SYSCON_CLK_ZB_MAC_EN : R/W; bitpos: [23]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_ZB_MAC_EN (BIT(23)) +#define MODEM_SYSCON_CLK_ZB_MAC_EN_M (MODEM_SYSCON_CLK_ZB_MAC_EN_V << MODEM_SYSCON_CLK_ZB_MAC_EN_S) +#define MODEM_SYSCON_CLK_ZB_MAC_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_ZB_MAC_EN_S 23 +/* MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN : R/W; bitpos: [24]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN (BIT(24)) +#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_M (MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_V << MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_S) +#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_MODEM_SEC_ECB_EN_S 24 +/* MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN : R/W; bitpos: [25]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN (BIT(25)) +#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_M (MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_V << MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_S) +#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_MODEM_SEC_CCM_EN_S 25 +/* MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN : R/W; bitpos: [26]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN (BIT(26)) +#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_M (MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_V << MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_S) +#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_MODEM_SEC_BAH_EN_S 26 +/* MODEM_SYSCON_CLK_MODEM_SEC_APB_EN : R/W; bitpos: [27]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN (BIT(27)) +#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_M (MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_V << MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_S) +#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_MODEM_SEC_APB_EN_S 27 +/* MODEM_SYSCON_CLK_MODEM_SEC_EN : R/W; bitpos: [28]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_MODEM_SEC_EN (BIT(28)) +#define MODEM_SYSCON_CLK_MODEM_SEC_EN_M (MODEM_SYSCON_CLK_MODEM_SEC_EN_V << MODEM_SYSCON_CLK_MODEM_SEC_EN_S) +#define MODEM_SYSCON_CLK_MODEM_SEC_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_MODEM_SEC_EN_S 28 +/* MODEM_SYSCON_CLK_BLE_TIMER_APB_EN : R/W; bitpos: [29]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_BLE_TIMER_APB_EN (BIT(29)) +#define MODEM_SYSCON_CLK_BLE_TIMER_APB_EN_M (MODEM_SYSCON_CLK_BLE_TIMER_APB_EN_V << MODEM_SYSCON_CLK_BLE_TIMER_APB_EN_S) +#define MODEM_SYSCON_CLK_BLE_TIMER_APB_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_BLE_TIMER_APB_EN_S 29 +/* MODEM_SYSCON_CLK_BLE_TIMER_EN : R/W; bitpos: [30]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_BLE_TIMER_EN (BIT(30)) +#define MODEM_SYSCON_CLK_BLE_TIMER_EN_M (MODEM_SYSCON_CLK_BLE_TIMER_EN_V << MODEM_SYSCON_CLK_BLE_TIMER_EN_S) +#define MODEM_SYSCON_CLK_BLE_TIMER_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_BLE_TIMER_EN_S 30 +/* MODEM_SYSCON_CLK_DATA_DUMP_EN : R/W; bitpos: [31]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_DATA_DUMP_EN (BIT(31)) +#define MODEM_SYSCON_CLK_DATA_DUMP_EN_M (MODEM_SYSCON_CLK_DATA_DUMP_EN_V << MODEM_SYSCON_CLK_DATA_DUMP_EN_S) +#define MODEM_SYSCON_CLK_DATA_DUMP_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_DATA_DUMP_EN_S 31 -#define MODEM_SYSCON_CLK_CONF_FORCE_ON_REG (DR_REG_MODEM_SYSCON_BASE + 0x8) -/* MODEM_SYSCON_CLK_DATA_DUMP_FO : R/W ;bitpos:[31] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_DATA_DUMP_FO (BIT(31)) -#define MODEM_SYSCON_CLK_DATA_DUMP_FO_M (BIT(31)) -#define MODEM_SYSCON_CLK_DATA_DUMP_FO_V 0x1 -#define MODEM_SYSCON_CLK_DATA_DUMP_FO_S 31 -/* MODEM_SYSCON_CLK_BLE_TIMER_FO : R/W ;bitpos:[30] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_BLE_TIMER_FO (BIT(30)) -#define MODEM_SYSCON_CLK_BLE_TIMER_FO_M (BIT(30)) -#define MODEM_SYSCON_CLK_BLE_TIMER_FO_V 0x1 -#define MODEM_SYSCON_CLK_BLE_TIMER_FO_S 30 -/* MODEM_SYSCON_CLK_MODEM_SEC_FO : R/W ;bitpos:[29] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_MODEM_SEC_FO (BIT(29)) -#define MODEM_SYSCON_CLK_MODEM_SEC_FO_M (BIT(29)) -#define MODEM_SYSCON_CLK_MODEM_SEC_FO_V 0x1 -#define MODEM_SYSCON_CLK_MODEM_SEC_FO_S 29 -/* MODEM_SYSCON_CLK_ZB_FO : R/W ;bitpos:[24] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_ZB_FO (BIT(24)) -#define MODEM_SYSCON_CLK_ZB_FO_M (BIT(24)) -#define MODEM_SYSCON_CLK_ZB_FO_V 0x1 -#define MODEM_SYSCON_CLK_ZB_FO_S 24 -/* MODEM_SYSCON_CLK_ETM_FO : R/W ;bitpos:[22] ;default: 1'b0 ; */ -/*description: .*/ +#define MODEM_SYSCON_CLK_CONF_FORCE_ON_REG (DR_REG_MODEM_SYSCON_BASE + 0x8) +/* MODEM_SYSCON_CLK_ETM_FO : R/W; bitpos: [22]; default: 0; */ +/* description: .*/ #define MODEM_SYSCON_CLK_ETM_FO (BIT(22)) -#define MODEM_SYSCON_CLK_ETM_FO_M (BIT(22)) -#define MODEM_SYSCON_CLK_ETM_FO_V 0x1 +#define MODEM_SYSCON_CLK_ETM_FO_M (MODEM_SYSCON_CLK_ETM_FO_V << MODEM_SYSCON_CLK_ETM_FO_S) +#define MODEM_SYSCON_CLK_ETM_FO_V 0x00000001U #define MODEM_SYSCON_CLK_ETM_FO_S 22 +/* MODEM_SYSCON_CLK_ZB_FO : R/W; bitpos: [24]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_ZB_FO (BIT(24)) +#define MODEM_SYSCON_CLK_ZB_FO_M (MODEM_SYSCON_CLK_ZB_FO_V << MODEM_SYSCON_CLK_ZB_FO_S) +#define MODEM_SYSCON_CLK_ZB_FO_V 0x00000001U +#define MODEM_SYSCON_CLK_ZB_FO_S 24 +/* MODEM_SYSCON_CLK_MODEM_SEC_FO : R/W; bitpos: [29]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_MODEM_SEC_FO (BIT(29)) +#define MODEM_SYSCON_CLK_MODEM_SEC_FO_M (MODEM_SYSCON_CLK_MODEM_SEC_FO_V << MODEM_SYSCON_CLK_MODEM_SEC_FO_S) +#define MODEM_SYSCON_CLK_MODEM_SEC_FO_V 0x00000001U +#define MODEM_SYSCON_CLK_MODEM_SEC_FO_S 29 +/* MODEM_SYSCON_CLK_BLE_TIMER_FO : R/W; bitpos: [30]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_BLE_TIMER_FO (BIT(30)) +#define MODEM_SYSCON_CLK_BLE_TIMER_FO_M (MODEM_SYSCON_CLK_BLE_TIMER_FO_V << MODEM_SYSCON_CLK_BLE_TIMER_FO_S) +#define MODEM_SYSCON_CLK_BLE_TIMER_FO_V 0x00000001U +#define MODEM_SYSCON_CLK_BLE_TIMER_FO_S 30 +/* MODEM_SYSCON_CLK_DATA_DUMP_FO : R/W; bitpos: [31]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_DATA_DUMP_FO (BIT(31)) +#define MODEM_SYSCON_CLK_DATA_DUMP_FO_M (MODEM_SYSCON_CLK_DATA_DUMP_FO_V << MODEM_SYSCON_CLK_DATA_DUMP_FO_S) +#define MODEM_SYSCON_CLK_DATA_DUMP_FO_V 0x00000001U +#define MODEM_SYSCON_CLK_DATA_DUMP_FO_S 31 -#define MODEM_SYSCON_MODEM_RST_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0xC) -/* MODEM_SYSCON_RST_DATA_DUMP : R/W ;bitpos:[31] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_DATA_DUMP (BIT(31)) -#define MODEM_SYSCON_RST_DATA_DUMP_M (BIT(31)) -#define MODEM_SYSCON_RST_DATA_DUMP_V 0x1 -#define MODEM_SYSCON_RST_DATA_DUMP_S 31 -/* MODEM_SYSCON_RST_BLE_TIMER : R/W ;bitpos:[30] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_BLE_TIMER (BIT(30)) -#define MODEM_SYSCON_RST_BLE_TIMER_M (BIT(30)) -#define MODEM_SYSCON_RST_BLE_TIMER_V 0x1 -#define MODEM_SYSCON_RST_BLE_TIMER_S 30 -/* MODEM_SYSCON_RST_MODEM_SEC : R/W ;bitpos:[29] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_MODEM_SEC (BIT(29)) -#define MODEM_SYSCON_RST_MODEM_SEC_M (BIT(29)) -#define MODEM_SYSCON_RST_MODEM_SEC_V 0x1 -#define MODEM_SYSCON_RST_MODEM_SEC_S 29 -/* MODEM_SYSCON_RST_MODEM_BAH : R/W ;bitpos:[27] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_MODEM_BAH (BIT(27)) -#define MODEM_SYSCON_RST_MODEM_BAH_M (BIT(27)) -#define MODEM_SYSCON_RST_MODEM_BAH_V 0x1 -#define MODEM_SYSCON_RST_MODEM_BAH_S 27 -/* MODEM_SYSCON_RST_MODEM_CCM : R/W ;bitpos:[26] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_MODEM_CCM (BIT(26)) -#define MODEM_SYSCON_RST_MODEM_CCM_M (BIT(26)) -#define MODEM_SYSCON_RST_MODEM_CCM_V 0x1 -#define MODEM_SYSCON_RST_MODEM_CCM_S 26 -/* MODEM_SYSCON_RST_MODEM_ECB : R/W ;bitpos:[25] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_MODEM_ECB (BIT(25)) -#define MODEM_SYSCON_RST_MODEM_ECB_M (BIT(25)) -#define MODEM_SYSCON_RST_MODEM_ECB_V 0x1 -#define MODEM_SYSCON_RST_MODEM_ECB_S 25 -/* MODEM_SYSCON_RST_ZBMAC : R/W ;bitpos:[24] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_ZBMAC (BIT(24)) -#define MODEM_SYSCON_RST_ZBMAC_M (BIT(24)) -#define MODEM_SYSCON_RST_ZBMAC_V 0x1 -#define MODEM_SYSCON_RST_ZBMAC_S 24 -/* MODEM_SYSCON_RST_ETM : R/W ;bitpos:[22] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_ETM (BIT(22)) -#define MODEM_SYSCON_RST_ETM_M (BIT(22)) -#define MODEM_SYSCON_RST_ETM_V 0x1 -#define MODEM_SYSCON_RST_ETM_S 22 -/* MODEM_SYSCON_RST_BTBB : R/W ;bitpos:[18] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_BTBB (BIT(18)) -#define MODEM_SYSCON_RST_BTBB_M (BIT(18)) -#define MODEM_SYSCON_RST_BTBB_V 0x1 -#define MODEM_SYSCON_RST_BTBB_S 18 -/* MODEM_SYSCON_RST_BTBB_APB : R/W ;bitpos:[17] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_BTBB_APB (BIT(17)) -#define MODEM_SYSCON_RST_BTBB_APB_M (BIT(17)) -#define MODEM_SYSCON_RST_BTBB_APB_V 0x1 -#define MODEM_SYSCON_RST_BTBB_APB_S 17 -/* MODEM_SYSCON_RST_BTMAC : R/W ;bitpos:[16] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_BTMAC (BIT(16)) -#define MODEM_SYSCON_RST_BTMAC_M (BIT(16)) -#define MODEM_SYSCON_RST_BTMAC_V 0x1 -#define MODEM_SYSCON_RST_BTMAC_S 16 -/* MODEM_SYSCON_RST_BTMAC_APB : R/W ;bitpos:[15] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_RST_BTMAC_APB (BIT(15)) -#define MODEM_SYSCON_RST_BTMAC_APB_M (BIT(15)) -#define MODEM_SYSCON_RST_BTMAC_APB_V 0x1 -#define MODEM_SYSCON_RST_BTMAC_APB_S 15 -/* MODEM_SYSCON_RST_FE : R/W ;bitpos:[14] ;default: 1'b0 ; */ -/*description: .*/ +#define MODEM_SYSCON_MODEM_RST_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0xc) +/* MODEM_SYSCON_RST_FE : R/W; bitpos: [14]; default: 0; */ +/* description: .*/ #define MODEM_SYSCON_RST_FE (BIT(14)) -#define MODEM_SYSCON_RST_FE_M (BIT(14)) -#define MODEM_SYSCON_RST_FE_V 0x1 +#define MODEM_SYSCON_RST_FE_M (MODEM_SYSCON_RST_FE_V << MODEM_SYSCON_RST_FE_S) +#define MODEM_SYSCON_RST_FE_V 0x00000001U #define MODEM_SYSCON_RST_FE_S 14 +/* MODEM_SYSCON_RST_BTMAC_APB : R/W; bitpos: [15]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_BTMAC_APB (BIT(15)) +#define MODEM_SYSCON_RST_BTMAC_APB_M (MODEM_SYSCON_RST_BTMAC_APB_V << MODEM_SYSCON_RST_BTMAC_APB_S) +#define MODEM_SYSCON_RST_BTMAC_APB_V 0x00000001U +#define MODEM_SYSCON_RST_BTMAC_APB_S 15 +/* MODEM_SYSCON_RST_BTMAC : R/W; bitpos: [16]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_BTMAC (BIT(16)) +#define MODEM_SYSCON_RST_BTMAC_M (MODEM_SYSCON_RST_BTMAC_V << MODEM_SYSCON_RST_BTMAC_S) +#define MODEM_SYSCON_RST_BTMAC_V 0x00000001U +#define MODEM_SYSCON_RST_BTMAC_S 16 +/* MODEM_SYSCON_RST_BTBB_APB : R/W; bitpos: [17]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_BTBB_APB (BIT(17)) +#define MODEM_SYSCON_RST_BTBB_APB_M (MODEM_SYSCON_RST_BTBB_APB_V << MODEM_SYSCON_RST_BTBB_APB_S) +#define MODEM_SYSCON_RST_BTBB_APB_V 0x00000001U +#define MODEM_SYSCON_RST_BTBB_APB_S 17 +/* MODEM_SYSCON_RST_BTBB : R/W; bitpos: [18]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_BTBB (BIT(18)) +#define MODEM_SYSCON_RST_BTBB_M (MODEM_SYSCON_RST_BTBB_V << MODEM_SYSCON_RST_BTBB_S) +#define MODEM_SYSCON_RST_BTBB_V 0x00000001U +#define MODEM_SYSCON_RST_BTBB_S 18 +/* MODEM_SYSCON_RST_ETM : R/W; bitpos: [22]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_ETM (BIT(22)) +#define MODEM_SYSCON_RST_ETM_M (MODEM_SYSCON_RST_ETM_V << MODEM_SYSCON_RST_ETM_S) +#define MODEM_SYSCON_RST_ETM_V 0x00000001U +#define MODEM_SYSCON_RST_ETM_S 22 +/* MODEM_SYSCON_RST_ZBMAC : R/W; bitpos: [24]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_ZBMAC (BIT(24)) +#define MODEM_SYSCON_RST_ZBMAC_M (MODEM_SYSCON_RST_ZBMAC_V << MODEM_SYSCON_RST_ZBMAC_S) +#define MODEM_SYSCON_RST_ZBMAC_V 0x00000001U +#define MODEM_SYSCON_RST_ZBMAC_S 24 +/* MODEM_SYSCON_RST_MODEM_ECB : R/W; bitpos: [25]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_MODEM_ECB (BIT(25)) +#define MODEM_SYSCON_RST_MODEM_ECB_M (MODEM_SYSCON_RST_MODEM_ECB_V << MODEM_SYSCON_RST_MODEM_ECB_S) +#define MODEM_SYSCON_RST_MODEM_ECB_V 0x00000001U +#define MODEM_SYSCON_RST_MODEM_ECB_S 25 +/* MODEM_SYSCON_RST_MODEM_CCM : R/W; bitpos: [26]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_MODEM_CCM (BIT(26)) +#define MODEM_SYSCON_RST_MODEM_CCM_M (MODEM_SYSCON_RST_MODEM_CCM_V << MODEM_SYSCON_RST_MODEM_CCM_S) +#define MODEM_SYSCON_RST_MODEM_CCM_V 0x00000001U +#define MODEM_SYSCON_RST_MODEM_CCM_S 26 +/* MODEM_SYSCON_RST_MODEM_BAH : R/W; bitpos: [27]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_MODEM_BAH (BIT(27)) +#define MODEM_SYSCON_RST_MODEM_BAH_M (MODEM_SYSCON_RST_MODEM_BAH_V << MODEM_SYSCON_RST_MODEM_BAH_S) +#define MODEM_SYSCON_RST_MODEM_BAH_V 0x00000001U +#define MODEM_SYSCON_RST_MODEM_BAH_S 27 +/* MODEM_SYSCON_RST_MODEM_SEC : R/W; bitpos: [29]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_MODEM_SEC (BIT(29)) +#define MODEM_SYSCON_RST_MODEM_SEC_M (MODEM_SYSCON_RST_MODEM_SEC_V << MODEM_SYSCON_RST_MODEM_SEC_S) +#define MODEM_SYSCON_RST_MODEM_SEC_V 0x00000001U +#define MODEM_SYSCON_RST_MODEM_SEC_S 29 +/* MODEM_SYSCON_RST_BLE_TIMER : R/W; bitpos: [30]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_BLE_TIMER (BIT(30)) +#define MODEM_SYSCON_RST_BLE_TIMER_M (MODEM_SYSCON_RST_BLE_TIMER_V << MODEM_SYSCON_RST_BLE_TIMER_S) +#define MODEM_SYSCON_RST_BLE_TIMER_V 0x00000001U +#define MODEM_SYSCON_RST_BLE_TIMER_S 30 +/* MODEM_SYSCON_RST_DATA_DUMP : R/W; bitpos: [31]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_RST_DATA_DUMP (BIT(31)) +#define MODEM_SYSCON_RST_DATA_DUMP_M (MODEM_SYSCON_RST_DATA_DUMP_V << MODEM_SYSCON_RST_DATA_DUMP_S) +#define MODEM_SYSCON_RST_DATA_DUMP_V 0x00000001U +#define MODEM_SYSCON_RST_DATA_DUMP_S 31 -#define MODEM_SYSCON_CLK_CONF1_REG (DR_REG_MODEM_SYSCON_BASE + 0x10) -/* MODEM_SYSCON_CLK_BT_EN : R/W ;bitpos:[18] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_BT_EN (BIT(18)) -#define MODEM_SYSCON_CLK_BT_EN_M (BIT(18)) -#define MODEM_SYSCON_CLK_BT_EN_V 0x1 -#define MODEM_SYSCON_CLK_BT_EN_S 18 -/* MODEM_SYSCON_CLK_BT_APB_EN : R/W ;bitpos:[17] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_BT_APB_EN (BIT(17)) -#define MODEM_SYSCON_CLK_BT_APB_EN_M (BIT(17)) -#define MODEM_SYSCON_CLK_BT_APB_EN_V 0x1 -#define MODEM_SYSCON_CLK_BT_APB_EN_S 17 -/* MODEM_SYSCON_CLK_FE_APB_EN : R/W ;bitpos:[16] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_FE_APB_EN (BIT(16)) -#define MODEM_SYSCON_CLK_FE_APB_EN_M (BIT(16)) -#define MODEM_SYSCON_CLK_FE_APB_EN_V 0x1 -#define MODEM_SYSCON_CLK_FE_APB_EN_S 16 -/* MODEM_SYSCON_CLK_FE_ADC_EN : R/W ;bitpos:[15] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_FE_ADC_EN (BIT(15)) -#define MODEM_SYSCON_CLK_FE_ADC_EN_M (BIT(15)) -#define MODEM_SYSCON_CLK_FE_ADC_EN_V 0x1 -#define MODEM_SYSCON_CLK_FE_ADC_EN_S 15 -/* MODEM_SYSCON_CLK_FE_SDM_EN : R/W ;bitpos:[14] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_FE_SDM_EN (BIT(14)) -#define MODEM_SYSCON_CLK_FE_SDM_EN_M (BIT(14)) -#define MODEM_SYSCON_CLK_FE_SDM_EN_V 0x1 -#define MODEM_SYSCON_CLK_FE_SDM_EN_S 14 -/* MODEM_SYSCON_CLK_FE_32M_EN : R/W ;bitpos:[13] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_FE_32M_EN (BIT(13)) -#define MODEM_SYSCON_CLK_FE_32M_EN_M (BIT(13)) -#define MODEM_SYSCON_CLK_FE_32M_EN_V 0x1 -#define MODEM_SYSCON_CLK_FE_32M_EN_S 13 -/* MODEM_SYSCON_CLK_FE_16M_EN : R/W ;bitpos:[12] ;default: 1'b0 ; */ -/*description: .*/ +#define MODEM_SYSCON_CLK_CONF1_REG (DR_REG_MODEM_SYSCON_BASE + 0x10) +/* MODEM_SYSCON_CLK_FE_16M_EN : R/W; bitpos: [12]; default: 0; */ +/* description: .*/ #define MODEM_SYSCON_CLK_FE_16M_EN (BIT(12)) -#define MODEM_SYSCON_CLK_FE_16M_EN_M (BIT(12)) -#define MODEM_SYSCON_CLK_FE_16M_EN_V 0x1 +#define MODEM_SYSCON_CLK_FE_16M_EN_M (MODEM_SYSCON_CLK_FE_16M_EN_V << MODEM_SYSCON_CLK_FE_16M_EN_S) +#define MODEM_SYSCON_CLK_FE_16M_EN_V 0x00000001U #define MODEM_SYSCON_CLK_FE_16M_EN_S 12 +/* MODEM_SYSCON_CLK_FE_32M_EN : R/W; bitpos: [13]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_FE_32M_EN (BIT(13)) +#define MODEM_SYSCON_CLK_FE_32M_EN_M (MODEM_SYSCON_CLK_FE_32M_EN_V << MODEM_SYSCON_CLK_FE_32M_EN_S) +#define MODEM_SYSCON_CLK_FE_32M_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_FE_32M_EN_S 13 +/* MODEM_SYSCON_CLK_FE_SDM_EN : R/W; bitpos: [14]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_FE_SDM_EN (BIT(14)) +#define MODEM_SYSCON_CLK_FE_SDM_EN_M (MODEM_SYSCON_CLK_FE_SDM_EN_V << MODEM_SYSCON_CLK_FE_SDM_EN_S) +#define MODEM_SYSCON_CLK_FE_SDM_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_FE_SDM_EN_S 14 +/* MODEM_SYSCON_CLK_FE_ADC_EN : R/W; bitpos: [15]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_FE_ADC_EN (BIT(15)) +#define MODEM_SYSCON_CLK_FE_ADC_EN_M (MODEM_SYSCON_CLK_FE_ADC_EN_V << MODEM_SYSCON_CLK_FE_ADC_EN_S) +#define MODEM_SYSCON_CLK_FE_ADC_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_FE_ADC_EN_S 15 +/* MODEM_SYSCON_CLK_FE_APB_EN : R/W; bitpos: [16]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_FE_APB_EN (BIT(16)) +#define MODEM_SYSCON_CLK_FE_APB_EN_M (MODEM_SYSCON_CLK_FE_APB_EN_V << MODEM_SYSCON_CLK_FE_APB_EN_S) +#define MODEM_SYSCON_CLK_FE_APB_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_FE_APB_EN_S 16 +/* MODEM_SYSCON_CLK_BT_APB_EN : R/W; bitpos: [17]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_BT_APB_EN (BIT(17)) +#define MODEM_SYSCON_CLK_BT_APB_EN_M (MODEM_SYSCON_CLK_BT_APB_EN_V << MODEM_SYSCON_CLK_BT_APB_EN_S) +#define MODEM_SYSCON_CLK_BT_APB_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_BT_APB_EN_S 17 +/* MODEM_SYSCON_CLK_BT_EN : R/W; bitpos: [18]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_BT_EN (BIT(18)) +#define MODEM_SYSCON_CLK_BT_EN_M (MODEM_SYSCON_CLK_BT_EN_V << MODEM_SYSCON_CLK_BT_EN_S) +#define MODEM_SYSCON_CLK_BT_EN_V 0x00000001U +#define MODEM_SYSCON_CLK_BT_EN_S 18 -#define MODEM_SYSCON_CLK_CONF1_FORCE_ON_REG (DR_REG_MODEM_SYSCON_BASE + 0x14) -/* MODEM_SYSCON_CLK_BT_FO : R/W ;bitpos:[18] ;default: 1'b0 ; */ -/*description: .*/ -#define MODEM_SYSCON_CLK_BT_FO (BIT(18)) -#define MODEM_SYSCON_CLK_BT_FO_M (BIT(18)) -#define MODEM_SYSCON_CLK_BT_FO_V 0x1 -#define MODEM_SYSCON_CLK_BT_FO_S 18 -/* MODEM_SYSCON_CLK_FE_FO : R/W ;bitpos:[16] ;default: 1'b0 ; */ -/*description: .*/ +#define MODEM_SYSCON_CLK_CONF1_FORCE_ON_REG (DR_REG_MODEM_SYSCON_BASE + 0x14) +/* MODEM_SYSCON_CLK_FE_FO : R/W; bitpos: [16]; default: 0; */ +/* description: .*/ #define MODEM_SYSCON_CLK_FE_FO (BIT(16)) -#define MODEM_SYSCON_CLK_FE_FO_M (BIT(16)) -#define MODEM_SYSCON_CLK_FE_FO_V 0x1 +#define MODEM_SYSCON_CLK_FE_FO_M (MODEM_SYSCON_CLK_FE_FO_V << MODEM_SYSCON_CLK_FE_FO_S) +#define MODEM_SYSCON_CLK_FE_FO_V 0x00000001U #define MODEM_SYSCON_CLK_FE_FO_S 16 +/* MODEM_SYSCON_CLK_BT_FO : R/W; bitpos: [18]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_CLK_BT_FO (BIT(18)) +#define MODEM_SYSCON_CLK_BT_FO_M (MODEM_SYSCON_CLK_BT_FO_V << MODEM_SYSCON_CLK_BT_FO_S) +#define MODEM_SYSCON_CLK_BT_FO_V 0x00000001U +#define MODEM_SYSCON_CLK_BT_FO_S 18 -#define MODEM_SYSCON_MEM_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0x18) -/* MODEM_SYSCON_MODEM_MEM_RA : R/W ;bitpos:[7:6] ;default: 2'h0 ; */ -/*description: .*/ -#define MODEM_SYSCON_MODEM_MEM_RA 0x00000003 -#define MODEM_SYSCON_MODEM_MEM_RA_M ((MODEM_SYSCON_MODEM_MEM_RA_V)<<(MODEM_SYSCON_MODEM_MEM_RA_S)) -#define MODEM_SYSCON_MODEM_MEM_RA_V 0x3 -#define MODEM_SYSCON_MODEM_MEM_RA_S 6 -/* MODEM_SYSCON_MODEM_MEM_WA : R/W ;bitpos:[5:3] ;default: 3'h4 ; */ -/*description: .*/ -#define MODEM_SYSCON_MODEM_MEM_WA 0x00000007 -#define MODEM_SYSCON_MODEM_MEM_WA_M ((MODEM_SYSCON_MODEM_MEM_WA_V)<<(MODEM_SYSCON_MODEM_MEM_WA_S)) -#define MODEM_SYSCON_MODEM_MEM_WA_V 0x7 -#define MODEM_SYSCON_MODEM_MEM_WA_S 3 -/* MODEM_SYSCON_MODEM_MEM_WP : R/W ;bitpos:[2:0] ;default: 3'h0 ; */ -/*description: .*/ -#define MODEM_SYSCON_MODEM_MEM_WP 0x00000007 -#define MODEM_SYSCON_MODEM_MEM_WP_M ((MODEM_SYSCON_MODEM_MEM_WP_V)<<(MODEM_SYSCON_MODEM_MEM_WP_S)) -#define MODEM_SYSCON_MODEM_MEM_WP_V 0x7 +#define MODEM_SYSCON_MEM_CONF_REG (DR_REG_MODEM_SYSCON_BASE + 0x18) +/* MODEM_SYSCON_MODEM_MEM_WP : R/W; bitpos: [2:0]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_MODEM_MEM_WP 0x00000007U +#define MODEM_SYSCON_MODEM_MEM_WP_M (MODEM_SYSCON_MODEM_MEM_WP_V << MODEM_SYSCON_MODEM_MEM_WP_S) +#define MODEM_SYSCON_MODEM_MEM_WP_V 0x00000007U #define MODEM_SYSCON_MODEM_MEM_WP_S 0 +/* MODEM_SYSCON_MODEM_MEM_WA : R/W; bitpos: [5:3]; default: 4; */ +/* description: .*/ +#define MODEM_SYSCON_MODEM_MEM_WA 0x00000007U +#define MODEM_SYSCON_MODEM_MEM_WA_M (MODEM_SYSCON_MODEM_MEM_WA_V << MODEM_SYSCON_MODEM_MEM_WA_S) +#define MODEM_SYSCON_MODEM_MEM_WA_V 0x00000007U +#define MODEM_SYSCON_MODEM_MEM_WA_S 3 +/* MODEM_SYSCON_MODEM_MEM_RA : R/W; bitpos: [7:6]; default: 0; */ +/* description: .*/ +#define MODEM_SYSCON_MODEM_MEM_RA 0x00000003U +#define MODEM_SYSCON_MODEM_MEM_RA_M (MODEM_SYSCON_MODEM_MEM_RA_V << MODEM_SYSCON_MODEM_MEM_RA_S) +#define MODEM_SYSCON_MODEM_MEM_RA_V 0x00000003U +#define MODEM_SYSCON_MODEM_MEM_RA_S 6 -#define MODEM_SYSCON_DATE_REG (DR_REG_MODEM_SYSCON_BASE + 0x1C) -/* MODEM_SYSCON_DATE : R/W ;bitpos:[27:0] ;default: 28'h2208300 ; */ -/*description: .*/ -#define MODEM_SYSCON_DATE 0x0FFFFFFF -#define MODEM_SYSCON_DATE_M ((MODEM_SYSCON_DATE_V)<<(MODEM_SYSCON_DATE_S)) -#define MODEM_SYSCON_DATE_V 0xFFFFFFF +#define MODEM_SYSCON_DATE_REG (DR_REG_MODEM_SYSCON_BASE + 0x1c) +/* MODEM_SYSCON_DATE : R/W; bitpos: [27:0]; default: 35685120; */ +/* description: .*/ +#define MODEM_SYSCON_DATE 0x0FFFFFFFU +#define MODEM_SYSCON_DATE_M (MODEM_SYSCON_DATE_V << MODEM_SYSCON_DATE_S) +#define MODEM_SYSCON_DATE_V 0x0FFFFFFFU #define MODEM_SYSCON_DATE_S 0 #ifdef __cplusplus diff --git a/components/soc/esp32h2/include/modem/modem_syscon_struct.h b/components/soc/esp32h2/include/modem/modem_syscon_struct.h new file mode 100644 index 0000000000..99bd8a5ce6 --- /dev/null +++ b/components/soc/esp32h2/include/modem/modem_syscon_struct.h @@ -0,0 +1,140 @@ +/** + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#include +#ifdef __cplusplus +extern "C" { +#endif + +typedef union { + struct { + uint32_t clk_en:1; + uint32_t reserved_1:31; + }; + uint32_t val; +} modem_syscon_test_conf_reg_t; + +typedef union { + struct { + uint32_t reserved_0:21; + uint32_t clk_etm_en:1; + uint32_t clk_zb_apb_en:1; + uint32_t clk_zb_mac_en:1; + uint32_t clk_modem_sec_ecb_en:1; + uint32_t clk_modem_sec_ccm_en:1; + uint32_t clk_modem_sec_bah_en:1; + uint32_t clk_modem_sec_apb_en:1; + uint32_t clk_modem_sec_en:1; + uint32_t clk_ble_timer_apb_en:1; + uint32_t clk_ble_timer_en:1; + uint32_t clk_data_dump_en:1; + }; + uint32_t val; +} modem_syscon_clk_conf_reg_t; + +typedef union { + struct { + uint32_t reserved_0:22; + uint32_t clk_etm_fo:1; + uint32_t reserved_23:1; + uint32_t clk_zb_fo:1; + uint32_t reserved_25:4; + uint32_t clk_modem_sec_fo:1; + uint32_t clk_ble_timer_fo:1; + uint32_t clk_data_dump_fo:1; + }; + uint32_t val; +} modem_syscon_clk_conf_force_on_reg_t; + +typedef union { + struct { + uint32_t reserved_0:14; + uint32_t rst_fe:1; + uint32_t rst_btmac_apb:1; + uint32_t rst_btmac:1; + uint32_t rst_btbb_apb:1; + uint32_t rst_btbb:1; + uint32_t reserved_19:3; + uint32_t rst_etm:1; + uint32_t reserved_23:1; + uint32_t rst_zbmac:1; + uint32_t rst_modem_ecb:1; + uint32_t rst_modem_ccm:1; + uint32_t rst_modem_bah:1; + uint32_t reserved_28:1; + uint32_t rst_modem_sec:1; + uint32_t rst_ble_timer:1; + uint32_t rst_data_dump:1; + }; + uint32_t val; +} modem_syscon_modem_rst_conf_reg_t; + +typedef union { + struct { + uint32_t reserved_0:12; + uint32_t clk_fe_16m_en:1; + uint32_t clk_fe_32m_en:1; + uint32_t clk_fe_sdm_en:1; + uint32_t clk_fe_adc_en:1; + uint32_t clk_fe_apb_en:1; + uint32_t clk_bt_apb_en:1; + uint32_t clk_bt_en:1; + uint32_t reserved_19:13; + }; + uint32_t val; +} modem_syscon_clk_conf1_reg_t; + +typedef union { + struct { + uint32_t reserved_0:16; + uint32_t clk_fe_fo:1; + uint32_t reserved_17:1; + uint32_t clk_bt_fo:1; + uint32_t reserved_19:13; + }; + uint32_t val; +} modem_syscon_clk_conf1_force_on_reg_t; + +typedef union { + struct { + uint32_t modem_mem_wp:3; + uint32_t modem_mem_wa:3; + uint32_t modem_mem_ra:2; + uint32_t reserved_8:24; + }; + uint32_t val; +} modem_syscon_mem_conf_reg_t; + +typedef union { + struct { + uint32_t date:28; + uint32_t reserved_28:4; + }; + uint32_t val; +} modem_syscon_date_reg_t; + + +typedef struct { + volatile modem_syscon_test_conf_reg_t test_conf; + volatile modem_syscon_clk_conf_reg_t clk_conf; + volatile modem_syscon_clk_conf_force_on_reg_t clk_conf_force_on; + volatile modem_syscon_modem_rst_conf_reg_t modem_rst_conf; + volatile modem_syscon_clk_conf1_reg_t clk_conf1; + volatile modem_syscon_clk_conf1_force_on_reg_t clk_conf1_force_on; + volatile modem_syscon_mem_conf_reg_t mem_conf; + volatile modem_syscon_date_reg_t date; +} modem_syscon_dev_t; + +extern modem_syscon_dev_t MODEM_SYSCON; + +#ifndef __cplusplus +_Static_assert(sizeof(modem_syscon_dev_t) == 0x20, "Invalid size of modem_syscon_dev_t structure"); +#endif + +#ifdef __cplusplus +} +#endif