mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
freertos: FreeRTOS SMP RISC-V port cleanup and enable esp32c3 in KConfig
This commit does general cleanup of the risc-v port files and restricts FreeRTOS SMP config option to only esp32 and esp32c3.
This commit is contained in:
Sudeep Mohanty
parent
71eef9a9b0
commit
12e2312aaa
@ -17,54 +17,14 @@ This file get's pulled into assembly sources. Therefore, some includes need to b
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#include <assert.h> //For configASSERT()
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#endif /* def __ASSEMBLER__ */
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#if __XTENSA__
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/* Required for configuration-dependent settings. */
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#include "xtensa_config.h"
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/* -------------------------------------------- Xtensa Additional Config ----------------------------------------------
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* - Provide Xtensa definitions usually given by -D option when building with xt-make (see readme_xtensa.txt)
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* - xtensa_rtos.h and xtensa_timer.h will default some of these values
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* - XT_SIMULATOR configXT_SIMULATOR
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* - XT_BOARD configXT_BOARD
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* - XT_CLOCK_FREQ Should not be defined as we are using XT_BOARD mode
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* - XT_TICK_PER_SEC Defaults to configTICK_RATE_HZ
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* - XT_TIMER_INDEX Defaults to configXT_TIMER_INDEX
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* - XT_INTEXC_HOOKS Defaults to configXT_INTEXC_HOOKS
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* - XT_USE_OVLY We don't define this (unused)
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* - XT_USE_SWPRI We don't define this (unused)
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* ------------------------------------------------------------------------------------------------------------------ */
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#define configXT_SIMULATOR 0
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#define configXT_BOARD 1 /* Board mode */
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#if CONFIG_FREERTOS_CORETIMER_0
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#define configXT_TIMER_INDEX 0
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#elif CONFIG_FREERTOS_CORETIMER_1
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#define configXT_TIMER_INDEX 1
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#endif
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#define configXT_INTEXC_HOOKS 0
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#define configBENCHMARK 0
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#endif // __XTENSA__
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/* ------------------------------------------------ ESP-IDF Additions --------------------------------------------------
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*
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* ------------------------------------------------------------------------------------------------------------------ */
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#if __XTENSA__
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/* The Xtensa port uses a separate interrupt stack. Adjust the stack size
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* to suit the needs of your specific application.
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* Size needs to be aligned to the stack increment, since the location of
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* the stack for the 2nd CPU will be calculated using configISR_STACK_SIZE.
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*/
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#define configSTACK_ALIGNMENT 16
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#ifndef configISR_STACK_SIZE
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#define configISR_STACK_SIZE ((CONFIG_FREERTOS_ISR_STACKSIZE + configSTACK_ALIGNMENT - 1) & (~(configSTACK_ALIGNMENT - 1)))
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#endif
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#else // RISC-V
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#ifndef configISR_STACK_SIZE
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#define configISR_STACK_SIZE (CONFIG_FREERTOS_ISR_STACKSIZE)
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#endif
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#endif // __XTENSA__
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/* ----------------------------------------------------- Helpers -------------------------------------------------------
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* - Macros that the FreeRTOS configuration macros depend on
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* ------------------------------------------------------------------------------------------------------------------ */
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@ -188,6 +148,8 @@ This file get's pulled into assembly sources. Therefore, some includes need to b
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#endif // CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS
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#define configSTACK_DEPTH_TYPE uint32_t
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#define configUSE_NEWLIB_REENTRANT 1
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#define configNEWLIB_REENTRANT_IS_DYNAMIC 1 // IDF Newlib supports dynamic reentrancy.
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// We provide our own __getreent() function
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#define configENABLE_BACKWARD_COMPATIBILITY 0
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#define configASSERT(a) assert(a)
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#define configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H 1
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@ -49,11 +49,8 @@ typedef uint32_t TickType_t;
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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//TODO: Check this
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// interrupt module will mask interrupt with priority less than threshold
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#define RVHAL_EXCM_LEVEL 4
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// TODO: Check this end
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/* ----------------------------------------------- Port Configurations -------------------------------------------------
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* - Configurations values supplied by each port
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@ -67,127 +64,28 @@ typedef uint32_t TickType_t;
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#define portNOP() __asm volatile (" nop ")
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/* ---------------------------------------------- Forward Declarations -------------------------------------------------
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* - Forward declarations of all the port functions and macros need to implement the FreeRTOS porting interface
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* - Forward declarations of all the port functions and macros needed to implement the FreeRTOS porting interface
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* - These must come before definition/declaration of the FreeRTOS porting interface
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* ------------------------------------------------------------------------------------------------------------------ */
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/* ---------------------- Spinlocks ------------------------
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- Spinlocks added to match API with SMP FreeRTOS. Single core RISC-V does not need spin locks
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- Because single core does not have a primitive spinlock data type, we have to implement one here
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* @note [refactor-todo] Refactor critical section API so that this is no longer required
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* ------------------------------------------------------ */
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/**
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* @brief Spinlock object
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* Owner:
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* - Set to 0 if uninitialized
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* - Set to portMUX_FREE_VAL when free
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* - Set to CORE_ID_REGVAL_PRO or CORE_ID_REGVAL_AP when locked
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* - Any other value indicates corruption
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* Count:
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* - 0 if unlocked
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* - Recursive count if locked
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*
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* @note Not a true spinlock as single core RISC-V does not have atomic compare and set instruction
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* @note Keep portMUX_INITIALIZER_UNLOCKED in sync with this struct
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*/
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//typedef struct {
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// uint32_t owner;
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// uint32_t count;
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//} portMUX_TYPE;
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typedef spinlock_t portMUX_TYPE; /**< Spinlock type used by FreeRTOS critical sections */
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#if 0
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#define portMUX_INITIALIZER_UNLOCKED { \
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.owner = portMUX_FREE_VAL, \
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.count = 0, \
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}
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#define portMUX_FREE_VAL SPINLOCK_FREE /**< Spinlock is free. [refactor-todo] check if this is still required */
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#define portMUX_NO_TIMEOUT SPINLOCK_WAIT_FOREVER /**< When passed for 'timeout_cycles', spin forever if necessary. [refactor-todo] check if this is still required */
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#define portMUX_TRY_LOCK SPINLOCK_NO_WAIT /**< Try to acquire the spinlock a single time only. [refactor-todo] check if this is still required */
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#define portMUX_INITIALIZE(mux) ({ \
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(mux)->owner = portMUX_FREE_VAL; \
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(mux)->count = 0; \
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})
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#endif
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#define portMUX_INITIALIZER_UNLOCKED SPINLOCK_INITIALIZER /**< Spinlock initializer */
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#define portMUX_FREE_VAL SPINLOCK_FREE /**< Spinlock is free. [refactor-todo] check if this is still required */
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#define portMUX_NO_TIMEOUT SPINLOCK_WAIT_FOREVER /**< When passed for 'timeout_cycles', spin forever if necessary. [refactor-todo] check if this is still required */
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#define portMUX_TRY_LOCK SPINLOCK_NO_WAIT /**< Try to acquire the spinlock a single time only. [refactor-todo] check if this is still required */
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#define portMUX_INITIALIZE(mux) spinlock_initialize(mux) /*< Initialize a spinlock to its unlocked state */
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// ----------------------- Memory --------------------------
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// --------------------- Interrupts ------------------------
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BaseType_t xPortCheckIfInISR(void);
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// TODO: Check this
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#if 0
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/**
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* @brief Checks if the current core is in an ISR context
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*
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* - ISR context consist of Low/Mid priority ISR, or time tick ISR
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* - High priority ISRs aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
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*
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* @note [refactor-todo] Check if this should be inlined
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* @return
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* - pdTRUE if in ISR
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* - pdFALSE otherwise
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*/
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BaseType_t xPortInIsrContext(void);
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#endif
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// TODO: Check this end
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// TODO: Check this
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/**
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* @brief Check if in ISR context from High priority ISRs
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*
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* - Called from High priority ISR
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* - Checks if the previous context (before high priority interrupt) was in ISR context (meaning low/med priority)
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*
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* @note [refactor-todo] Check if this should be inlined
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* @return
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* - pdTRUE if in previous in ISR context
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* - pdFALSE otherwise
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*/
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BaseType_t xPortInterruptedFromISRContext(void);
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// TODO: Check this end
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// TODO: Check this
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/* ---------------------- Spinlocks ------------------------*/
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/**
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* @brief Wrapper for atomic compare-and-set instruction
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*
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* @note Isn't a real atomic CAS.
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* @note [refactor-todo] check if we still need this
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* @note [refactor-todo] Check if this function should be renamed (due to void return type)
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*
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* @param[inout] addr Pointer to target address
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* @param[in] compare Compare value
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* @param[inout] set Pointer to set value
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*/
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static inline void __attribute__((always_inline)) uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
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/**
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* @brief Wrapper for atomic compare-and-set instruction in external RAM
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*
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* @note Isn't a real atomic CAS.
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* @note [refactor-todo] check if we still need this
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* @note [refactor-todo] Check if this function should be renamed (due to void return type)
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*
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* @param[inout] addr Pointer to target address
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* @param[in] compare Compare value
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* @param[inout] set Pointer to set value
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*/
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static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
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// TODO: Check this end
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// ------------------ Critical Sections --------------------
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UBaseType_t uxPortEnterCriticalFromISR( void );
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void vPortExitCriticalFromISR( UBaseType_t level );
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/*
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These are always called with interrupts already disabled. We simply need to get/release the spinlocks
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*/
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@ -198,55 +96,24 @@ extern portMUX_TYPE port_xISRLock;
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void vPortTakeLock( portMUX_TYPE *lock );
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void vPortReleaseLock( portMUX_TYPE *lock );
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/**
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* @brief Enter a critical section
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*
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* - Simply disable interrupts
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* - Can be nested
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*/
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void vPortEnterCritical(void);
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/**
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* @brief Exit a critical section
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*
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* - Reenables interrupts
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* - Can be nested
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*/
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void vPortExitCritical(void);
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// ---------------------- Yielding -------------------------
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void vPortYield( void );
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static inline void __attribute__((always_inline)) vPortYieldCore( BaseType_t xCoreID );
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// TODO: Check this
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//static inline void __attribute__((always_inline)) vPortYieldFromISR( void );
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// TODO: Check this end
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/**
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* @brief Set interrupt mask and return current interrupt enable register
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*
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* @note [refactor-todo] Check if this function should be renamed (due to int return type)
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* @return int Current interrupt enable register before set
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* @return UBaseType_t Current interrupt enable register before set
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*/
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int vPortSetInterruptMask(void);
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UBaseType_t ulPortSetInterruptMask(void);
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/**
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* @brief Clear current interrupt mask and set given mask
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*
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* @param mask Interrupt mask
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*/
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void vPortClearInterruptMask(int mask);
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// TODO: Check this
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#if 0
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/**
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* @brief Perform a context switch from a task
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*
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* @note [refactor-todo] The rest of ESP-IDF should call taskYield() instead
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*/
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void vPortYield(void);
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#endif
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// TODO: Check this end
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void vPortClearInterruptMask(UBaseType_t mask);
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/**
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* @brief Perform a context switch from an ISR
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@ -260,31 +127,6 @@ void vPortYieldFromISR(void);
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})
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#define portYIELD_FROM_ISR_NO_CHECK() vPortYieldFromISR()
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// TODO: Check this
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#if 0
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/**
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* @brief Yields the other core
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*
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* @note Added to be compatible with SMP API
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* @note [refactor-todo] Put this into private macros as its only called from task.c and is not public API
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* @param coreid ID of core to yield
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*/
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void vPortYieldOtherCore(BaseType_t coreid);
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/**
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* @brief Checks if the current core can yield
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*
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* - A core cannot yield if its in an ISR or in a critical section
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*
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* @note [refactor-todo] See if this can be separated from port macro
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* @note [refactor-todo] Check if this function should be renamed (due to bool return type)
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* @return true Core can yield
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* @return false Core cannot yield
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*/
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static inline bool xPortCanYield(void);
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#endif
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// TODO: Check this end
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// ----------------------- System --------------------------
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static inline BaseType_t __attribute__((always_inline)) xPortGetCoreID( void );
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@ -293,87 +135,15 @@ static inline BaseType_t __attribute__((always_inline)) xPortGetCoreID( void );
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void vPortCleanUpTCB ( void *pxTCB );
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// TODO: Check this
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#if 0
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// ------------------- Hook Functions ----------------------
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/**
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* @brief Hook function called on entry to tickless idle
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*
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* - Implemented in pm_impl.c
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*
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* @param xExpectedIdleTime Expected idle time
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*/
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void vApplicationSleep(TickType_t xExpectedIdleTime);
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#endif
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// TODO: Check this end
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// TODO: Check this
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#if 0
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// ----------------------- System --------------------------
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/**
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* @brief Get the tick rate per second
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*
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* @note [refactor-todo] make this inline
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* @note [refactor-todo] Check if this function should be renamed (due to uint return type)
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* @return uint32_t Tick rate in Hz
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*/
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uint32_t xPortGetTickRateHz(void);
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/**
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* @brief Set a watchpoint to watch the last 32 bytes of the stack
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*
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* Callback to set a watchpoint on the end of the stack. Called every context switch to change the stack watchpoint
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* around.
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*
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* @param pxStackStart Pointer to the start of the stack
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*/
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void vPortSetStackWatchpoint(void *pxStackStart);
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/**
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* @brief Get the current core's ID
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*
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* @note Added to be compatible with SMP API
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* @note [refactor-todo] IDF should call a FreeRTOS like macro instead of port function directly
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* @return BaseType_t Core ID
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*/
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static inline BaseType_t IRAM_ATTR xPortGetCoreID(void)
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{
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return (BaseType_t) cpu_hal_get_core_id();
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}
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#endif
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// TODO: Check this end
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/* ------------------------------------------- FreeRTOS Porting Interface ----------------------------------------------
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* - Contains all the mappings of the macros required by FreeRTOS
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* - Most come after forward declare as porting macros map to declared functions
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* - Maps to forward declared functions
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* ------------------------------------------------------------------------------------------------------------------ */
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// ----------------------- Memory --------------------------
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// TODO: Check this
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#if 0
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/**
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* @brief Task memory allocation macros
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*
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* @note Because the ROM routines don't necessarily handle a stack in external RAM correctly, we force the stack
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* memory to always be internal.
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* @note [refactor-todo] Update portable.h to match v10.4.3 to use new malloc prototypes
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*/
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#define portTcbMemoryCaps (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
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#define portStackMemoryCaps (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
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#define pvPortMallocTcbMem(size) pvPortMalloc(size)
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#define pvPortMallocStackMem(size) pvPortMalloc(size)
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#endif
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// TODO: Check this end
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// --------------------- Interrupts ------------------------
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#define portDISABLE_INTERRUPTS() vPortSetInterruptMask()
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#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
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#define portENABLE_INTERRUPTS() vPortClearInterruptMask(1)
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#define portRESTORE_INTERRUPTS(x) vPortClearInterruptMask(x)
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@ -420,51 +190,11 @@ extern void vTaskExitCritical( void );
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#endif
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#define portYIELD_CORE(x) vPortYieldCore(x)
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// TODO: Check this
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#if 0
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#define portYIELD_FROM_ISR_NO_ARG() vPortYieldFromISR()
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#define portYIELD_FROM_ISR_ARG(xHigherPriorityTaskWoken) ({ \
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if (xHigherPriorityTaskWoken == pdTRUE) { \
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vPortYieldFromISR(); \
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} \
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})
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/**
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* @note The macro below could be used when passing a single argument, or without any argument,
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* it was developed to support both usages of portYIELD inside of an ISR. Any other usage form
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* might result in undesired behavior
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*/
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#if defined(__cplusplus) && (__cplusplus > 201703L)
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#define portYIELD_FROM_ISR(...) CHOOSE_MACRO_VA_ARG(portYIELD_FROM_ISR_ARG, portYIELD_FROM_ISR_NO_ARG __VA_OPT__(,) __VA_ARGS__)(__VA_ARGS__)
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#else
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#define portYIELD_FROM_ISR(...) CHOOSE_MACRO_VA_ARG(portYIELD_FROM_ISR_ARG, portYIELD_FROM_ISR_NO_ARG, ##__VA_ARGS__)(__VA_ARGS__)
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#endif
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#define portEND_SWITCHING_ISR(xSwitchRequired) if(xSwitchRequired) vPortYield()
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/* Yielding within an API call (when interrupts are off), means the yield should be delayed
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until interrupts are re-enabled.
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To do this, we use the "cross-core" interrupt as a trigger to yield on this core when interrupts are re-enabled.This
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is the same interrupt & code path which is used to trigger a yield between CPUs, although in this case the yield is
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happening on the same CPU.
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*/
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#define portYIELD_WITHIN_API() portYIELD()
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#endif
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// TODO: Check this end
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//
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// ----------------------- System --------------------------
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#define portGET_CORE_ID() xPortGetCoreID()
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#define portCHECK_IF_IN_ISR() xPortCheckIfInISR()
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// TODO: Check this
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#if 0
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// ------------------- Hook Functions ----------------------
|
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#define portSUPPRESS_TICKS_AND_SLEEP(idleTime) vApplicationSleep(idleTime)
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#endif
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// TODO: Check this end
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// ------------------- Run Time Stats ----------------------
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#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
|
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@ -484,10 +214,6 @@ extern void vTaskExitCritical( void );
|
||||
* - For implementation of non-inlined functions, see port.c, port_common.c, or other assembly files
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
// --------------------- Interrupts ------------------------
|
||||
|
||||
// ------------------ Critical Sections --------------------
|
||||
|
||||
// ---------------------- Yielding -------------------------
|
||||
|
||||
static inline void __attribute__((always_inline)) vPortYieldCore( BaseType_t xCoreID )
|
||||
@ -495,20 +221,6 @@ static inline void __attribute__((always_inline)) vPortYieldCore( BaseType_t xCo
|
||||
esp_crosscore_int_send_yield( xCoreID );
|
||||
}
|
||||
|
||||
// TODO: Check this
|
||||
#if 0
|
||||
static inline bool IRAM_ATTR xPortCanYield(void)
|
||||
{
|
||||
uint32_t threshold = REG_READ(INTERRUPT_CORE0_CPU_INT_THRESH_REG);
|
||||
/* when enter critical code, FreeRTOS will mask threshold to RVHAL_EXCM_LEVEL
|
||||
* and exit critical code, will recover threshold value (1). so threshold <= 1
|
||||
* means not in critical code
|
||||
*/
|
||||
return (threshold <= 1);
|
||||
}
|
||||
#endif
|
||||
// TODO: Check this end
|
||||
|
||||
// ----------------------- System --------------------------
|
||||
|
||||
static inline BaseType_t __attribute__((always_inline)) xPortGetCoreID( void )
|
||||
@ -520,8 +232,6 @@ static inline BaseType_t __attribute__((always_inline)) xPortGetCoreID( void )
|
||||
* - These macros and functions need to be defined for IDF to compile
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
// --------------------- Interrupts ------------------------
|
||||
|
||||
static inline BaseType_t xPortInIsrContext(void)
|
||||
{
|
||||
//Just call the FreeRTOS port interface version
|
||||
@ -530,11 +240,33 @@ static inline BaseType_t xPortInIsrContext(void)
|
||||
|
||||
// ---------------------- Spinlocks ------------------------
|
||||
|
||||
/**
|
||||
* @brief Wrapper for atomic compare-and-set instruction
|
||||
*
|
||||
* @note Isn't a real atomic CAS.
|
||||
* @note [refactor-todo] check if we still need this
|
||||
* @note [refactor-todo] Check if this function should be renamed (due to void return type)
|
||||
*
|
||||
* @param[inout] addr Pointer to target address
|
||||
* @param[in] compare Compare value
|
||||
* @param[inout] set Pointer to set value
|
||||
*/
|
||||
static inline void __attribute__((always_inline)) uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
|
||||
{
|
||||
compare_and_set_native(addr, compare, set);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Wrapper for atomic compare-and-set instruction in external RAM
|
||||
*
|
||||
* @note Isn't a real atomic CAS.
|
||||
* @note [refactor-todo] check if we still need this
|
||||
* @note [refactor-todo] Check if this function should be renamed (due to void return type)
|
||||
*
|
||||
* @param[inout] addr Pointer to target address
|
||||
* @param[in] compare Compare value
|
||||
* @param[inout] set Pointer to set value
|
||||
*/
|
||||
static inline void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
|
||||
{
|
||||
#if defined(CONFIG_SPIRAM)
|
||||
@ -606,7 +338,7 @@ extern int xPortSwitchFlag;
|
||||
// --------------------- Debugging -------------------------
|
||||
|
||||
#if CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION
|
||||
#define UNTESTED_FUNCTION() { esp_rom_printf("Untested FreeRTOS function %s\r\n", __FUNCTION__); configASSERT(false); } while(0)
|
||||
#define UNTESTED_FUNCTION() do{ esp_rom_printf("Untested FreeRTOS function %s\r\n", __FUNCTION__); configASSERT(false); } while(0)
|
||||
#else
|
||||
#define UNTESTED_FUNCTION()
|
||||
#endif
|
||||
|
||||
@ -46,10 +46,10 @@
|
||||
static const char *TAG = "cpu_start"; // [refactor-todo]: might be appropriate to change in the future, but
|
||||
|
||||
BaseType_t uxSchedulerRunning = 0;
|
||||
UBaseType_t uxInterruptNesting = 0;
|
||||
volatile UBaseType_t uxInterruptNesting = 0;
|
||||
portMUX_TYPE port_xTaskLock = portMUX_INITIALIZER_UNLOCKED;
|
||||
portMUX_TYPE port_xISRLock = portMUX_INITIALIZER_UNLOCKED;
|
||||
BaseType_t xPortSwitchFlag = 0;
|
||||
volatile BaseType_t xPortSwitchFlag = 0;
|
||||
__attribute__((aligned(16))) static StackType_t xIsrStack[configISR_STACK_SIZE];
|
||||
StackType_t *xIsrStackTop = &xIsrStack[0] + (configISR_STACK_SIZE & (~((portPOINTER_SIZE_TYPE)portBYTE_ALIGNMENT_MASK)));
|
||||
|
||||
@ -61,26 +61,32 @@ static UBaseType_t port_uxCriticalOldInterruptStateIDF = 0;
|
||||
* - These need to be defined for IDF to compile
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
// --------------------- Interrupts ------------------------
|
||||
|
||||
BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void)
|
||||
{
|
||||
/* For single core, this can be the same as xPortCheckIfInISR() because reading it is atomic */
|
||||
return uxInterruptNesting;
|
||||
}
|
||||
|
||||
// ------------------ Critical Sections --------------------
|
||||
|
||||
// ----------------------- System --------------------------
|
||||
|
||||
// TODO: Check this
|
||||
#if 0
|
||||
uint32_t xPortGetTickRateHz(void)
|
||||
void vPortEnterCriticalIDF(void)
|
||||
{
|
||||
return (uint32_t)configTICK_RATE_HZ;
|
||||
// Save current interrupt threshold and disable interrupts
|
||||
UBaseType_t old_thresh = ulPortSetInterruptMask();
|
||||
// Update the IDF critical nesting count
|
||||
port_uxCriticalNestingIDF++;
|
||||
if (port_uxCriticalNestingIDF == 1) {
|
||||
// Save a copy of the old interrupt threshold
|
||||
port_uxCriticalOldInterruptStateIDF = (UBaseType_t) old_thresh;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
// TODO: Check this end
|
||||
|
||||
void vPortExitCriticalIDF(void)
|
||||
{
|
||||
if (port_uxCriticalNestingIDF > 0) {
|
||||
port_uxCriticalNestingIDF--;
|
||||
if (port_uxCriticalNestingIDF == 0) {
|
||||
// Restore the saved interrupt threshold
|
||||
vPortClearInterruptMask((int)port_uxCriticalOldInterruptStateIDF);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// ----------------------- System --------------------------
|
||||
|
||||
#define STACK_WATCH_AREA_SIZE 32
|
||||
#define STACK_WATCH_POINT_NUMBER (SOC_CPU_WATCHPOINTS_NUM - 1)
|
||||
@ -282,6 +288,50 @@ void esp_startup_start_app(void)
|
||||
|
||||
// --------------------- Interrupts ------------------------
|
||||
|
||||
UBaseType_t ulPortSetInterruptMask(void)
|
||||
{
|
||||
int ret;
|
||||
unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
|
||||
ret = REG_READ(INTERRUPT_CORE0_CPU_INT_THRESH_REG);
|
||||
REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, RVHAL_EXCM_LEVEL);
|
||||
RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
|
||||
/**
|
||||
* In theory, this function should not return immediately as there is a
|
||||
* delay between the moment we mask the interrupt threshold register and
|
||||
* the moment a potential lower-priority interrupt is triggered (as said
|
||||
* above), it should have a delay of 2 machine cycles/instructions.
|
||||
*
|
||||
* However, in practice, this function has an epilogue of one instruction,
|
||||
* thus the instruction masking the interrupt threshold register is
|
||||
* followed by two instructions: `ret` and `csrrs` (RV_SET_CSR).
|
||||
* That's why we don't need any additional nop instructions here.
|
||||
*/
|
||||
return ret;
|
||||
}
|
||||
|
||||
void vPortClearInterruptMask(UBaseType_t mask)
|
||||
{
|
||||
REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, mask);
|
||||
/**
|
||||
* The delay between the moment we unmask the interrupt threshold register
|
||||
* and the moment the potential requested interrupt is triggered is not
|
||||
* null: up to three machine cycles/instructions can be executed.
|
||||
*
|
||||
* When compilation size optimization is enabled, this function and its
|
||||
* callers returning void will have NO epilogue, thus the instruction
|
||||
* following these calls will be executed.
|
||||
*
|
||||
* If the requested interrupt is a context switch to a higher priority
|
||||
* task then the one currently running, we MUST NOT execute any instruction
|
||||
* before the interrupt effectively happens.
|
||||
* In order to prevent this, force this routine to have a 3-instruction
|
||||
* delay before exiting.
|
||||
*/
|
||||
asm volatile ( "nop" );
|
||||
asm volatile ( "nop" );
|
||||
asm volatile ( "nop" );
|
||||
}
|
||||
|
||||
BaseType_t xPortCheckIfInISR(void)
|
||||
{
|
||||
return uxInterruptNesting;
|
||||
@ -289,19 +339,45 @@ BaseType_t xPortCheckIfInISR(void)
|
||||
|
||||
// ------------------ Critical Sections --------------------
|
||||
|
||||
void vPortTakeLock( portMUX_TYPE *lock )
|
||||
void IRAM_ATTR vPortTakeLock( portMUX_TYPE *lock )
|
||||
{
|
||||
spinlock_acquire( lock, portMUX_NO_TIMEOUT);
|
||||
}
|
||||
|
||||
void vPortReleaseLock( portMUX_TYPE *lock )
|
||||
void IRAM_ATTR vPortReleaseLock( portMUX_TYPE *lock )
|
||||
{
|
||||
spinlock_release( lock );
|
||||
}
|
||||
|
||||
// ---------------------- Yielding -------------------------
|
||||
|
||||
// ----------------------- System --------------------------
|
||||
void vPortYield(void)
|
||||
{
|
||||
if (uxInterruptNesting) {
|
||||
vPortYieldFromISR();
|
||||
} else {
|
||||
|
||||
esp_crosscore_int_send_yield(0);
|
||||
/* There are 3-4 instructions of latency between triggering the software
|
||||
interrupt and the CPU interrupt happening. Make sure it happened before
|
||||
we return, otherwise vTaskDelay() may return and execute 1-2
|
||||
instructions before the delay actually happens.
|
||||
|
||||
(We could use the WFI instruction here, but there is a chance that
|
||||
the interrupt will happen while evaluating the other two conditions
|
||||
for an instant yield, and if that happens then the WFI would be
|
||||
waiting for the next interrupt to occur...)
|
||||
*/
|
||||
while (uxSchedulerRunning && REG_READ(SYSTEM_CPU_INTR_FROM_CPU_0_REG) != 0) {}
|
||||
}
|
||||
}
|
||||
|
||||
void vPortYieldFromISR( void )
|
||||
{
|
||||
//traceISR_EXIT_TO_SCHEDULER();
|
||||
uxSchedulerRunning = 1;
|
||||
xPortSwitchFlag = 1;
|
||||
}
|
||||
|
||||
/* ------------------------------------------------ FreeRTOS Portable --------------------------------------------------
|
||||
* - Provides implementation for functions required by FreeRTOS
|
||||
@ -507,8 +583,6 @@ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxC
|
||||
return (StackType_t *)frame;
|
||||
}
|
||||
|
||||
// -------------------- Co-Processor -----------------------
|
||||
|
||||
// ------- Thread Local Storage Pointers Deletion Callbacks -------
|
||||
|
||||
#if ( CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS )
|
||||
@ -617,111 +691,3 @@ void vPortCleanUpTCB ( void *pxTCB )
|
||||
vPortTLSPointersDelCb( pxTCB );
|
||||
#endif /* CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS */
|
||||
}
|
||||
|
||||
/* ---------------------------------------------- Port Implementations -------------------------------------------------
|
||||
*
|
||||
* ------------------------------------------------------------------------------------------------------------------ */
|
||||
|
||||
// ------------------ Critical Sections --------------------
|
||||
|
||||
void vPortEnterCriticalIDF(void)
|
||||
{
|
||||
// Save current interrupt threshold and disable interrupts
|
||||
int old_thresh = vPortSetInterruptMask();
|
||||
// Update the IDF critical nesting count
|
||||
port_uxCriticalNestingIDF++;
|
||||
if (port_uxCriticalNestingIDF == 1) {
|
||||
// Save a copy of the old interrupt threshold
|
||||
port_uxCriticalOldInterruptStateIDF = (UBaseType_t) old_thresh;
|
||||
}
|
||||
}
|
||||
|
||||
void vPortExitCriticalIDF(void)
|
||||
{
|
||||
if (port_uxCriticalNestingIDF > 0) {
|
||||
port_uxCriticalNestingIDF--;
|
||||
if (port_uxCriticalNestingIDF == 0) {
|
||||
// Restore the saved interrupt threshold
|
||||
vPortClearInterruptMask((int)port_uxCriticalOldInterruptStateIDF);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// ---------------------- Yielding -------------------------
|
||||
|
||||
int vPortSetInterruptMask(void)
|
||||
{
|
||||
int ret;
|
||||
unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
|
||||
ret = REG_READ(INTERRUPT_CORE0_CPU_INT_THRESH_REG);
|
||||
REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, RVHAL_EXCM_LEVEL);
|
||||
RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
|
||||
/**
|
||||
* In theory, this function should not return immediately as there is a
|
||||
* delay between the moment we mask the interrupt threshold register and
|
||||
* the moment a potential lower-priority interrupt is triggered (as said
|
||||
* above), it should have a delay of 2 machine cycles/instructions.
|
||||
*
|
||||
* However, in practice, this function has an epilogue of one instruction,
|
||||
* thus the instruction masking the interrupt threshold register is
|
||||
* followed by two instructions: `ret` and `csrrs` (RV_SET_CSR).
|
||||
* That's why we don't need any additional nop instructions here.
|
||||
*/
|
||||
return ret;
|
||||
}
|
||||
|
||||
void vPortClearInterruptMask(int mask)
|
||||
{
|
||||
REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, mask);
|
||||
/**
|
||||
* The delay between the moment we unmask the interrupt threshold register
|
||||
* and the moment the potential requested interrupt is triggered is not
|
||||
* null: up to three machine cycles/instructions can be executed.
|
||||
*
|
||||
* When compilation size optimization is enabled, this function and its
|
||||
* callers returning void will have NO epilogue, thus the instruction
|
||||
* following these calls will be executed.
|
||||
*
|
||||
* If the requested interrupt is a context switch to a higher priority
|
||||
* task then the one currently running, we MUST NOT execute any instruction
|
||||
* before the interrupt effectively happens.
|
||||
* In order to prevent this, force this routine to have a 3-instruction
|
||||
* delay before exiting.
|
||||
*/
|
||||
asm volatile ( "nop" );
|
||||
asm volatile ( "nop" );
|
||||
asm volatile ( "nop" );
|
||||
}
|
||||
|
||||
void vPortYield(void)
|
||||
{
|
||||
if (uxInterruptNesting) {
|
||||
vPortYieldFromISR();
|
||||
} else {
|
||||
|
||||
esp_crosscore_int_send_yield(0);
|
||||
/* There are 3-4 instructions of latency between triggering the software
|
||||
interrupt and the CPU interrupt happening. Make sure it happened before
|
||||
we return, otherwise vTaskDelay() may return and execute 1-2
|
||||
instructions before the delay actually happens.
|
||||
|
||||
(We could use the WFI instruction here, but there is a chance that
|
||||
the interrupt will happen while evaluating the other two conditions
|
||||
for an instant yield, and if that happens then the WFI would be
|
||||
waiting for the next interrupt to occur...)
|
||||
*/
|
||||
while (uxSchedulerRunning && REG_READ(SYSTEM_CPU_INTR_FROM_CPU_0_REG) != 0) {}
|
||||
}
|
||||
}
|
||||
|
||||
void vPortYieldFromISR( void )
|
||||
{
|
||||
//traceISR_EXIT_TO_SCHEDULER();
|
||||
uxSchedulerRunning = 1;
|
||||
xPortSwitchFlag = 1;
|
||||
}
|
||||
|
||||
void vPortYieldOtherCore(BaseType_t coreid)
|
||||
{
|
||||
esp_crosscore_int_send_yield(coreid);
|
||||
}
|
||||
|
||||
@ -507,7 +507,7 @@ extern int xPortSwitchFlag;
|
||||
// --------------------- Debugging -------------------------
|
||||
|
||||
#if CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION
|
||||
#define UNTESTED_FUNCTION() { esp_rom_printf("Untested FreeRTOS function %s\r\n", __FUNCTION__); configASSERT(false); } while(0)
|
||||
#define UNTESTED_FUNCTION() do{ esp_rom_printf("Untested FreeRTOS function %s\r\n", __FUNCTION__); configASSERT(false); } while(0)
|
||||
#else
|
||||
#define UNTESTED_FUNCTION()
|
||||
#endif
|
||||
|
||||
@ -760,7 +760,7 @@ extern uint32_t port_switch_flag[];
|
||||
// --------------------- Debugging -------------------------
|
||||
|
||||
#if CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION
|
||||
#define UNTESTED_FUNCTION() { esp_rom_printf("Untested FreeRTOS function %s\r\n", __FUNCTION__); configASSERT(false); } while(0)
|
||||
#define UNTESTED_FUNCTION() do{ esp_rom_printf("Untested FreeRTOS function %s\r\n", __FUNCTION__); configASSERT(false); } while(0)
|
||||
#else
|
||||
#define UNTESTED_FUNCTION()
|
||||
#endif
|
||||
|
||||
@ -5,6 +5,7 @@ menu "FreeRTOS"
|
||||
|
||||
config FREERTOS_SMP
|
||||
bool "Run the SMP FreeRTOS kernel instead (FEATURE UNDER DEVELOPMENT)"
|
||||
depends on IDF_TARGET_ESP32 || IDF_TARGET_ESP32C3
|
||||
default "n"
|
||||
help
|
||||
This will cause the FreeRTOS component to compile with the SMP FreeRTOS kernel instead.
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user