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https://github.com/espressif/esp-idf.git
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Merge branch 'feature/s3_default_2_config' into 'master'
CI: add S3 default_2 unit test config See merge request espressif/esp-idf!14279
This commit is contained in:
commit
126c6405f1
@ -687,7 +687,7 @@ UT_C3_FLASH_SUSPEND:
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UT_S3:
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extends: .unit_test_esp32s3_template
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parallel: 20
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parallel: 25
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tags:
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- ESP32S3_IDF
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- UT_T1_1
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@ -51,8 +51,6 @@ SECTIONS
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* data/rodata, including from any source file
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* named rtc_wake_stub*.c and the data marked with
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* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
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* The memory location of the data is dependent on
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* CONFIG_ESP32C3_RTCDATA_IN_FAST_MEM option.
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*/
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.rtc.data :
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{
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@ -81,7 +79,6 @@ SECTIONS
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* and will be retained during deep sleep.
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* User data marked with RTC_NOINIT_ATTR will be placed
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* into this section. See the file "esp_attr.h" for more information.
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* The memory location of the data is dependent on CONFIG_ESP32C3_RTCDATA_IN_FAST_MEM option.
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*/
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.rtc_noinit (NOLOAD):
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{
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@ -101,9 +101,9 @@ _heap_end = 0x40000000;
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_data_seg_org = ORIGIN(rtc_data_seg);
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#if CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM
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REGION_ALIAS("rtc_data_location", rtc_slow_seg );
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#else
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REGION_ALIAS("rtc_data_location", rtc_data_seg );
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#else
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REGION_ALIAS("rtc_data_location", rtc_slow_seg );
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#endif // CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM
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#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
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@ -327,7 +327,7 @@ SECTIONS
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/* C++ constructor and destructor tables */
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/* Don't include anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt */
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__init_array_start = ABSOLUTE(.);
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KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors .ctors.*))
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KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors SORT(.ctors.*)))
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__init_array_end = ABSOLUTE(.);
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KEEP (*crtbegin.*(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
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@ -315,8 +315,6 @@ TEST_CASE("Test starting 'External 32kHz XTAL' on the board without it.", "[rtc_
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#endif
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static RTC_NOINIT_ATTR int64_t start = 0;
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TEST_CASE("Test rtc clk calibration compensation", "[rtc_clk]")
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{
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int64_t t1 = esp_rtc_get_time_us();
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@ -344,6 +342,11 @@ TEST_CASE("Test rtc clk calibration compensation", "[rtc_clk]")
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TEST_ASSERT_GREATER_THAN(t1, t2);
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}
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
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/* Disabled until deep sleep is brought up TODO ESP32-S3 IDF-2691 */
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static RTC_NOINIT_ATTR int64_t start = 0;
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static void trigger_deepsleep(void)
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{
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printf("Trigger deep sleep. Waiting for 10 sec ...\n");
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@ -392,3 +395,5 @@ static void check_time_deepsleep_2(void)
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}
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TEST_CASE_MULTIPLE_STAGES("Test rtc clk calibration compensation across deep sleep", "[rtc_clk][reset=DEEPSLEEP_RESET, DEEPSLEEP_RESET]", trigger_deepsleep, check_time_deepsleep_1, check_time_deepsleep_2);
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#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
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@ -31,6 +31,10 @@
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#define TEST_LCD_DISP_EN_GPIO (-1)
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#if SOC_LCD_RGB_SUPPORTED
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
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/* Not enough memory for framebuffer when running in default_2 config TODO IDF-3565 */
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TEST_CASE("lcd rgb lcd panel", "[lcd]")
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{
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#define TEST_IMG_SIZE (100 * 100 * sizeof(uint16_t))
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@ -161,4 +165,7 @@ TEST_CASE("lvgl gui with rgb interface", "[lcd][lvgl][ignore]")
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test_lvgl_task_loop(panel_handle, TEST_LCD_H_RES, TEST_LCD_V_RES, &disp);
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}
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#endif // CONFIG_LV_USE_USER_DATA
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
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#endif // SOC_LCD_RGB_SUPPORTED
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@ -23,8 +23,8 @@
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#define EVENT_HANDLER_FLAG_DO_NOT_AUTO_RECONNECT 0x00000001
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
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/* TODO ESP32-S2 IDF-2618, TODO ESP32-C3 IDF-2618 */
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
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/* TODO IDF-2618 */
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static const char* TAG = "test_wifi";
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static uint32_t wifi_event_handler_flag;
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@ -343,4 +343,4 @@ static void test_wifi_connection_softap(void)
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TEST_CASE_MULTIPLE_DEVICES("test wifi retain connection for 60s", "[wifi][test_env=UT_T2_1][timeout=90]", test_wifi_connection_sta, test_wifi_connection_softap);
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
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@ -33,11 +33,12 @@
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#include "esp_rom_gpio.h"
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#include "test_utils.h"
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#define WITH_SD_TEST (SOC_SDMMC_HOST_SUPPORTED)
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//Currently no runners for S2 and C3
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#define WITH_SDSPI_TEST (!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3))
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// Currently no runners for S3
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#define WITH_SD_TEST (SOC_SDMMC_HOST_SUPPORTED && !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3))
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//Currently no runners for S2, S3 and C3
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#define WITH_SDSPI_TEST (!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3))
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// Can't test eMMC (slot 0) and PSRAM together
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#define WITH_EMMC_TEST (SOC_SDMMC_HOST_SUPPORTED && !CONFIG_SPIRAM)
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#define WITH_EMMC_TEST (SOC_SDMMC_HOST_SUPPORTED && !CONFIG_SPIRAM && !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3))
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/* power supply enable pin */
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#define SD_TEST_BOARD_VSEL_EN_GPIO 27
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@ -32,7 +32,8 @@
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#define TEST_LISTEN_CHANNEL 6
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
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/* No runners */
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
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static const char *TAG = "test_offchan";
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esp_netif_t *wifi_netif;
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@ -242,4 +243,4 @@ static void test_wifi_roc(void)
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TEST_CASE_MULTIPLE_DEVICES("test ROC and Offchannel Action Frame Tx", "[Offchan][test_env=UT_T2_1][timeout=90]", test_wifi_roc, test_wifi_offchan_tx);
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
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3
tools/unit-test-app/configs/default_2_s3
Normal file
3
tools/unit-test-app/configs/default_2_s3
Normal file
@ -0,0 +1,3 @@
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# This config is split between targets since different component needs to be excluded (esp32, esp32s2)
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CONFIG_IDF_TARGET="esp32s3"
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TEST_EXCLUDE_COMPONENTS=libsodium bt app_update freertos esp32s3 esp_ipc esp_pm esp_system esp_timer driver heap pthread soc spi_flash vfs experimental_cpp_component esp-tls test_utils
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