fix(ci): enable gpio, uart target tests on esp32p4

components/esp_driver_gpio/test_apps/.build-test-rules.yml

@@ -1,14 +1,6 @@
 # Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
 
 components/esp_driver_gpio/test_apps:
-  disable:
-    - if: IDF_TARGET in ["esp32c61"]
-      temporary: true
-      reason: not support yet # TODO: [esp32c61] IDF-9877
-  disable_test:
-    - if: IDF_TARGET in ["esp32p4"]
-      temporary: true
-      reason: test not pass, should be re-enable # TODO: [ESP32P4] IDF-8968
   depends_components:
     - esp_driver_gpio
 

components/esp_driver_gpio/test_apps/gpio/README.md

@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- | -------- |

components/esp_driver_gpio/test_apps/gpio/main/test_rtcio.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -122,7 +122,7 @@ const int s_test_map[TEST_GPIO_PIN_COUNT] = {
 #elif CONFIG_IDF_TARGET_ESP32P4
 // Has no input-only rtcio pins, all pins support pull-up/down
 #define RTCIO_SUPPORT_PU_PD(num)    1
-#define TEST_GPIO_PIN_COUNT 16
+#define TEST_GPIO_PIN_COUNT 14
 const int s_test_map[TEST_GPIO_PIN_COUNT] = {
     GPIO_NUM_0,    //GPIO0
     GPIO_NUM_1,    //GPIO1
@@ -131,8 +131,8 @@ const int s_test_map[TEST_GPIO_PIN_COUNT] = {
     GPIO_NUM_4,    //GPIO4
     GPIO_NUM_5,    //GPIO5
     GPIO_NUM_6,    //GPIO6
-    GPIO_NUM_7,    //GPIO7
-    GPIO_NUM_8,    //GPIO8
+    // GPIO_NUM_7,    //GPIO7  // Workaround: IO7 is pullup outside on ESP32P4 Core Board Runner
+    // GPIO_NUM_8,    //GPIO8  // Workaround: IO8 is pullup outside on ESP32P4 Core Board Runner
     GPIO_NUM_9,    //GPIO9
     GPIO_NUM_10,   //GPIO10
     GPIO_NUM_11,   //GPIO11

components/esp_driver_gpio/test_apps/gpio/pytest_gpio.py

@@ -9,7 +9,6 @@ CONFIGS = [
 ]
 
 
-@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='esp32p4 support TBD')
 @pytest.mark.supported_targets
 @pytest.mark.generic
 @pytest.mark.parametrize('config', CONFIGS, indirect=True)
@@ -22,6 +21,7 @@ def test_gpio(dut: IdfDut) -> None:
 @pytest.mark.esp32s3
 @pytest.mark.esp32c6
 @pytest.mark.esp32h2
+@pytest.mark.esp32p4
 @pytest.mark.esp32c5
 @pytest.mark.generic
 @pytest.mark.parametrize('config', CONFIGS, indirect=True)

components/esp_driver_uart/test_apps/.build-test-rules.yml

@@ -14,10 +14,6 @@ components/esp_driver_uart/test_apps/rs485:
 components/esp_driver_uart/test_apps/uart:
   disable:
     - if: SOC_UART_SUPPORTED != 1
-  disable_test:
-    - if: IDF_TARGET == "esp32p4"
-      temporary: true
-      reason: test not pass, should be re-enable # TODO: IDF-8971
   depends_components:
     - esp_driver_uart
     - esp_driver_gpio

components/esp_driver_uart/test_apps/uart/main/test_uart.c

@@ -10,7 +10,11 @@
 #include "driver/uart.h"
 #include "esp_log.h"
 #include "esp_rom_gpio.h"
+#if SOC_LP_GPIO_MATRIX_SUPPORTED
 #include "driver/lp_io.h"
+#include "driver/rtc_io.h"
+#include "hal/rtc_io_ll.h"
+#endif
 #include "soc/uart_periph.h"
 #include "soc/uart_pins.h"
 #include "soc/soc_caps.h"
@@ -469,6 +473,13 @@ TEST_CASE("uart int state restored after flush", "[uart]")
     } else {
         // LP_UART
 #if SOC_LP_GPIO_MATRIX_SUPPORTED
+        // Need to route TX signal to RX signal with the help of LP_GPIO matrix, TX signal connect to the RX IO directly
+        // This means RX IO should also only use LP_GPIO matrix to connect the RX signal
+        // In case the selected RX IO is the LP UART IOMUX IO, and the IO has been configured to IOMUX function in the driver
+        // Do the following:
+        TEST_ESP_OK(rtc_gpio_iomux_func_sel(uart_rx, RTCIO_LL_PIN_FUNC));
+        const int uart_rx_signal = uart_periph_signal[uart_num].pins[SOC_UART_RX_PIN_IDX].signal;
+        TEST_ESP_OK(lp_gpio_connect_in_signal(uart_rx, uart_rx_signal, false));
         TEST_ESP_OK(lp_gpio_connect_out_signal(uart_rx, uart_tx_signal, false, false));
 #else
         // The only way is to use loop back feature

components/esp_driver_uart/test_apps/uart/pytest_uart.py

@@ -15,7 +15,7 @@ input_argv = {
 
 
 @pytest.mark.supported_targets
-@pytest.mark.temp_skip_ci(targets=['esp32s3', 'esp32p4'], reason='skip due to duplication with test_uart_single_dev_psram, p4 TBD')  # TODO: IDF-8971
+@pytest.mark.temp_skip_ci(targets=['esp32s3'], reason='skip due to duplication with test_uart_single_dev_psram')
 @pytest.mark.generic
 @pytest.mark.parametrize(
     'config',