From b658c712e78afcda29a324a89ea1fee9e1028d65 Mon Sep 17 00:00:00 2001 From: Armando Date: Mon, 8 Apr 2024 09:36:01 +0800 Subject: [PATCH 1/4] change(cache): change esp_cache_aligned_alloc_log_e_to_w --- components/esp_mm/esp_cache.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/components/esp_mm/esp_cache.c b/components/esp_mm/esp_cache.c index 825f77534b..a8f341e0d8 100644 --- a/components/esp_mm/esp_cache.c +++ b/components/esp_mm/esp_cache.c @@ -120,7 +120,10 @@ esp_err_t esp_cache_aligned_malloc(size_t size, uint32_t flags, void **out_ptr, size = ALIGN_UP_BY(size, data_cache_line_size); ptr = heap_caps_aligned_alloc(data_cache_line_size, size, heap_caps); - ESP_RETURN_ON_FALSE_ISR(ptr, ESP_ERR_NO_MEM, TAG, "no enough heap memory for (%"PRId32")B alignment", data_cache_line_size); + if (!ptr) { + ESP_LOGW(TAG, "no enough heap memory for (%"PRId32")B alignment", data_cache_line_size); + return ESP_ERR_NO_MEM; + } *out_ptr = ptr; if (actual_size) { From 0df418facd8df6b7475c2c2792cd86da09037864 Mon Sep 17 00:00:00 2001 From: Armando Date: Mon, 8 Apr 2024 10:59:13 +0800 Subject: [PATCH 2/4] change(cache): update to use heap cap malloc flags --- components/esp_hw_support/dma/esp_dma_utils.c | 3 +- components/esp_mm/esp_cache.c | 24 +++----- .../include/esp_private/esp_cache_private.h | 56 +++++++++---------- 3 files changed, 37 insertions(+), 46 deletions(-) diff --git a/components/esp_hw_support/dma/esp_dma_utils.c b/components/esp_hw_support/dma/esp_dma_utils.c index 41fbe0503e..6cf9cdc64c 100644 --- a/components/esp_hw_support/dma/esp_dma_utils.c +++ b/components/esp_hw_support/dma/esp_dma_utils.c @@ -18,7 +18,6 @@ #include "hal/hal_utils.h" static const char *TAG = "dma_utils"; -_Static_assert(ESP_DMA_MALLOC_FLAG_PSRAM == ESP_CACHE_MALLOC_FLAG_PSRAM); #define ALIGN_UP_BY(num, align) (((num) + ((align) - 1)) & ~((align) - 1)) #define ALIGN_DOWN_BY(num, align) ((num) & (~((align) - 1))) @@ -38,7 +37,7 @@ esp_err_t esp_dma_capable_malloc(size_t size, const esp_dma_mem_info_t *dma_mem_ int heap_caps = dma_mem_info->extra_heap_caps | MALLOC_CAP_DMA; if (dma_mem_info->extra_heap_caps & MALLOC_CAP_SPIRAM) { - cache_flags |= ESP_DMA_MALLOC_FLAG_PSRAM; + cache_flags |= MALLOC_CAP_SPIRAM; heap_caps = dma_mem_info->extra_heap_caps | MALLOC_CAP_SPIRAM; } diff --git a/components/esp_mm/esp_cache.c b/components/esp_mm/esp_cache.c index a8f341e0d8..213a809431 100644 --- a/components/esp_mm/esp_cache.c +++ b/components/esp_mm/esp_cache.c @@ -93,23 +93,18 @@ esp_err_t esp_cache_msync(void *addr, size_t size, int flags) return ESP_OK; } -esp_err_t esp_cache_aligned_malloc(size_t size, uint32_t flags, void **out_ptr, size_t *actual_size) +esp_err_t esp_cache_aligned_malloc(size_t size, uint32_t heap_caps, void **out_ptr, size_t *actual_size) { ESP_RETURN_ON_FALSE_ISR(out_ptr, ESP_ERR_INVALID_ARG, TAG, "null pointer"); + uint32_t valid_caps = MALLOC_CAP_SPIRAM | MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA; + ESP_RETURN_ON_FALSE_ISR((heap_caps & valid_caps) > 0, ESP_ERR_INVALID_ARG, TAG, "not supported cap matches"); uint32_t cache_level = CACHE_LL_LEVEL_INT_MEM; - uint32_t heap_caps = 0; uint32_t data_cache_line_size = 0; void *ptr = NULL; - if (flags & ESP_CACHE_MALLOC_FLAG_PSRAM) { + if (heap_caps & MALLOC_CAP_SPIRAM) { cache_level = CACHE_LL_LEVEL_EXT_MEM; - heap_caps |= MALLOC_CAP_SPIRAM; - } else { - heap_caps |= MALLOC_CAP_INTERNAL; - if (flags & ESP_CACHE_MALLOC_FLAG_DMA) { - heap_caps |= MALLOC_CAP_DMA; - } } data_cache_line_size = cache_hal_get_cache_line_size(cache_level, CACHE_TYPE_DATA); @@ -119,9 +114,8 @@ esp_err_t esp_cache_aligned_malloc(size_t size, uint32_t flags, void **out_ptr, } size = ALIGN_UP_BY(size, data_cache_line_size); - ptr = heap_caps_aligned_alloc(data_cache_line_size, size, heap_caps); + ptr = heap_caps_aligned_alloc(data_cache_line_size, size, (uint32_t)heap_caps); if (!ptr) { - ESP_LOGW(TAG, "no enough heap memory for (%"PRId32")B alignment", data_cache_line_size); return ESP_ERR_NO_MEM; } @@ -155,7 +149,7 @@ esp_err_t esp_cache_aligned_malloc_prefer(size_t size, void **out_ptr, size_t *a return ret; } -esp_err_t esp_cache_aligned_calloc(size_t n, size_t size, uint32_t flags, void **out_ptr, size_t *actual_size) +esp_err_t esp_cache_aligned_calloc(size_t n, size_t size, uint32_t heap_caps, void **out_ptr, size_t *actual_size) { ESP_RETURN_ON_FALSE_ISR(out_ptr, ESP_ERR_INVALID_ARG, TAG, "null pointer"); @@ -167,7 +161,7 @@ esp_err_t esp_cache_aligned_calloc(size_t n, size_t size, uint32_t flags, void * ESP_RETURN_ON_FALSE_ISR(!ovf, ESP_ERR_INVALID_ARG, TAG, "wrong size, total size overflow"); void *ptr = NULL; - ret = esp_cache_aligned_malloc(size_bytes, flags, &ptr, actual_size); + ret = esp_cache_aligned_malloc(size_bytes, heap_caps, &ptr, actual_size); if (ret == ESP_OK) { memset(ptr, 0, size_bytes); *out_ptr = ptr; @@ -209,14 +203,14 @@ esp_err_t esp_cache_aligned_calloc_prefer(size_t n, size_t size, void **out_ptr, return ret; } -esp_err_t esp_cache_get_alignment(uint32_t flags, size_t *out_alignment) +esp_err_t esp_cache_get_alignment(uint32_t heap_caps, size_t *out_alignment) { ESP_RETURN_ON_FALSE(out_alignment, ESP_ERR_INVALID_ARG, TAG, "null pointer"); uint32_t cache_level = CACHE_LL_LEVEL_INT_MEM; uint32_t data_cache_line_size = 0; - if (flags & ESP_CACHE_MALLOC_FLAG_PSRAM) { + if (heap_caps & MALLOC_CAP_SPIRAM) { cache_level = CACHE_LL_LEVEL_EXT_MEM; } diff --git a/components/esp_mm/include/esp_private/esp_cache_private.h b/components/esp_mm/include/esp_private/esp_cache_private.h index 63d0d89719..97a4afafcc 100644 --- a/components/esp_mm/include/esp_private/esp_cache_private.h +++ b/components/esp_mm/include/esp_private/esp_cache_private.h @@ -9,47 +9,39 @@ #include #include "esp_err.h" #include "esp_bit_defs.h" +#include "esp_heap_caps.h" #ifdef __cplusplus extern "C" { #endif -/** - * Cache malloc flags - */ -/** - * @brief Memory is in PSRAM - */ -#define ESP_CACHE_MALLOC_FLAG_PSRAM BIT(0) - -/** - * @brief Memory is capable to be accessed by DMA - */ -#define ESP_CACHE_MALLOC_FLAG_DMA BIT(1) - /** * @brief Helper function for malloc a cache aligned data memory buffer * - * @param[in] size Size in bytes, the amount of memory to allocate - * @param[in] flags Flags, see `ESP_CACHE_MALLOC_FLAG_x` - * @param[out] out_ptr A pointer to the memory allocated successfully - * @param[out] actual_size Actual size for allocation in bytes, when the size you specified doesn't meet the cache alignment requirements, this value might be bigger than the size you specified. Set null if you don't care this value. + * @note Now only support 'MALLOC_CAP_INTERNAL', 'MALLOC_CAP_DMA' and 'MALLOC_CAP_SPIRAM' + * + * @param[in] size Size in bytes, the amount of memory to allocate + * @param[in] heap_caps Flags, see `MALLOC_CAP_x` + * @param[out] out_ptr A pointer to the memory allocated successfully + * @param[out] actual_size Actual size for allocation in bytes, when the size you specified doesn't meet the cache alignment requirements, this value might be bigger than the size you specified. Set null if you don't care this value. * * @return * - ESP_OK: * - ESP_ERR_INVALID_ARG: Invalid argument * - ESP_ERR_NO_MEM: No enough memory for allocation */ -esp_err_t esp_cache_aligned_malloc(size_t size, uint32_t flags, void **out_ptr, size_t *actual_size); +esp_err_t esp_cache_aligned_malloc(size_t size, uint32_t heap_caps, void **out_ptr, size_t *actual_size); /** * @brief Helper function for malloc a cache aligned data memory buffer as preference in decreasing order. * + * @note Now only support 'MALLOC_CAP_INTERNAL', 'MALLOC_CAP_DMA' and 'MALLOC_CAP_SPIRAM' + * * @param[in] size Size in bytes, the amount of memory to allocate * @param[out] out_ptr A pointer to the memory allocated successfully * @param[out] actual_size Actual size for allocation in bytes, when the size you specified doesn't meet the cache alignment requirements, this value might be bigger than the size you specified. Set null if you don't care this value. * @param[in] flag_nums Number of variable parameters - * @param[in] spread param The spread params are bitwise OR of Flags, see `ESP_CACHE_MALLOC_FLAG_x`. This API prefers to allocate memory with the first parameter. If failed, allocate memory with + * @param[in] spread param The spread params are bitwise OR of Flags, see `MALLOC_CAP_x`. This API prefers to allocate memory with the first parameter. If failed, allocate memory with * the next parameter. It will try in this order until allocating a chunk of memory successfully * or fail to allocate memories with any of the parameters. * @@ -63,28 +55,32 @@ esp_err_t esp_cache_aligned_malloc_prefer(size_t size, void **out_ptr, size_t *a /** * @brief Helper function for calloc a cache aligned data memory buffer * - * @param[in] n Number of continuing chunks of memory to allocate - * @param[in] size Size of one chunk, in bytes - * @param[in] flags Flags, see `ESP_CACHE_MALLOC_FLAG_x` - * @param[out] out_ptr A pointer to the memory allocated successfully - * @param[out] actual_size Actual size for allocation in bytes, when the size you specified doesn't meet the cache alignment requirements, this value might be bigger than the size you specified. Set null if you don't care this value. + * @note Now only support 'MALLOC_CAP_INTERNAL', 'MALLOC_CAP_DMA' and 'MALLOC_CAP_SPIRAM' + * + * @param[in] n Number of continuing chunks of memory to allocate + * @param[in] size Size of one chunk, in bytes + * @param[in] heap_caps Flags, see `MALLOC_CAP_x` + * @param[out] out_ptr A pointer to the memory allocated successfully + * @param[out] actual_size Actual size for allocation in bytes, when the size you specified doesn't meet the cache alignment requirements, this value might be bigger than the size you specified. Set null if you don't care this value. * * @return * - ESP_OK: * - ESP_ERR_INVALID_ARG: Invalid argument * - ESP_ERR_NO_MEM: No enough memory for allocation */ -esp_err_t esp_cache_aligned_calloc(size_t n, size_t size, uint32_t flags, void **out_ptr, size_t *actual_size); +esp_err_t esp_cache_aligned_calloc(size_t n, size_t size, uint32_t heap_caps, void **out_ptr, size_t *actual_size); /** * @brief Helper function for calloc a cache aligned data memory buffer as preference in decreasing order. * + * @note Now only support 'MALLOC_CAP_INTERNAL', 'MALLOC_CAP_DMA' and 'MALLOC_CAP_SPIRAM' + * * @param[in] n Number of continuing chunks of memory to allocate * @param[in] size Size in bytes, the amount of memory to allocate * @param[out] out_ptr A pointer to the memory allocated successfully * @param[out] actual_size Actual size for allocation in bytes, when the size you specified doesn't meet the cache alignment requirements, this value might be bigger than the size you specified. Set null if you don't care this value. * @param[in] flag_nums Number of variable parameters - * @param[in] spread param The spread params are bitwise OR of Flags, see `ESP_CACHE_MALLOC_FLAG_x`. This API prefers to allocate memory with the first parameter. If failed, allocate memory with + * @param[in] spread param The spread params are bitwise OR of Flags, see `MALLOC_CAP_x`. This API prefers to allocate memory with the first parameter. If failed, allocate memory with * the next parameter. It will try in this order until allocating a chunk of memory successfully * or fail to allocate memories with any of the parameters. * @@ -98,14 +94,16 @@ esp_err_t esp_cache_aligned_calloc_prefer(size_t n, size_t size, void **out_ptr, /** * @brief Get Cache alignment requirement for data * - * @param[in] flags Flags, see `ESP_CACHE_MALLOC_FLAG_x` - * @param[out] out_alignment Alignment + * @note Now only support 'MALLOC_CAP_INTERNAL', 'MALLOC_CAP_DMA' and 'MALLOC_CAP_SPIRAM' + * + * @param[in] heap_caps Flags, see `MALLOC_CAP_x` + * @param[out] out_alignment Alignment * * @return * - ESP_OK: * - ESP_ERR_INVALID_ARG: Invalid argument */ -esp_err_t esp_cache_get_alignment(uint32_t flags, size_t *out_alignment); +esp_err_t esp_cache_get_alignment(uint32_t heap_caps, size_t *out_alignment); #ifdef __cplusplus } From d341540a5e940d09de980bc2aefa545e3bebdb86 Mon Sep 17 00:00:00 2001 From: Armando Date: Mon, 8 Apr 2024 11:01:05 +0800 Subject: [PATCH 3/4] change(drivers): other driver changes for cache malloc --- components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c | 2 +- components/esp_driver_jpeg/jpeg_decode.c | 2 +- components/esp_driver_jpeg/jpeg_emit_marker.c | 2 +- components/esp_driver_jpeg/jpeg_encode.c | 2 +- components/esp_driver_spi/src/gpspi/spi_common.c | 2 +- components/esp_driver_spi/src/gpspi/spi_slave.c | 2 +- components/esp_driver_spi/src/gpspi/spi_slave_hd.c | 2 +- components/mbedtls/port/aes/dma/esp_aes_dma_core.c | 6 +++--- components/usb/hcd_dwc.c | 2 +- 9 files changed, 11 insertions(+), 11 deletions(-) diff --git a/components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c b/components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c index e5c686fa65..06ee4f9567 100644 --- a/components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c +++ b/components/esp_driver_cam/csi/src/esp_cam_ctlr_csi.c @@ -149,7 +149,7 @@ esp_err_t esp_cam_new_csi_ctlr(const esp_cam_ctlr_csi_config_t *config, esp_cam_ size_t dma_alignment = 4; //TODO: IDF-9126, replace with dwgdma alignment API size_t cache_alignment = 1; - ESP_GOTO_ON_ERROR(esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_PSRAM | ESP_CACHE_MALLOC_FLAG_DMA, &cache_alignment), err, TAG, "failed to get cache alignment"); + ESP_GOTO_ON_ERROR(esp_cache_get_alignment(MALLOC_CAP_SPIRAM | MALLOC_CAP_DMA, &cache_alignment), err, TAG, "failed to get cache alignment"); size_t alignment = MAX(cache_alignment, dma_alignment); ESP_LOGD(TAG, "alignment: 0x%x\n", alignment); diff --git a/components/esp_driver_jpeg/jpeg_decode.c b/components/esp_driver_jpeg/jpeg_decode.c index 7ccf3e5155..d06fa13e1f 100644 --- a/components/esp_driver_jpeg/jpeg_decode.c +++ b/components/esp_driver_jpeg/jpeg_decode.c @@ -289,7 +289,7 @@ void *jpeg_alloc_decoder_mem(size_t size, const jpeg_decode_memory_alloc_cfg_t * FOr input buffer(for decoder is PSRAM write to 2DDMA), no restriction for any align (both cache writeback and requirement from 2DDMA). */ size_t cache_align = 0; - esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_PSRAM, &cache_align); + esp_cache_get_alignment(MALLOC_CAP_SPIRAM, &cache_align); if (mem_cfg->buffer_direction == JPEG_DEC_ALLOC_OUTPUT_BUFFER) { size = JPEG_ALIGN_UP(size, cache_align); *allocated_size = size; diff --git a/components/esp_driver_jpeg/jpeg_emit_marker.c b/components/esp_driver_jpeg/jpeg_emit_marker.c index 34db223917..cc6b2be117 100644 --- a/components/esp_driver_jpeg/jpeg_emit_marker.c +++ b/components/esp_driver_jpeg/jpeg_emit_marker.c @@ -228,7 +228,7 @@ esp_err_t emit_com_marker(jpeg_enc_header_info_t *header_info) { // Calculate how many bytes should be compensate to make it byte aligned. size_t cache_align = 0; - esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_PSRAM, &cache_align); + esp_cache_get_alignment(MALLOC_CAP_SPIRAM, &cache_align); // compensate_size = aligned_size - SOS marker size(2 * header_info->num_components + 2 + 1 + 3 + 2) - COM marker size(4). int compensate_size = ((header_info->header_len / cache_align + 1) * cache_align) - header_info->header_len - (2 * header_info->num_components + 2 + 1 + 3 + 2) - 4; if (compensate_size < 0) { diff --git a/components/esp_driver_jpeg/jpeg_encode.c b/components/esp_driver_jpeg/jpeg_encode.c index d03b3fcce1..9b5d260baf 100644 --- a/components/esp_driver_jpeg/jpeg_encode.c +++ b/components/esp_driver_jpeg/jpeg_encode.c @@ -294,7 +294,7 @@ void *jpeg_alloc_encoder_mem(size_t size, const jpeg_encode_memory_alloc_cfg_t * For input buffer(for decoder is PSRAM write to 2DDMA), no restriction for any align (both cache writeback and requirement from 2DDMA). */ size_t cache_align = 0; - esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_PSRAM, &cache_align); + esp_cache_get_alignment(MALLOC_CAP_SPIRAM, &cache_align); if (mem_cfg->buffer_direction == JPEG_ENC_ALLOC_OUTPUT_BUFFER) { size = JPEG_ALIGN_UP(size, cache_align); *allocated_size = size; diff --git a/components/esp_driver_spi/src/gpspi/spi_common.c b/components/esp_driver_spi/src/gpspi/spi_common.c index 68353afca5..7d5b139a0c 100644 --- a/components/esp_driver_spi/src/gpspi/spi_common.c +++ b/components/esp_driver_spi/src/gpspi/spi_common.c @@ -835,7 +835,7 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t * goto cleanup; } #if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE - esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_DMA, (size_t *)&bus_attr->internal_mem_align_size); + esp_cache_get_alignment(MALLOC_CAP_DMA, (size_t *)&bus_attr->internal_mem_align_size); #else bus_attr->internal_mem_align_size = 4; #endif diff --git a/components/esp_driver_spi/src/gpspi/spi_slave.c b/components/esp_driver_spi/src/gpspi/spi_slave.c index 73c9eab3c9..8aa5e2beae 100644 --- a/components/esp_driver_spi/src/gpspi/spi_slave.c +++ b/components/esp_driver_spi/src/gpspi/spi_slave.c @@ -192,7 +192,7 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b #if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE size_t alignment; - esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_DMA, &alignment); + esp_cache_get_alignment(MALLOC_CAP_DMA, &alignment); spihost[host]->internal_mem_align_size = alignment; #else spihost[host]->internal_mem_align_size = 4; diff --git a/components/esp_driver_spi/src/gpspi/spi_slave_hd.c b/components/esp_driver_spi/src/gpspi/spi_slave_hd.c index e85698825a..22a53255cf 100644 --- a/components/esp_driver_spi/src/gpspi/spi_slave_hd.c +++ b/components/esp_driver_spi/src/gpspi/spi_slave_hd.c @@ -122,7 +122,7 @@ esp_err_t spi_slave_hd_init(spi_host_device_t host_id, const spi_bus_config_t *b #if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE size_t alignment; - esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_DMA, &alignment); + esp_cache_get_alignment(MALLOC_CAP_DMA, &alignment); host->internal_mem_align_size = alignment; #else host->internal_mem_align_size = 4; diff --git a/components/mbedtls/port/aes/dma/esp_aes_dma_core.c b/components/mbedtls/port/aes/dma/esp_aes_dma_core.c index cc64191490..bcf18069b4 100644 --- a/components/mbedtls/port/aes/dma/esp_aes_dma_core.c +++ b/components/mbedtls/port/aes/dma/esp_aes_dma_core.c @@ -291,11 +291,11 @@ static inline size_t get_cache_line_size(const void *addr) #if (CONFIG_SPIRAM && SOC_PSRAM_DMA_CAPABLE) if (esp_ptr_external_ram(addr)) { - ret = esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_PSRAM, &cache_line_size); + ret = esp_cache_get_alignment(MALLOC_CAP_SPIRAM, &cache_line_size); } else #endif { - ret = esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_DMA, &cache_line_size); + ret = esp_cache_get_alignment(MALLOC_CAP_DMA, &cache_line_size); } if (ret != ESP_OK) { @@ -949,7 +949,7 @@ int esp_aes_process_dma(esp_aes_context *ctx, const unsigned char *input, unsign } if (esp_ptr_external_ram(output)) { size_t dcache_line_size; - ret = esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_PSRAM, &dcache_line_size); + ret = esp_cache_get_alignment(MALLOC_CAP_SPIRAM, &dcache_line_size); if (ret != ESP_OK) { return ret; } diff --git a/components/usb/hcd_dwc.c b/components/usb/hcd_dwc.c index 24108d33f6..f9834b7ad8 100644 --- a/components/usb/hcd_dwc.c +++ b/components/usb/hcd_dwc.c @@ -1065,7 +1065,7 @@ void *transfer_descriptor_list_alloc(size_t list_len, size_t *list_len_bytes_out #if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE // Required Transfer Descriptor List size (in bytes) might not be aligned to cache line size, align the size up size_t data_cache_line_size = 0; - esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_DMA, &data_cache_line_size); + esp_cache_get_alignment(MALLOC_CAP_DMA, &data_cache_line_size); const size_t required_list_len_bytes = list_len * sizeof(usb_dwc_ll_dma_qtd_t); *list_len_bytes_out = ALIGN_UP_BY(required_list_len_bytes, data_cache_line_size); #else From e36a396801bf95e75d1bd7375d181ba10eb0d57d Mon Sep 17 00:00:00 2001 From: Armando Date: Mon, 8 Apr 2024 11:01:35 +0800 Subject: [PATCH 4/4] change(test): test changes for esp cache malloc --- components/esp_hw_support/test_apps/dma/main/test_dw_gdma.c | 2 +- components/esp_mm/test_apps/mm/main/test_cache_msync_malloc.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/components/esp_hw_support/test_apps/dma/main/test_dw_gdma.c b/components/esp_hw_support/test_apps/dma/main/test_dw_gdma.c index 4da9060d3b..d4b2b3cf28 100644 --- a/components/esp_hw_support/test_apps/dma/main/test_dw_gdma.c +++ b/components/esp_hw_support/test_apps/dma/main/test_dw_gdma.c @@ -525,7 +525,7 @@ TEST_CASE("DW_GDMA M2M Test: memory set with fixed address", "[DW_GDMA]") // memset: source in psram and destination in sram size_t ext_mem_alignment = 0; size_t int_mem_alignment = 0; - TEST_ESP_OK(esp_cache_get_alignment(ESP_CACHE_MALLOC_FLAG_PSRAM, &ext_mem_alignment)); + TEST_ESP_OK(esp_cache_get_alignment(MALLOC_CAP_SPIRAM, &ext_mem_alignment)); TEST_ESP_OK(esp_cache_get_alignment(0, &int_mem_alignment)); uint8_t *src_buf = heap_caps_aligned_calloc(ext_mem_alignment, 1, 256, MALLOC_CAP_SPIRAM | MALLOC_CAP_8BIT); uint8_t *dst_buf = heap_caps_aligned_calloc(int_mem_alignment, 1, 256, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT); diff --git a/components/esp_mm/test_apps/mm/main/test_cache_msync_malloc.c b/components/esp_mm/test_apps/mm/main/test_cache_msync_malloc.c index 1c1a52e926..cd3ac554d2 100644 --- a/components/esp_mm/test_apps/mm/main/test_cache_msync_malloc.c +++ b/components/esp_mm/test_apps/mm/main/test_cache_msync_malloc.c @@ -20,7 +20,7 @@ TEST_CASE("test esp_cache_aligned_malloc_prefer", "[cache]") { void *ptr = NULL; size_t actual_size = 0; - TEST_ESP_OK(esp_cache_aligned_malloc_prefer(40, &ptr, &actual_size, 1, ESP_CACHE_MALLOC_FLAG_DMA, 0)); + TEST_ESP_OK(esp_cache_aligned_malloc_prefer(40, &ptr, &actual_size, 1, MALLOC_CAP_DMA, 0)); TEST_ASSERT(esp_ptr_dma_capable(ptr)); ESP_LOGI(TAG, "actual size: 0x%x", actual_size); @@ -31,7 +31,7 @@ TEST_CASE("test esp_cache_aligned_calloc_prefer", "[cache]") { void *ptr = NULL; size_t actual_size = 0; - TEST_ESP_OK(esp_cache_aligned_calloc_prefer(1, 40, &ptr, &actual_size, 1, ESP_CACHE_MALLOC_FLAG_DMA, 0)); + TEST_ESP_OK(esp_cache_aligned_calloc_prefer(1, 40, &ptr, &actual_size, 1, MALLOC_CAP_DMA, 0)); TEST_ASSERT(esp_ptr_dma_capable(ptr)); ESP_LOGI(TAG, "actual size: 0d%d", actual_size);