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Merge branch 'bugfix/update_efuse_name_v4.3' into 'release/v4.3'

Browse Source 
efuse: update efuse name (backport v4.3)

See merge request espressif/esp-idf!18196
This commit is contained in:
Jiang Jiang Jian 2022-05-31 14:42:05 +08:00
commit 0e3ec4fb99
20 changed files with 280 additions and 249 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
components/bootloader_support/src/esp32c3/flash_encrypt.c
View File

@ -150,7 +150,7 @@ static esp_err_t initialise_flash_encryption(void)
ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED");
#endif
esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT);
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
#if defined(CONFIG_SECURE_BOOT_V2_ENABLED) && !defined(CONFIG_SECURE_BOOT_V2_ALLOW_EFUSE_RD_DIS)
// This bit is set when enabling Secure Boot V2, but we can't enable it until this later point in the first boot

2
components/bootloader_support/src/esp32c3/secure_boot.c
View File

@ -256,7 +256,7 @@ esp_err_t esp_secure_boot_v2_permanently_enable(const esp_image_metadata_t *imag
return key_state;
}
esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT);
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
esp_err_t err = ESP_FAIL;
#ifdef CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE

2
components/bootloader_support/src/esp32s3/flash_encrypt.c
View File

@ -172,7 +172,7 @@ static esp_err_t initialise_flash_encryption(void)
ESP_LOGW(TAG, "Not disabling JTAG - SECURITY COMPROMISED");
#endif
esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT);
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
esp_err_t err = esp_efuse_batch_write_commit();
if (err != ESP_OK) {

2
components/bootloader_support/src/esp32s3/secure_boot.c
View File

@ -258,7 +258,7 @@ esp_err_t esp_secure_boot_v2_permanently_enable(const esp_image_metadata_t *imag
__attribute__((unused)) static const uint8_t enable = 1;
esp_efuse_write_field_bit(ESP_EFUSE_DIS_LEGACY_SPI_BOOT);
esp_efuse_write_field_bit(ESP_EFUSE_DIS_DIRECT_BOOT);
esp_err_t err = ESP_FAIL;
#ifdef CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE

30
components/efuse/esp32c3/esp_efuse_table.c
View File

@ -17,7 +17,7 @@
#include <assert.h>
#include "esp_efuse_table.h"
// md5_digest_table 74dc1b50febce95860a7a077efe28121
// md5_digest_table d149692a5f265b5cf85ff5e0a7561f96
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -84,7 +84,7 @@ static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
};
static const esp_efuse_desc_t WR_DIS_GROUP_3[] = {
{EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION,
{EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_TINY_BASIC DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION,
};
static const esp_efuse_desc_t WR_DIS_BLK1[] = {
@ -283,16 +283,16 @@ static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = {
{EFUSE_BLK0, 128, 1}, // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7,
};
static const esp_efuse_desc_t DIS_LEGACY_SPI_BOOT[] = {
{EFUSE_BLK0, 129, 1}, // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4,
static const esp_efuse_desc_t DIS_DIRECT_BOOT[] = {
{EFUSE_BLK0, 129, 1}, // Disable direct boot mode,
};
static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = {
{EFUSE_BLK0, 130, 1}, // 0: UART0. 1: UART1,
static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
{EFUSE_BLK0, 130, 1}, // Disable usb serial jtag print during rom boot,
};
static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = {
{EFUSE_BLK0, 132, 1}, // Disable download through USB,
static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
{EFUSE_BLK0, 132, 1}, // Disable download through USB-Serial-JTAG,
};
static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = {
@ -560,7 +560,7 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[] = {
&WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
&WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_TINY_BASIC DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
NULL
};
@ -809,18 +809,18 @@ const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[] = {
&DIS_LEGACY_SPI_BOOT[0], // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4
const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[] = {
&DIS_DIRECT_BOOT[0], // Disable direct boot mode
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = {
&UART_PRINT_CHANNEL[0], // 0: UART0. 1: UART1
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
&DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // Disable usb serial jtag print during rom boot
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = {
&DIS_USB_DOWNLOAD_MODE[0], // Disable download through USB
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
&DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // Disable download through USB-Serial-JTAG
NULL
};

8
components/efuse/esp32c3/esp_efuse_table.csv
View File

@ -29,7 +29,7 @@
WR_DIS_KEY5_PURPOSE, EFUSE_BLK0, 13, 1, Write protection for key_purpose. KEY5
WR_DIS_SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, Write protection for SECURE_BOOT_EN
WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE,EFUSE_BLK0, 16, 1, Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE
WR_DIS_GROUP_3, EFUSE_BLK0, 18, 1, Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_TINY_BASIC DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
WR_DIS_GROUP_3, EFUSE_BLK0, 18, 1, Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_TINY_BASIC DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
WR_DIS_BLK1, EFUSE_BLK0, 20, 1, Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS
WR_DIS_SYS_DATA_PART1, EFUSE_BLK0, 21, 1, Write protection for EFUSE_BLK2. SYS_DATA_PART1
WR_DIS_USER_DATA, EFUSE_BLK0, 22, 1, Write protection for EFUSE_BLK3. USER_DATA
@ -88,9 +88,9 @@
# EFUSE_RD_REPEAT_DATA3_REG #
DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7
DIS_LEGACY_SPI_BOOT, EFUSE_BLK0, 129, 1, Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4
UART_PRINT_CHANNEL, EFUSE_BLK0, 130, 1, 0: UART0. 1: UART1
DIS_USB_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, Disable download through USB
DIS_DIRECT_BOOT, EFUSE_BLK0, 129, 1, Disable direct boot mode
DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 130, 1, Disable usb serial jtag print during rom boot
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,EFUSE_BLK0, 132, 1, Disable download through USB-Serial-JTAG
ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, Enable security download mode
UART_PRINT_CONTROL, EFUSE_BLK0, 134, 2, b00:force print. b01:control by GPIO8 - low level print. b10:control by GPIO8 - high level print. b11:force disable print.
FORCE_SEND_RESUME, EFUSE_BLK0, 141, 1, Force ROM code to send a resume command during SPI boot

Can't render this file because it contains an unexpected character in line 7 and column 87.

8
components/efuse/esp32c3/include/esp_efuse_table.h
View File

@ -17,7 +17,7 @@ extern "C" {
#endif
// md5_digest_table 74dc1b50febce95860a7a077efe28121
// md5_digest_table d149692a5f265b5cf85ff5e0a7561f96
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -89,9 +89,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[];
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[];
extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[];
extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[];
extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[];

39
components/efuse/esp32s3/esp_efuse_table.c
View File

@ -17,7 +17,7 @@
#include <assert.h>
#include "esp_efuse_table.h"
// md5_digest_table 32d4e5502110edd26bdad463b5ac1d2d
// md5_digest_table 9295c8aa9c48d48dc42c78456bd02645
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -84,7 +84,7 @@ static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
};
static const esp_efuse_desc_t WR_DIS_GROUP_3[] = {
{EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION,
{EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION,
};
static const esp_efuse_desc_t WR_DIS_BLK1[] = {
@ -287,20 +287,20 @@ static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = {
{EFUSE_BLK0, 128, 1}, // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7,
};
static const esp_efuse_desc_t DIS_LEGACY_SPI_BOOT[] = {
{EFUSE_BLK0, 129, 1}, // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4,
static const esp_efuse_desc_t DIS_DIRECT_BOOT[] = {
{EFUSE_BLK0, 129, 1}, // Disable direct boot mode,
};
static const esp_efuse_desc_t UART_PRINT_CHANNEL[] = {
{EFUSE_BLK0, 130, 1}, // 0: UART0. 1: UART1,
static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
{EFUSE_BLK0, 130, 1}, // Disable usb serial jtag print during rom boot,
};
static const esp_efuse_desc_t FLASH_ECC_MODE[] = {
{EFUSE_BLK0, 131, 1}, // Configures the ECC mode for SPI flash. 0:16-byte to 18-byte mode. 1:16-byte to 17-byte mode,
};
static const esp_efuse_desc_t DIS_USB_DOWNLOAD_MODE[] = {
{EFUSE_BLK0, 132, 1}, // Disable download through USB,
static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
{EFUSE_BLK0, 132, 1}, // Set this bit to disable download through USB-Serial-JTAG,
};
static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = {
@ -335,6 +335,10 @@ static const esp_efuse_desc_t SECURE_VERSION[] = {
{EFUSE_BLK0, 142, 16}, // Secure version for anti-rollback,
};
static const esp_efuse_desc_t DIS_USB_OTG_DOWNLOAD_MODE[] = {
{EFUSE_BLK0, 159, 1}, // Set this bit to disable download through USB-OTG,
};
static const esp_efuse_desc_t MAC_FACTORY[] = {
{EFUSE_BLK1, 40, 8}, // Factory MAC addr [0],
{EFUSE_BLK1, 32, 8}, // Factory MAC addr [1],
@ -524,7 +528,7 @@ const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
};
const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[] = {
&WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
&WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
NULL
};
@ -778,13 +782,13 @@ const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[] = {
&DIS_LEGACY_SPI_BOOT[0], // Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4
const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[] = {
&DIS_DIRECT_BOOT[0], // Disable direct boot mode
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[] = {
&UART_PRINT_CHANNEL[0], // 0: UART0. 1: UART1
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
&DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // Disable usb serial jtag print during rom boot
NULL
};
@ -793,8 +797,8 @@ const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[] = {
&DIS_USB_DOWNLOAD_MODE[0], // Disable download through USB
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
&DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // Set this bit to disable download through USB-Serial-JTAG
NULL
};
@ -838,6 +842,11 @@ const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = {
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_OTG_DOWNLOAD_MODE[] = {
&DIS_USB_OTG_DOWNLOAD_MODE[0], // Set this bit to disable download through USB-OTG
NULL
};
const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[] = {
&MAC_FACTORY[0], // Factory MAC addr [0]
&MAC_FACTORY[1], // Factory MAC addr [1]

9
components/efuse/esp32s3/esp_efuse_table.csv
View File

@ -28,7 +28,7 @@
WR_DIS_KEY5_PURPOSE, EFUSE_BLK0, 13, 1, Write protection for key_purpose. KEY5
WR_DIS_SECURE_BOOT_EN, EFUSE_BLK0, 15, 1, Write protection for SECURE_BOOT_EN
WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE,EFUSE_BLK0, 16, 1, Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE
WR_DIS_GROUP_3, EFUSE_BLK0, 18, 1, Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_LEGACY_SPI_BOOT UART_PRINT_CHANNEL DIS_USB_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
WR_DIS_GROUP_3, EFUSE_BLK0, 18, 1, Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
WR_DIS_BLK1, EFUSE_BLK0, 20, 1, Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS
WR_DIS_SYS_DATA_PART1, EFUSE_BLK0, 21, 1, Write protection for EFUSE_BLK2. SYS_DATA_PART1
WR_DIS_USER_DATA, EFUSE_BLK0, 22, 1, Write protection for EFUSE_BLK3. USER_DATA
@ -88,10 +88,10 @@
# EFUSE_RD_REPEAT_DATA3_REG #
DIS_DOWNLOAD_MODE, EFUSE_BLK0, 128, 1, Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7
DIS_LEGACY_SPI_BOOT, EFUSE_BLK0, 129, 1, Disable_Legcy_SPI_boot mode include boot_mode[3:0] is 4
UART_PRINT_CHANNEL, EFUSE_BLK0, 130, 1, 0: UART0. 1: UART1
DIS_DIRECT_BOOT, EFUSE_BLK0, 129, 1, Disable direct boot mode
DIS_USB_SERIAL_JTAG_ROM_PRINT, EFUSE_BLK0, 130, 1, Disable usb serial jtag print during rom boot
FLASH_ECC_MODE, EFUSE_BLK0, 131, 1, Configures the ECC mode for SPI flash. 0:16-byte to 18-byte mode. 1:16-byte to 17-byte mode
DIS_USB_DOWNLOAD_MODE, EFUSE_BLK0, 132, 1, Disable download through USB
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,EFUSE_BLK0, 132, 1, Set this bit to disable download through USB-Serial-JTAG
ENABLE_SECURITY_DOWNLOAD, EFUSE_BLK0, 133, 1, Enable security download mode
UART_PRINT_CONTROL, EFUSE_BLK0, 134, 2, b00:force print. b01:control by GPIO46 - low level print. b10:control by GPIO46 - high level print. b11:force disable print.
PIN_POWER_SELECTION, EFUSE_BLK0, 136, 1, GPIO33-GPIO37 power supply selection in ROM code. 0:VDD3P3_CPU. 1:VDD_SPI.
@ -100,6 +100,7 @@
FLASH_ECC_EN, EFUSE_BLK0, 140, 1, Enables ECC in Flash boot mode
FORCE_SEND_RESUME, EFUSE_BLK0, 141, 1, Force ROM code to send a resume command during SPI boot
SECURE_VERSION, EFUSE_BLK0, 142, 16, Secure version for anti-rollback
DIS_USB_OTG_DOWNLOAD_MODE, EFUSE_BLK0, 159, 1, Set this bit to disable download through USB-OTG
# EFUSE_RD_REPEAT_DATA4_REG #

Can't render this file because it contains an unexpected character in line 8 and column 53.

9
components/efuse/esp32s3/include/esp_efuse_table.h
View File

@ -17,7 +17,7 @@ extern "C" {
#endif
// md5_digest_table 32d4e5502110edd26bdad463b5ac1d2d
// md5_digest_table 9295c8aa9c48d48dc42c78456bd02645
// This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
// If you want to change some fields, you need to change esp_efuse_table.csv file
// then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@ -90,10 +90,10 @@ extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[];
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[];
extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[];
extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[];
extern const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[];
@ -102,6 +102,7 @@ extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[];
extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[];
extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[];
extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[];
extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_OTG_DOWNLOAD_MODE[];
extern const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CLK[];
extern const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_Q_D1[];

3
components/esp_rom/esp32c3/ld/esp32c3.rom.ld
View File

@ -482,7 +482,8 @@ ets_efuse_get_flash_delay_us = 0x40000714;
ets_efuse_get_mac = 0x40000718;
ets_efuse_get_spiconfig = 0x4000071c;
ets_efuse_usb_print_is_disabled = 0x40000720;
ets_efuse_get_uart_print_channel = 0x40000724;
/*ets_efuse_get_uart_print_channel = 0x40000724;*/
ets_efuse_usb_serial_jtag_print_is_disabled = 0x40000724;
ets_efuse_get_uart_print_control = 0x40000728;
ets_efuse_get_wp_pad = 0x4000072c;
ets_efuse_legacy_spi_boot_mode_disabled = 0x40000730;

3
components/esp_rom/esp32s3/ld/esp32s3.rom.ld
View File

@ -576,7 +576,8 @@ PROVIDE ( ets_efuse_get_mac = 0x40043d24 );
PROVIDE ( ets_efuse_get_opiconfig = 0x40043ac8 );
PROVIDE ( ets_efuse_get_read_register_address = 0x4004374c );
PROVIDE ( ets_efuse_get_spiconfig = 0x40043a6c );
PROVIDE ( ets_efuse_get_uart_print_channel = 0x40043bb4 );
/*PROVIDE ( ets_efuse_get_uart_print_channel = 0x40043bb4 );*/
PROVIDE ( ets_efuse_usb_serial_jtag_print_is_disabled = 0x40043bb4 );
PROVIDE ( ets_efuse_get_uart_print_control = 0x40043ba4 );
PROVIDE ( ets_efuse_get_wp_pad = 0x40043a10 );
PROVIDE ( ets_efuse_jtag_disabled = 0x40043b5c );

26
components/esp_rom/include/esp32c3/rom/efuse.h
View File

@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ROM_EFUSE_H_
#define _ROM_EFUSE_H_
@ -236,13 +228,13 @@ bool ets_efuse_legacy_spi_boot_mode_disabled(void);
uint32_t ets_efuse_get_uart_print_control(void);
/**
* @brief Read which channel will used by ROM to print
* @brief Read if USB-Serial-JTAG print during rom boot is disabled from Efuse
*
* @return
* - 0 for UART0.
* - 1 for UART1.
* - 1 for efuse disable USB-Serial-JTAG print during rom boot.
* - 0 for efuse doesn't disable USB-Serial-JTAG print during rom boot.
*/
uint32_t ets_efuse_get_uart_print_channel(void);
uint32_t ets_efuse_usb_serial_jtag_print_is_disabled(void);
/**
* @brief Read if usb download mode disabled from Efuse

26
components/esp_rom/include/esp32s3/rom/efuse.h
View File

@ -1,16 +1,8 @@
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
@ -237,13 +229,13 @@ bool ets_efuse_legacy_spi_boot_mode_disabled(void);
uint32_t ets_efuse_get_uart_print_control(void);
/**
* @brief Read which channel will used by ROM to print
* @brief Read if USB-Serial-JTAG print during rom boot is disabled from Efuse
*
* @return
* - 0 for UART0.
* - 1 for UART1.
* - 1 for efuse disable USB-Serial-JTAG print during rom boot.
* - 0 for efuse doesn't disable USB-Serial-JTAG print during rom boot.
*/
uint32_t ets_efuse_get_uart_print_channel(void);
uint32_t ets_efuse_usb_serial_jtag_print_is_disabled(void);
/**
* @brief Read if usb download mode disabled from Efuse

2
components/esptool_py/esptool

@ -1 +1 @@
Subproject commit 56a7660834de16a9e550114befb8932c73af2261
Subproject commit e53efcf84ceb6fac315ccb1348d6950ac33af309

150
components/soc/esp32c3/include/soc/efuse_reg.h
View File

@ -256,11 +256,17 @@ extern "C" {
#define EFUSE_KEY_PURPOSE_2_S 0
#define EFUSE_PGM_DATA4_REG (DR_REG_EFUSE_BASE + 0x010)
/* EFUSE_RPT4_RESERVED1 : RO ;bitpos:[31:30] ;default: 2'h0 ; */
/* EFUSE_ERR_RST_ENABLE : RO ;bitpos:[31] ;default: 1'h0 ; */
/*description: Use BLOCK0 to check error record registers, 0 - without check.*/
#define EFUSE_ERR_RST_ENABLE (BIT(31))
#define EFUSE_ERR_RST_ENABLE_M (BIT(31))
#define EFUSE_ERR_RST_ENABLE_V 0x1
#define EFUSE_ERR_RST_ENABLE_S 31
/* EFUSE_RPT4_RESERVED1 : RO ;bitpos:[30] ;default: 1'h0 ; */
/*description: Reserved (used for four backups method).*/
#define EFUSE_RPT4_RESERVED1 0x00000003
#define EFUSE_RPT4_RESERVED1_M ((EFUSE_RPT4_RESERVED1_V)<<(EFUSE_RPT4_RESERVED1_S))
#define EFUSE_RPT4_RESERVED1_V 0x3
#define EFUSE_RPT4_RESERVED1 (BIT(30))
#define EFUSE_RPT4_RESERVED1_M (BIT(30))
#define EFUSE_RPT4_RESERVED1_V 0x1
#define EFUSE_RPT4_RESERVED1_S 30
/* EFUSE_SECURE_VERSION : R/W ;bitpos:[29:14] ;default: 16'h0 ; */
/*description: Secure version (used by ESP-IDF anti-rollback feature).*/
@ -293,30 +299,30 @@ extern "C" {
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_M (BIT(5))
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_V 0x1
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_S 5
/* EFUSE_DIS_USB_DOWNLOAD_MODE : R/W ;bitpos:[4] ;default: 1'b0 ; */
/*description: Set this bit to disable UART download mode through USB.*/
#define EFUSE_DIS_USB_DOWNLOAD_MODE (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_M (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_V 0x1
#define EFUSE_DIS_USB_DOWNLOAD_MODE_S 4
/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE : R/W ;bitpos:[4] ;default: 1'b0 ; */
/*description: Set this bit to disable download through USB-Serial-JTAG.*/
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BIT(4))
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_M (BIT(4))
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_V 0x1
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_S 4
/* EFUSE_RPT4_RESERVED8 : R/W ;bitpos:[3] ;default: 1'b0 ; */
/*description: Reserved (used for four backups method).*/
#define EFUSE_RPT4_RESERVED8 (BIT(3))
#define EFUSE_RPT4_RESERVED8_M (BIT(3))
#define EFUSE_RPT4_RESERVED8_V 0x1
#define EFUSE_RPT4_RESERVED8_S 3
/* EFUSE_UART_PRINT_CHANNEL : R/W ;bitpos:[2] ;default: 1'b0 ; */
/*description: Selectes the default UART print channel. 0: UART0. 1: UART1.*/
#define EFUSE_UART_PRINT_CHANNEL (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_M (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_V 0x1
#define EFUSE_UART_PRINT_CHANNEL_S 2
/* EFUSE_DIS_LEGACY_SPI_BOOT : R/W ;bitpos:[1] ;default: 1'b0 ; */
/*description: Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4).*/
#define EFUSE_DIS_LEGACY_SPI_BOOT (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_M (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_V 0x1
#define EFUSE_DIS_LEGACY_SPI_BOOT_S 1
/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT : R/W ;bitpos:[2] ;default: 1'b0 ; */
/*description: Disable USB-Serial-JTAG print during rom boot.*/
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_M (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_V 0x1
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_S 2
/* EFUSE_DIS_DIRECT_BOOT : R/W ;bitpos:[1] ;default: 1'b0 ; */
/*description: Set this bit to disable direct boot*/
#define EFUSE_DIS_DIRECT_BOOT (BIT(1))
#define EFUSE_DIS_DIRECT_BOOT_M (BIT(1))
#define EFUSE_DIS_DIRECT_BOOT_V 0x1
#define EFUSE_DIS_DIRECT_BOOT_S 1
/* EFUSE_DIS_DOWNLOAD_MODE : R/W ;bitpos:[0] ;default: 1'b0 ; */
/*description: Set this bit to disable download mode (boot_mode[3:0] = 0 1 2 3 6 7).*/
#define EFUSE_DIS_DOWNLOAD_MODE (BIT(0))
@ -609,11 +615,17 @@ extern "C" {
#define EFUSE_KEY_PURPOSE_2_S 0
#define EFUSE_RD_REPEAT_DATA3_REG (DR_REG_EFUSE_BASE + 0x03C)
/* EFUSE_RPT4_RESERVED1 : RO ;bitpos:[31:30] ;default: 2'h0 ; */
/* EFUSE_ERR_RST_ENABLE : RO ;bitpos:[31] ;default: 1'h0 ; */
/*description: Use BLOCK0 to check error record registers, 0 - without check.*/
#define EFUSE_ERR_RST_ENABLE (BIT(31))
#define EFUSE_ERR_RST_ENABLE_M (BIT(31))
#define EFUSE_ERR_RST_ENABLE_V 0x1
#define EFUSE_ERR_RST_ENABLE_S 31
/* EFUSE_RPT4_RESERVED1 : RO ;bitpos:[30] ;default: 1'h0 ; */
/*description: Reserved.*/
#define EFUSE_RPT4_RESERVED1 0x00000003
#define EFUSE_RPT4_RESERVED1_M ((EFUSE_RPT4_RESERVED1_V)<<(EFUSE_RPT4_RESERVED1_S))
#define EFUSE_RPT4_RESERVED1_V 0x3
#define EFUSE_RPT4_RESERVED1 (BIT(30))
#define EFUSE_RPT4_RESERVED1_M (BIT(30))
#define EFUSE_RPT4_RESERVED1_V 0x1
#define EFUSE_RPT4_RESERVED1_S 30
/* EFUSE_SECURE_VERSION : RO ;bitpos:[29:14] ;default: 16'h0 ; */
/*description: The value of SECURE_VERSION.*/
@ -645,30 +657,30 @@ extern "C" {
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_M (BIT(5))
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_V 0x1
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_S 5
/* EFUSE_DIS_USB_DOWNLOAD_MODE : RO ;bitpos:[4] ;default: 1'b0 ; */
/*description: The value of DIS_USB_DOWNLOAD_MODE.*/
#define EFUSE_DIS_USB_DOWNLOAD_MODE (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_M (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_V 0x1
#define EFUSE_DIS_USB_DOWNLOAD_MODE_S 4
/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE : RO ;bitpos:[4] ;default: 1'b0 ; */
/*description: The value of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE.*/
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BIT(4))
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_M (BIT(4))
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_V 0x1
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_S 4
/* EFUSE_RPT4_RESERVED8 : RO ;bitpos:[3] ;default: 1'b0 ; */
/*description: Reserved.*/
#define EFUSE_RPT4_RESERVED8 (BIT(3))
#define EFUSE_RPT4_RESERVED8_M (BIT(3))
#define EFUSE_RPT4_RESERVED8_V 0x1
#define EFUSE_RPT4_RESERVED8_S 3
/* EFUSE_UART_PRINT_CHANNEL : RO ;bitpos:[2] ;default: 1'b0 ; */
/*description: The value of UART_PRINT_CHANNEL.*/
#define EFUSE_UART_PRINT_CHANNEL (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_M (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_V 0x1
#define EFUSE_UART_PRINT_CHANNEL_S 2
/* EFUSE_DIS_LEGACY_SPI_BOOT : RO ;bitpos:[1] ;default: 1'b0 ; */
/*description: The value of DIS_LEGACY_SPI_BOOT.*/
#define EFUSE_DIS_LEGACY_SPI_BOOT (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_M (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_V 0x1
#define EFUSE_DIS_LEGACY_SPI_BOOT_S 1
/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT : RO ;bitpos:[2] ;default: 1'b0 ; */
/*description: The value of DIS_USB_SERIAL_JTAG_ROM_PRINT.*/
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_M (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_V 0x1
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_S 2
/* EFUSE_DIS_DIRECT_BOOT : RO ;bitpos:[1] ;default: 1'b0 ; */
/*description: The value of DIS_DIRECT_BOOT.*/
#define EFUSE_DIS_DIRECT_BOOT (BIT(1))
#define EFUSE_DIS_DIRECT_BOOT_M (BIT(1))
#define EFUSE_DIS_DIRECT_BOOT_V 0x1
#define EFUSE_DIS_DIRECT_BOOT_S 1
/* EFUSE_DIS_DOWNLOAD_MODE : RO ;bitpos:[0] ;default: 1'b0 ; */
/*description: The value of DIS_DOWNLOAD_MODE.*/
#define EFUSE_DIS_DOWNLOAD_MODE (BIT(0))
@ -1561,11 +1573,17 @@ extern "C" {
#define EFUSE_KEY_PURPOSE_2_ERR_S 0
#define EFUSE_RD_REPEAT_ERR3_REG (DR_REG_EFUSE_BASE + 0x188)
/* EFUSE_RPT4_RESERVED1_ERR : RO ;bitpos:[31:30] ;default: 2'h0 ; */
/* EFUSE_ERR_RST_ENABLE_ERR : RO ;bitpos:[31] ;default: 1'h0 ; */
/*description: Use BLOCK0 to check error record registers, 0 - without check.*/
#define EFUSE_ERR_RST_ENABLE_ERR (BIT(31))
#define EFUSE_ERR_RST_ENABLE_ERR_M (BIT(31))
#define EFUSE_ERR_RST_ENABLE_ERR_V 0x1
#define EFUSE_ERR_RST_ENABLE_ERR_S 31
/* EFUSE_RPT4_RESERVED1_ERR : RO ;bitpos:[30] ;default: 1'h0 ; */
/*description: Reserved.*/
#define EFUSE_RPT4_RESERVED1_ERR 0x00000003
#define EFUSE_RPT4_RESERVED1_ERR_M ((EFUSE_RPT4_RESERVED1_ERR_V)<<(EFUSE_RPT4_RESERVED1_ERR_S))
#define EFUSE_RPT4_RESERVED1_ERR_V 0x3
#define EFUSE_RPT4_RESERVED1_ERR (BIT(30))
#define EFUSE_RPT4_RESERVED1_ERR_M (BIT(30))
#define EFUSE_RPT4_RESERVED1_ERR_V 0x1
#define EFUSE_RPT4_RESERVED1_ERR_S 30
/* EFUSE_SECURE_VERSION_ERR : RO ;bitpos:[29:14] ;default: 16'h0 ; */
/*description: If any bit in SECURE_VERSION is 1 then it indicates a programming error.*/
@ -1597,30 +1615,30 @@ extern "C" {
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_M (BIT(5))
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_V 0x1
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_S 5
/* EFUSE_DIS_USB_DOWNLOAD_MODE_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */
/*description: If DIS_USB_DOWNLOAD_MODE is 1 then it indicates a programming error.*/
#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_M (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_V 0x1
#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_S 4
/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */
/*description: If DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE is 1 then it indicates a programming error.*/
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR (BIT(4))
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_M (BIT(4))
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_V 0x1
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_S 4
/* EFUSE_RPT4_RESERVED8_ERR : RO ;bitpos:[3] ;default: 1'b0 ; */
/*description: Reserved.*/
#define EFUSE_RPT4_RESERVED8_ERR (BIT(3))
#define EFUSE_RPT4_RESERVED8_ERR_M (BIT(3))
#define EFUSE_RPT4_RESERVED8_ERR_V 0x1
#define EFUSE_RPT4_RESERVED8_ERR_S 3
/* EFUSE_UART_PRINT_CHANNEL_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */
/*description: If UART_PRINT_CHANNEL is 1 then it indicates a programming error.*/
#define EFUSE_UART_PRINT_CHANNEL_ERR (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_ERR_M (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_ERR_V 0x1
#define EFUSE_UART_PRINT_CHANNEL_ERR_S 2
/* EFUSE_DIS_LEGACY_SPI_BOOT_ERR : RO ;bitpos:[1] ;default: 1'b0 ; */
/*description: If DIS_LEGACY_SPI_BOOT is 1 then it indicates a programming error.*/
#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_M (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_V 0x1
#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_S 1
/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */
/*description: If DIS_USB_SERIAL_JTAG_ROM_PRINT is 1 then it indicates a programming error.*/
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_M (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_V 0x1
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_S 2
/* EFUSE_DIS_DIRECT_BOOT_ERR : RO ;bitpos:[1] ;default: 1'b0 ; */
/*description: If DIS_DIRECT_BOOT is 1 then it indicates a programming error.*/
#define EFUSE_DIS_DIRECT_BOOT_ERR (BIT(1))
#define EFUSE_DIS_DIRECT_BOOT_ERR_M (BIT(1))
#define EFUSE_DIS_DIRECT_BOOT_ERR_V 0x1
#define EFUSE_DIS_DIRECT_BOOT_ERR_S 1
/* EFUSE_DIS_DOWNLOAD_MODE_ERR : RO ;bitpos:[0] ;default: 1'b0 ; */
/*description: If DIS_DOWNLOAD_MODE is 1 then it indicates a programming error.*/
#define EFUSE_DIS_DOWNLOAD_MODE_ERR (BIT(0))

51
components/soc/esp32c3/include/soc/efuse_struct.h
View File

@ -73,17 +73,18 @@ typedef volatile struct efuse_dev_s {
} pgm_data3;
union {
struct {
uint32_t dis_download_mode: 1; /*Set this bit to disable download mode (boot_mode[3:0] = 0 1 2 3 6 7).*/
uint32_t dis_legacy_spi_boot: 1; /*Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4).*/
uint32_t uart_print_channel: 1; /*Selectes the default UART print channel. 0: UART0. 1: UART1.*/
uint32_t rpt4_reserved8: 1; /*Reserved (used for four backups method).*/
uint32_t dis_usb_download_mode: 1; /*Set this bit to disable UART download mode through USB.*/
uint32_t enable_security_download: 1; /*Set this bit to enable secure UART download mode.*/
uint32_t uart_print_control: 2; /*Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled.*/
uint32_t rpt4_reserved7: 5; /*Reserved (used for four backups method).*/
uint32_t force_send_resume: 1; /*Set this bit to force ROM code to send a resume command during SPI boot.*/
uint32_t secure_version: 16; /*Secure version (used by ESP-IDF anti-rollback feature).*/
uint32_t rpt4_reserved1: 2; /*Reserved (used for four backups method).*/
uint32_t dis_download_mode: 1; /*Set this bit to disable download mode (boot_mode[3:0] = 0 1 2 3 6 7).*/
uint32_t dis_direct_boot: 1; /*Set this bit to disable direct boot.*/
uint32_t dis_usb_serial_jtag_rom_print: 1; /*Set this bit to disable USB-Serial-JTAG print during rom boot*/
uint32_t rpt4_reserved8: 1; /*Reserved (used for four backups method).*/
uint32_t dis_usb_serial_jtag_download_mode: 1; /*Set this bit to disable download mode through USB-Serial-JTAG.*/
uint32_t enable_security_download: 1; /*Set this bit to enable secure UART download mode.*/
uint32_t uart_print_control: 2; /*Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled.*/
uint32_t rpt4_reserved7: 5; /*Reserved (used for four backups method).*/
uint32_t force_send_resume: 1; /*Set this bit to force ROM code to send a resume command during SPI boot.*/
uint32_t secure_version: 16; /*Secure version (used by ESP-IDF anti-rollback feature).*/
uint32_t rpt4_reserved1: 1; /*Reserved (used for four backups method).*/
uint32_t err_rst_enable: 1; /*Use BLOCK0 to check error record registers, 0 - without check.*/
};
uint32_t val;
} pgm_data4;
@ -155,16 +156,17 @@ typedef volatile struct efuse_dev_s {
union {
struct {
uint32_t dis_download_mode: 1; /*The value of DIS_DOWNLOAD_MODE.*/
uint32_t dis_legacy_spi_boot: 1; /*The value of DIS_LEGACY_SPI_BOOT.*/
uint32_t uart_print_channel: 1; /*The value of UART_PRINT_CHANNEL.*/
uint32_t dis_direct_boot: 1; /*The value of DIS_DIRECT_BOOT.*/
uint32_t dis_usb_serial_jtag_rom_print:1; /*The value of DIS_USB_SERIAL_JTAG_ROM_PRINT.*/
uint32_t rpt4_reserved8: 1; /*Reserved.*/
uint32_t dis_usb_download_mode: 1; /*The value of DIS_USB_DOWNLOAD_MODE.*/
uint32_t dis_usb_serial_jtag_download_mode: 1; /*The value of dis_usb_serial_jtag_download_mode.*/
uint32_t enable_security_download: 1; /*The value of ENABLE_SECURITY_DOWNLOAD.*/
uint32_t uart_print_control: 2; /*The value of UART_PRINT_CONTROL.*/
uint32_t rpt4_reserved7: 5; /*Reserved.*/
uint32_t force_send_resume: 1; /*The value of FORCE_SEND_RESUME.*/
uint32_t secure_version: 16; /*The value of SECURE_VERSION.*/
uint32_t rpt4_reserved1: 2; /*Reserved.*/
uint32_t rpt4_reserved1: 1; /*Reserved.*/
uint32_t err_rst_enable: 1; /*Use BLOCK0 to check error record registers, 0 - without check.*/
};
uint32_t val;
} rd_repeat_data3;
@ -319,17 +321,18 @@ typedef volatile struct efuse_dev_s {
} rd_repeat_err2;
union {
struct {
uint32_t dis_download_mode_err: 1; /*If DIS_DOWNLOAD_MODE is 1 then it indicates a programming error.*/
uint32_t dis_legacy_spi_boot_err: 1; /*If DIS_LEGACY_SPI_BOOT is 1 then it indicates a programming error.*/
uint32_t uart_print_channel_err: 1; /*If UART_PRINT_CHANNEL is 1 then it indicates a programming error.*/
uint32_t dis_download_mode_err: 1; /*If the value is not zero then it indicates a programming error on DIS_DOWNLOAD_MODE.*/
uint32_t dis_direct_boot_err: 1; /*If the value is not zero then it indicates a programming error on DIS_DIRECT_BOOT.*/
uint32_t dis_usb_serial_jtag_rom_print_err:1; /*If the value is not zero then it indicates a programming error on DIS_USB_SERIAL_JTAG_ROM_PRINT.*/
uint32_t rpt4_reserved8_err: 1; /*Reserved.*/
uint32_t dis_usb_download_mode_err: 1; /*If DIS_USB_DOWNLOAD_MODE is 1 then it indicates a programming error.*/
uint32_t enable_security_download_err: 1; /*If ENABLE_SECURITY_DOWNLOAD is 1 then it indicates a programming error.*/
uint32_t uart_print_control_err: 2; /*If any bit in UART_PRINT_CONTROL is 1 then it indicates a programming error.*/
uint32_t dis_usb_serial_jtag_download_mode_err: 1; /*If the value is not zero then it indicates a programming error on DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE.*/
uint32_t enable_security_download_err: 1; /*If the value is not zero then it indicates a programming error on ENABLE_SECURITY_DOWNLOAD.*/
uint32_t uart_print_control_err: 2; /*If the value is not zero then it indicates a programming error on UART_PRINT_CONTROL.*/
uint32_t rpt4_reserved7_err: 5; /*Reserved*/
uint32_t force_send_resume_err: 1; /*If FORCE_SEND_RESUME is 1 then it indicates a programming error.*/
uint32_t secure_version_err: 16; /*If any bit in SECURE_VERSION is 1 then it indicates a programming error.*/
uint32_t rpt4_reserved1_err: 2; /*Reserved.*/
uint32_t force_send_resume_err: 1; /*If the value is not zero then it indicates a programming error on FORCE_SEND_RESUME.*/
uint32_t secure_version_err: 16; /*If the value is not zero then it indicates a programming error on SECURE_VERSION.*/
uint32_t rpt4_reserved1_err: 1; /*Reserved.*/
uint32_t err_rst_enable_err: 1; /*Use BLOCK0 to check error record registers, 0 - without check.*/
};
uint32_t val;
} rd_repeat_err3;

145
components/soc/esp32s3/include/soc/efuse_reg.h
View File

@ -319,11 +319,17 @@ extern "C" {
#define EFUSE_KEY_PURPOSE_2_S 0
#define EFUSE_PGM_DATA4_REG (DR_REG_EFUSE_BASE + 0x010)
/* EFUSE_RPT4_RESERVED1 : RO ;bitpos:[31:30] ;default: 2'h0 ; */
/* EFUSE_DIS_USB_OTG_DOWNLOAD_MODE : RO ;bitpos:[31] ;default: 1'h0 ; */
/*description: Set this bit to disable download through USB-OTG*/
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE (BIT(31))
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_M (BIT(31))
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_V 0x1
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_S 31
/* EFUSE_RPT4_RESERVED1 : RO ;bitpos:[30] ;default: 1'h0 ; */
/*description: Reserved (used for four backups method).*/
#define EFUSE_RPT4_RESERVED1 0x00000003
#define EFUSE_RPT4_RESERVED1_M ((EFUSE_RPT4_RESERVED1_V)<<(EFUSE_RPT4_RESERVED1_S))
#define EFUSE_RPT4_RESERVED1_V 0x3
#define EFUSE_RPT4_RESERVED1 (BIT(30))
#define EFUSE_RPT4_RESERVED1_M (BIT(30))
#define EFUSE_RPT4_RESERVED1_V 0x1
#define EFUSE_RPT4_RESERVED1_S 30
/* EFUSE_SECURE_VERSION : R/W ;bitpos:[29:14] ;default: 16'h0 ; */
/*description: Secure version (used by ESP-IDF anti-rollback feature).*/
@ -374,12 +380,12 @@ extern "C" {
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_M (BIT(5))
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_V 0x1
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_S 5
/* EFUSE_DIS_USB_DOWNLOAD_MODE : R/W ;bitpos:[4] ;default: 1'b0 ; */
/* EFUSE_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE : R/W ;bitpos:[4] ;default: 1'b0 ; */
/*description: Set this bit to disable download through USB.*/
#define EFUSE_DIS_USB_DOWNLOAD_MODE (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_M (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_V 0x1
#define EFUSE_DIS_USB_DOWNLOAD_MODE_S 4
#define EFUSE_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BIT(4))
#define EFUSE_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_M (BIT(4))
#define EFUSE_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_V 0x1
#define EFUSE_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_S 4
/* EFUSE_FLASH_ECC_MODE : R/W ;bitpos:[3] ;default: 1'b0 ; */
/*description: Set this bit to set flsah ecc mode. 0:flash ecc 16to18 byte mode.
1:flash ecc 16to17 byte mode.*/
@ -387,18 +393,18 @@ extern "C" {
#define EFUSE_FLASH_ECC_MODE_M (BIT(3))
#define EFUSE_FLASH_ECC_MODE_V 0x1
#define EFUSE_FLASH_ECC_MODE_S 3
/* EFUSE_UART_PRINT_CHANNEL : R/W ;bitpos:[2] ;default: 1'b0 ; */
/*description: Selectes UART print channel. 0: UART0 1: UART1.*/
#define EFUSE_UART_PRINT_CHANNEL (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_M (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_V 0x1
#define EFUSE_UART_PRINT_CHANNEL_S 2
/* EFUSE_DIS_LEGACY_SPI_BOOT : R/W ;bitpos:[1] ;default: 1'b0 ; */
/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT : R/W ;bitpos:[2] ;default: 1'b0 ; */
/*description: The value of DIS_USB_SERIAL_JTAG_ROM_PRINT.*/
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_M (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_V 0x1
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_S 2
/* EFUSE_DIS_DIRECT_BOOT : R/W ;bitpos:[1] ;default: 1'b0 ; */
/*description: Set this bit to disable Legacy SPI boot mode (boot_mode[3:0] = 4).*/
#define EFUSE_DIS_LEGACY_SPI_BOOT (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_M (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_V 0x1
#define EFUSE_DIS_LEGACY_SPI_BOOT_S 1
#define EFUSE_DIS_DIRECT_BOOT (BIT(1))
#define EFUSE_DIS_DIRECT_BOOT_M (BIT(1))
#define EFUSE_DIS_DIRECT_BOOT_V 0x1
#define EFUSE_DIS_DIRECT_BOOT_S 1
/* EFUSE_DIS_DOWNLOAD_MODE : R/W ;bitpos:[0] ;default: 1'b0 ; */
/*description: Set this bit to disable download mode (boot_mode[3:0] = 0 1 2 3 6 7).*/
#define EFUSE_DIS_DOWNLOAD_MODE (BIT(0))
@ -744,12 +750,18 @@ extern "C" {
#define EFUSE_KEY_PURPOSE_2_V 0xF
#define EFUSE_KEY_PURPOSE_2_S 0
#define EFUSE_RD_REPEAT_DATA3_REG (DR_REG_EFUSE_BASE + 0x03C)
/* EFUSE_RPT4_RESERVED1 : RO ;bitpos:[31:30] ;default: 2'h0 ; */
/*description: Reserved.*/
#define EFUSE_RPT4_RESERVED1 0x00000003
#define EFUSE_RPT4_RESERVED1_M ((EFUSE_RPT4_RESERVED1_V)<<(EFUSE_RPT4_RESERVED1_S))
#define EFUSE_RPT4_RESERVED1_V 0x3
#define EFUSE_RD_REPEAT_DATA3_REG (DR_REG_EFUSE_BASE + 0x3C)
/* EFUSE_DIS_USB_OTG_DOWNLOAD_MODE : RO ;bitpos:[31] ;default: 1'h0 ; */
/*description: Set this bit to disable download through USB-OTG*/
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE (BIT(31))
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_M (BIT(31))
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_V 0x1
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_S 31
/* EFUSE_RPT4_RESERVED1 : RO ;bitpos:[30] ;default: 1'h0 ; */
/*description: Reserved (used for four backups method).*/
#define EFUSE_RPT4_RESERVED1 (BIT(30))
#define EFUSE_RPT4_RESERVED1_M (BIT(30))
#define EFUSE_RPT4_RESERVED1_V 0x1
#define EFUSE_RPT4_RESERVED1_S 30
/* EFUSE_SECURE_VERSION : RO ;bitpos:[29:14] ;default: 16'h0 ; */
/*description: The value of SECURE_VERSION.*/
@ -799,30 +811,30 @@ extern "C" {
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_M (BIT(5))
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_V 0x1
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_S 5
/* EFUSE_DIS_USB_DOWNLOAD_MODE : RO ;bitpos:[4] ;default: 1'b0 ; */
/*description: The value of DIS_USB_DOWNLOAD_MODE.*/
#define EFUSE_DIS_USB_DOWNLOAD_MODE (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_M (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_V 0x1
#define EFUSE_DIS_USB_DOWNLOAD_MODE_S 4
/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE : RO ;bitpos:[4] ;default: 1'b0 ; */
/*description: Set this bit to disable download through USB-Seial-JTAG.*/
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BIT(4))
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_M (BIT(4))
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_V 0x1
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_S 4
/* EFUSE_FLASH_ECC_MODE : RO ;bitpos:[3] ;default: 1'b0 ; */
/*description: The value of FLASH_ECC_MODE.*/
#define EFUSE_FLASH_ECC_MODE (BIT(3))
#define EFUSE_FLASH_ECC_MODE_M (BIT(3))
#define EFUSE_FLASH_ECC_MODE_V 0x1
#define EFUSE_FLASH_ECC_MODE_S 3
/* EFUSE_UART_PRINT_CHANNEL : RO ;bitpos:[2] ;default: 1'b0 ; */
/*description: The value of UART_PRINT_CHANNEL.*/
#define EFUSE_UART_PRINT_CHANNEL (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_M (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_V 0x1
#define EFUSE_UART_PRINT_CHANNEL_S 2
/* EFUSE_DIS_LEGACY_SPI_BOOT : RO ;bitpos:[1] ;default: 1'b0 ; */
/*description: The value of DIS_LEGACY_SPI_BOOT.*/
#define EFUSE_DIS_LEGACY_SPI_BOOT (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_M (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_V 0x1
#define EFUSE_DIS_LEGACY_SPI_BOOT_S 1
/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT : RO ;bitpos:[2] ;default: 1'b0 ; */
/*description: Disable USB-Serial-JTAG print during rom boot.*/
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_M (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_V 0x1
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_S 2
/* EFUSE_DIS_DIRECT_BOOT : RO ;bitpos:[1] ;default: 1'b0 ; */
/*description: Set this bit to disable direct boot.*/
#define EFUSE_DIS_DIRECT_BOOT (BIT(1))
#define EFUSE_DIS_DIRECT_BOOT_M (BIT(1))
#define EFUSE_DIS_DIRECT_BOOT_V 0x1
#define EFUSE_DIS_DIRECT_BOOT_S 1
/* EFUSE_DIS_DOWNLOAD_MODE : RO ;bitpos:[0] ;default: 1'b0 ; */
/*description: The value of DIS_DOWNLOAD_MODE.*/
#define EFUSE_DIS_DOWNLOAD_MODE (BIT(0))
@ -1757,11 +1769,17 @@ extern "C" {
#define EFUSE_KEY_PURPOSE_2_ERR_S 0
#define EFUSE_RD_REPEAT_ERR3_REG (DR_REG_EFUSE_BASE + 0x188)
/* EFUSE_RPT4_RESERVED1_ERR : RO ;bitpos:[31:30] ;default: 2'h0 ; */
/* EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_ERR : RO ;bitpos:[31] ;default: 1'h0 ; */
/*description: Set this bit to disable download through USB-OTG.*/
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_ERR (BIT(31))
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_ERR_M (BIT(31))
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_ERR_V 0x1
#define EFUSE_DIS_USB_OTG_DOWNLOAD_MODE_ERR_S 31
/* EFUSE_RPT4_RESERVED1_ERR : RO ;bitpos:[30] ;default: 1'h0 ; */
/*description: Reserved.*/
#define EFUSE_RPT4_RESERVED1_ERR 0x00000003
#define EFUSE_RPT4_RESERVED1_ERR_M ((EFUSE_RPT4_RESERVED1_ERR_V)<<(EFUSE_RPT4_RESERVED1_ERR_S))
#define EFUSE_RPT4_RESERVED1_ERR_V 0x3
#define EFUSE_RPT4_RESERVED1_ERR (BIT(30))
#define EFUSE_RPT4_RESERVED1_ERR_M (BIT(30))
#define EFUSE_RPT4_RESERVED1_ERR_V 0x1
#define EFUSE_RPT4_RESERVED1_ERR_S 30
/* EFUSE_SECURE_VERSION_ERR : RO ;bitpos:[29:14] ;default: 16'h0 ; */
/*description: If any bit in SECURE_VERSION is 1 then it indicates a programming error.*/
@ -1811,30 +1829,25 @@ extern "C" {
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_M (BIT(5))
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_V 0x1
#define EFUSE_ENABLE_SECURITY_DOWNLOAD_ERR_S 5
/* EFUSE_DIS_USB_DOWNLOAD_MODE_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */
/*description: If DIS_USB_DOWNLOAD_MODE is 1 then it indicates a programming error.*/
#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_M (BIT(4))
#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_V 0x1
#define EFUSE_DIS_USB_DOWNLOAD_MODE_ERR_S 4
/* EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR : RO ;bitpos:[4] ;default: 1'b0 ; */
/*description: If any bits in this filed are 1, then it indicates a programming error..*/
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR (BIT(4))
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_M (BIT(4))
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_V 0x1
#define EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE_ERR_S 4
/* EFUSE_FLASH_ECC_MODE_ERR : RO ;bitpos:[3] ;default: 1'b0 ; */
/*description: If FLASH_ECC_MODE is 1*/
#define EFUSE_FLASH_ECC_MODE_ERR (BIT(3))
#define EFUSE_FLASH_ECC_MODE_ERR_M (BIT(3))
#define EFUSE_FLASH_ECC_MODE_ERR_V 0x1
#define EFUSE_FLASH_ECC_MODE_ERR_S 3
/* EFUSE_UART_PRINT_CHANNEL_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */
/*description: If UART_PRINT_CHANNEL is 1 then it indicates a programming error.*/
#define EFUSE_UART_PRINT_CHANNEL_ERR (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_ERR_M (BIT(2))
#define EFUSE_UART_PRINT_CHANNEL_ERR_V 0x1
#define EFUSE_UART_PRINT_CHANNEL_ERR_S 2
/* EFUSE_DIS_LEGACY_SPI_BOOT_ERR : RO ;bitpos:[1] ;default: 1'b0 ; */
/*description: If DIS_LEGACY_SPI_BOOT is 1 then it indicates a programming error.*/
#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_M (BIT(1))
#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_V 0x1
#define EFUSE_DIS_LEGACY_SPI_BOOT_ERR_S 1
/* EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR : RO ;bitpos:[2] ;default: 1'b0 ; */
/*description: If any bits in this filed are 1, then it indicates a programming error..*/
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_M (BIT(2))
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_V 0x1
#define EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT_ERR_S 2
/* EFUSE_DIS_DOWNLOAD_MODE_ERR : RO ;bitpos:[0] ;default: 1'b0 ; */
/*description: If DIS_DOWNLOAD_MODE is 1 then it indicates a programming error.*/
#define EFUSE_DIS_DOWNLOAD_MODE_ERR (BIT(0))

6
docs/en/api-reference/system/inc/espefuse_summary_ESP32-C3.rst
View File

@ -16,8 +16,8 @@
BTLC_GPIO_ENABLE (BLOCK0) Enable btlc gpio = 0 R/W (0b00)
POWERGLITCH_EN (BLOCK0) Set this bit to enable power glitch function = False R/W (0b0)
POWER_GLITCH_DSENSE (BLOCK0) Sample delay configuration of power glitch = 0 R/W (0b00)
DIS_LEGACY_SPI_BOOT (BLOCK0) Disables Legacy SPI boot mode = False R/W (0b0)
UART_PRINT_CHANNEL (BLOCK0) Selects the default UART for printing boot msg = UART0 R/W (0b0)
DIS_DIRECT_BOOT (BLOCK0) Disables direct boot mode = False R/W (0b0)
DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) Selects the default UART for printing boot msg = UART0 R/W (0b0)
UART_PRINT_CONTROL (BLOCK0) Sets the default UART boot message output mode = Enabled R/W (0b00)
FORCE_SEND_RESUME (BLOCK0) Force ROM code to send a resume command during SPI = False R/W (0b0)
bootduring SPI boot
@ -126,7 +126,7 @@
DIS_USB_DEVICE (BLOCK0) Disables USB DEVICE = False R/W (0b0)
DIS_USB (BLOCK0) Disables the USB OTG hardware = False R/W (0b0)
USB_EXCHG_PINS (BLOCK0) Exchanges USB D+ and D- pins = False R/W (0b0)
DIS_USB_DOWNLOAD_MODE (BLOCK0) Disables use of USB in UART download boot mode = False R/W (0b0)
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Disables download through USB-Serial-JTAG = False R/W (0b0)
Vdd_Spi Config fuses:
PIN_POWER_SELECTION (BLOCK0) GPIO33-GPIO37 power supply selection in ROM code = VDD3P3_CPU R/W (0b0)

6
docs/en/api-reference/system/inc/espefuse_summary_ESP32-S3.rst
View File

@ -38,9 +38,9 @@
FLASH_TPUW (BLOCK0) Configures flash startup delay after SoC power-up, = 0 R/W (0x0)
unit is (ms/2). When the value is 15, delay is 7.
5 ms
DIS_LEGACY_SPI_BOOT (BLOCK0) Disables Legacy SPI boot mode = False R/W (0b0)
UART_PRINT_CHANNEL (BLOCK0) Selects the default UART for printing boot msg = UART0 R/W (0b0)
DIS_USB_DOWNLOAD_MODE (BLOCK0) Disables use of USB in UART download boot mode = False R/W (0b0)
DIS_DIRECT_BOOT (BLOCK0) Disables direct boot mode = False R/W (0b0)
DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) Selects the default UART for printing boot msg = UART0 R/W (0b0)
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Disables download through USB-Serial-JTAG = False R/W (0b0)
UART_PRINT_CONTROL (BLOCK0) Sets the default UART boot message output mode = Enabled R/W (0b00)
FLASH_TYPE (BLOCK0) Selects SPI flash type = 4 data lines R/W (0b0)
FORCE_SEND_RESUME (BLOCK0) Forces ROM code to send an SPI flash resume comman = False R/W (0b0)