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Merge branch 'test/move_rtcio_test_to_test_app' into 'master'

Browse Source 
rtcio: Move unit test to gpio test_apps

Closes IDF-5618

See merge request espressif/esp-idf!19919
This commit is contained in:
Song Ruo Jing 2022-09-13 14:33:42 +08:00
commit 0b048387bc
3 changed files with 55 additions and 17 deletions
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4
components/driver/test_apps/gpio/main/CMakeLists.txt
View File

@ -9,6 +9,10 @@ if(CONFIG_SOC_SDM_SUPPORTED)
list(APPEND srcs "test_sigma_delta_legacy.c")
endif()
if(CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED)
list(APPEND srcs "test_rtcio.c")
endif()
# In order for the cases defined by `TEST_CASE` to be linked into the final elf,
# the component can be registered as WHOLE_ARCHIVE
idf_component_register(SRCS ${srcs}

61
components/driver/test/test_rtcio.c → components/driver/test_apps/gpio/main/test_rtcio.c
View File

@ -3,10 +3,6 @@
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* About test environment UT_T1_GPIO:
* Please connect GPIO18 and GPIO19
*/
#include <stdio.h>
#include <string.h>
#include "esp_system.h"
@ -21,8 +17,6 @@
#include "esp_log.h"
#include "soc/rtc_io_periph.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3, ESP32C2)
#define RTCIO_CHECK(condition) TEST_ASSERT_MESSAGE((condition == ESP_OK), "ret is not ESP_OK")
#define RTCIO_VERIFY(condition, msg) TEST_ASSERT_MESSAGE((condition), msg)
@ -77,14 +71,41 @@ const int s_test_map[TEST_GPIO_PIN_COUNT] = {
GPIO_NUM_20, //GPIO20
GPIO_NUM_21, //GPIO21
};
#elif defined CONFIG_IDF_TARGET_ESP32S3
#define TEST_GPIO_PIN_COUNT 21
const int s_test_map[TEST_GPIO_PIN_COUNT] = {
// GPIO_NUM_0, //GPIO0 // Workaround: GPIO0 is strap pin, can not be used pullup/pulldown test.
GPIO_NUM_1, //GPIO1
GPIO_NUM_2, //GPIO2
GPIO_NUM_3, //GPIO3
GPIO_NUM_4, //GPIO4
GPIO_NUM_5, //GPIO5
GPIO_NUM_6, //GPIO6
GPIO_NUM_7, //GPIO7
GPIO_NUM_8, //GPIO8
GPIO_NUM_9, //GPIO9
GPIO_NUM_10, //GPIO10
GPIO_NUM_11, //GPIO11
GPIO_NUM_12, //GPIO12
GPIO_NUM_13, //GPIO13
GPIO_NUM_14, //GPIO14
GPIO_NUM_15, //GPIO15
GPIO_NUM_16, //GPIO16
GPIO_NUM_17, //GPIO17
GPIO_NUM_18, //GPIO18
GPIO_NUM_19, //GPIO19
GPIO_NUM_20, //GPIO20
GPIO_NUM_21, //GPIO21
};
#endif
/*
* Test output/input function.
*/
TEST_CASE("RTCIO input/output test", "[rtcio]")
TEST_CASE("RTCIO_input/output_test", "[rtcio]")
{
ESP_LOGI(TAG, "RTCIO input/output test");
// init rtcio
for (int i = 0; i < GPIO_PIN_COUNT; i++) {
if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
@ -97,7 +118,7 @@ TEST_CASE("RTCIO input/output test", "[rtcio]")
}
for (int cnt = 0; cnt < TEST_COUNT; cnt++) {
uint32_t level = cnt % 2;
int level = cnt % 2;
ESP_LOGI(TAG, "RTCIO output level %d", level);
for (int i = 0; i < GPIO_PIN_COUNT; i++) {
if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
@ -105,6 +126,7 @@ TEST_CASE("RTCIO input/output test", "[rtcio]")
vTaskDelay(10 / portTICK_PERIOD_MS);
if (rtc_gpio_get_level(i) != level) {
ESP_LOGE(TAG, "RTCIO input/output test err, gpio%d", i);
TEST_FAIL();
}
}
}
@ -124,9 +146,10 @@ TEST_CASE("RTCIO input/output test", "[rtcio]")
* Test pullup/pulldown function.
* Note: extern circuit should not connect.
*/
TEST_CASE("RTCIO pullup/pulldown test", "[rtcio]")
TEST_CASE("RTCIO_pullup/pulldown_test", "[rtcio]")
{
ESP_LOGI(TAG, "RTCIO pullup/pulldown test");
// init rtcio
for (int i = 0; i < TEST_GPIO_PIN_COUNT; i++) {
int num = rtc_io_number_get(s_test_map[i]);
@ -140,7 +163,7 @@ TEST_CASE("RTCIO pullup/pulldown test", "[rtcio]")
}
for (int cnt = 0; cnt < TEST_COUNT; cnt++) {
uint32_t level = cnt % 2;
int level = cnt % 2;
ESP_LOGI(TAG, "RTCIO pull level %d", level);
for (int i = 0; i < TEST_GPIO_PIN_COUNT; i++) {
int num = rtc_io_number_get(s_test_map[i]);
@ -155,6 +178,7 @@ TEST_CASE("RTCIO pullup/pulldown test", "[rtcio]")
vTaskDelay(20 / portTICK_PERIOD_MS);
if (rtc_gpio_get_level(s_test_map[i]) != level) {
ESP_LOGE(TAG, "RTCIO pullup/pulldown test err, gpio%d", s_test_map[i]);
TEST_FAIL();
}
}
}
@ -174,9 +198,10 @@ TEST_CASE("RTCIO pullup/pulldown test", "[rtcio]")
/*
* Test output OD function.
*/
TEST_CASE("RTCIO output OD test", "[rtcio]")
TEST_CASE("RTCIO_output_OD_test", "[rtcio]")
{
ESP_LOGI(TAG, "RTCIO output OD test");
// init rtcio
for (int i = 0; i < GPIO_PIN_COUNT; i++) {
if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
@ -189,7 +214,7 @@ TEST_CASE("RTCIO output OD test", "[rtcio]")
}
for (int cnt = 0; cnt < TEST_COUNT; cnt++) {
uint32_t level = cnt % 2;
int level = cnt % 2;
ESP_LOGI(TAG, "RTCIO output level %d", level);
for (int i = 0; i < GPIO_PIN_COUNT; i++) {
if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
@ -197,6 +222,7 @@ TEST_CASE("RTCIO output OD test", "[rtcio]")
vTaskDelay(10 / portTICK_PERIOD_MS);
if (rtc_gpio_get_level(i) != level) {
ESP_LOGE(TAG, "RTCIO output OD test err, gpio%d", i);
TEST_FAIL();
}
}
}
@ -215,9 +241,10 @@ TEST_CASE("RTCIO output OD test", "[rtcio]")
/*
* Test rtcio hold function.
*/
TEST_CASE("RTCIO output hold test", "[rtcio]")
TEST_CASE("RTCIO_output_hold_test", "[rtcio]")
{
ESP_LOGI(TAG, "RTCIO output hold test");
// init rtcio
for (int i = 0; i < GPIO_PIN_COUNT; i++) {
if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
@ -240,11 +267,12 @@ TEST_CASE("RTCIO output hold test", "[rtcio]")
vTaskDelay(10 / portTICK_PERIOD_MS);
if (rtc_gpio_get_level(i) == 0) {
ESP_LOGE(TAG, "RTCIO hold test err, gpio%d", i);
TEST_FAIL();
}
}
}
//unhold all rtcio.
// unhold all rtcio.
for (int i = 0; i < GPIO_PIN_COUNT; i++) {
if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
RTCIO_CHECK( rtc_gpio_hold_dis(i) );
@ -253,7 +281,7 @@ TEST_CASE("RTCIO output hold test", "[rtcio]")
// check the unhold status
for (int cnt = 0; cnt < 4; cnt++) {
uint32_t level = cnt % 2;
int level = cnt % 2;
ESP_LOGI(TAG, "RTCIO output level %d", level);
for (int i = 0; i < GPIO_PIN_COUNT; i++) {
if (GPIO_IS_VALID_OUTPUT_GPIO(i) && rtc_gpio_is_valid_gpio(i)) {
@ -261,6 +289,7 @@ TEST_CASE("RTCIO output hold test", "[rtcio]")
vTaskDelay(10 / portTICK_PERIOD_MS);
if (rtc_gpio_get_level(i) != level) {
ESP_LOGE(TAG, "RTCIO output OD test err, gpio%d", i);
TEST_FAIL();
}
}
}
@ -275,5 +304,3 @@ TEST_CASE("RTCIO output hold test", "[rtcio]")
}
ESP_LOGI(TAG, "RTCIO hold test over");
}
#endif

7
components/hal/esp32s3/include/hal/rtc_io_ll.h
View File

@ -17,6 +17,7 @@
#include "hal/gpio_types.h"
#include "soc/io_mux_reg.h"
#include "soc/usb_serial_jtag_reg.h"
#include "soc/usb_serial_jtag_struct.h"
#ifdef __cplusplus
extern "C" {
@ -50,6 +51,10 @@ typedef enum {
static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
{
if (func == RTCIO_FUNC_RTC) {
// Disable USB Serial JTAG if pin 19 or pin 20 needs to select the rtc function
if (rtcio_num == rtc_io_num_map[USB_DM_GPIO_NUM] || rtcio_num == rtc_io_num_map[USB_DP_GPIO_NUM]) {
USB_SERIAL_JTAG.conf0.usb_pad_enable = 0;
}
SENS.sar_peri_clk_gate_conf.iomux_clk_en = 1;
// 0: GPIO connected to digital GPIO module. 1: GPIO connected to analog RTC module.
SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux));
@ -58,6 +63,8 @@ static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
} else if (func == RTCIO_FUNC_DIGITAL) {
CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux));
SENS.sar_peri_clk_gate_conf.iomux_clk_en = 0;
// USB Serial JTAG pad re-enable won't be done here (it requires both DM and DP pins not in rtc function)
// Instead, USB_SERIAL_JTAG_USB_PAD_ENABLE needs to be guaranteed to be set in usb_serial_jtag driver
}
}