From ce28af2dd432eee2387258896885240890396436 Mon Sep 17 00:00:00 2001 From: Martin Vychodil Date: Fri, 16 Jul 2021 10:59:23 +0200 Subject: [PATCH] System/memprot: ESP32C3 IRAM section alignment fix (LD) IRAM section didn't contain sufficient padding for possible CPU instruction prefetch, ie instruction fetch could happen in DRAM section which is prohibited by the Memprot module. This is fixed by adding 16B to the end of IRAM section in LD script (C3 CPU prefetch buffer depth is 4 words) Closes IDF-3554 * fix --- components/esp_system/ld/esp32c3/sections.ld.in | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/components/esp_system/ld/esp32c3/sections.ld.in b/components/esp_system/ld/esp32c3/sections.ld.in index 8e27b98018..a4e41e7123 100644 --- a/components/esp_system/ld/esp32c3/sections.ld.in +++ b/components/esp_system/ld/esp32c3/sections.ld.in @@ -368,7 +368,8 @@ SECTIONS /* Marks the end of IRAM code segment */ .iram0.text_end (NOLOAD) : { - /* C3 memprot requires 512 B alignment for split lines */ + /* C3 memprot requires 16B padding for possible CPU prefetch and 512B alignment for PMS split lines */ + . += 16; . = ALIGN (0x200); /* iram_end_test section exists for use by memprot unit tests only */ *(.iram_end_test)