alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity

Merge branch 'feature/c5_rom_bootloader' into 'master'

Browse Source 
feat(c5): update bootloader component for C5

Closes IDF-8653

See merge request espressif/esp-idf!29458
This commit is contained in:
Marius Vikhammer 2024-03-12 16:11:24 +08:00
commit 08d1460f15
4 changed files with 2 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
components/bootloader/subproject/main/ld/esp32c5/beta3/bootloader.ld
View File

@ -6,7 +6,7 @@
/** Simplified memory map for the bootloader. /** Simplified memory map for the bootloader.
* Make sure the bootloader can load into main memory without overwriting itself. * Make sure the bootloader can load into main memory without overwriting itself.
* *
* TODO: [ESP32C5] IDF-8653 Check this file whether need update * TODO: [ESP32C5] IDF-9358 Check this file whether need update for MP ROM
* ESP32-C5 ROM static data usage is as follows: * ESP32-C5 ROM static data usage is as follows:
* - 0x4086b2b8 - 0x4087cbc0: Shared buffers, used in UART/USB/SPI download mode only * - 0x4086b2b8 - 0x4087cbc0: Shared buffers, used in UART/USB/SPI download mode only
* - 0x4087cbc0 - 0x4087ebc0: PRO CPU stack, can be reclaimed as heap after RTOS startup * - 0x4087cbc0 - 0x4087ebc0: PRO CPU stack, can be reclaimed as heap after RTOS startup

23
components/bootloader_support/src/bootloader_utility.c
View File

@ -15,30 +15,7 @@
#include "esp_rom_uart.h" #include "esp_rom_uart.h"
#include "sdkconfig.h" #include "sdkconfig.h"
#if CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32
#include "soc/dport_reg.h"
#include "esp32/rom/cache.h" #include "esp32/rom/cache.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#elif CONFIG_IDF_TARGET_ESP32S3
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/crc.h"
#include "esp32c3/rom/uart.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/crc.h"
#include "esp32c2/rom/rtc.h"
#include "esp32c2/rom/uart.h"
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/crc.h"
#include "esp32c6/rom/rtc.h"
#include "esp32c6/rom/uart.h"
#elif CONFIG_IDF_TARGET_ESP32C5
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/crc.h"
#include "esp32h2/rom/rtc.h"
#include "esp32h2/rom/uart.h"
#elif CONFIG_IDF_TARGET_ESP32P4
#else // CONFIG_IDF_TARGET_*
#error "Unsupported IDF_TARGET"
#endif #endif
#include "esp_rom_spiflash.h" #include "esp_rom_spiflash.h"

9
components/bootloader_support/src/esp_image_format.c
View File

@ -23,15 +23,6 @@
#include "bootloader_memory_utils.h" #include "bootloader_memory_utils.h"
#include "soc/soc_caps.h" #include "soc/soc_caps.h"
#include "hal/cache_ll.h" #include "hal/cache_ll.h"
#if CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32P4
#include "esp32p4/rom/rtc.h"
#endif
#define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1)) #define ALIGN_UP(num, align) (((num) + ((align) - 1)) & ~((align) - 1))

3
components/bootloader_support/test_apps/.build-test-rules.yml
View File

@ -2,6 +2,5 @@
components/bootloader_support/test_apps/rtc_custom_section: components/bootloader_support/test_apps/rtc_custom_section:
enable: enable:
# TODO: [ESP32C5] IDF-8653 - if: SOC_RTC_MEM_SUPPORTED == 1
- if: SOC_RTC_MEM_SUPPORTED == 1 and IDF_TARGET != "esp32c5"
reason: this feature is supported on chips that have RTC memory reason: this feature is supported on chips that have RTC memory