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esp32: add protection for DPORT registers of RSA
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@ -52,7 +52,7 @@ static SemaphoreHandle_t op_complete_sem;
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static IRAM_ATTR void rsa_complete_isr(void *arg)
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{
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BaseType_t higher_woken;
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REG_WRITE(RSA_INTERRUPT_REG, 1);
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DPORT_REG_WRITE(RSA_INTERRUPT_REG, 1);
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xSemaphoreGiveFromISR(op_complete_sem, &higher_woken);
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if (higher_woken) {
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portYIELD_FROM_ISR();
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@ -84,7 +84,7 @@ void esp_mpi_acquire_hardware( void )
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DPORT_REG_CLR_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD);
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while(REG_READ(RSA_CLEAN_REG) != 1);
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while(DPORT_REG_READ(RSA_CLEAN_REG) != 1);
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// Note: from enabling RSA clock to here takes about 1.3us
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@ -167,7 +167,9 @@ static inline int mem_block_to_mpi(mbedtls_mpi *x, uint32_t mem_base, int num_wo
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MBEDTLS_MPI_CHK( mbedtls_mpi_grow(x, num_words) );
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/* Copy data from memory block registers */
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memcpy(x->p, (uint32_t *)mem_base, num_words * 4);
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for (size_t i = 0; i < num_words; ++i) {
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x->p[i] = DPORT_REG_READ(mem_base + i * 4);
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}
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/* Zero any remaining limbs in the bignum, if the buffer is bigger
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than num_words */
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@ -242,17 +244,17 @@ static int calculate_rinv(mbedtls_mpi *Rinv, const mbedtls_mpi *M, int num_words
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static inline void execute_op(uint32_t op_reg)
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{
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/* Clear interrupt status */
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REG_WRITE(RSA_INTERRUPT_REG, 1);
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DPORT_REG_WRITE(RSA_INTERRUPT_REG, 1);
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/* Note: above REG_WRITE includes a memw, so we know any writes
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to the memory blocks are also complete. */
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REG_WRITE(op_reg, 1);
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DPORT_REG_WRITE(op_reg, 1);
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#ifdef CONFIG_MBEDTLS_MPI_USE_INTERRUPT
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if (!xSemaphoreTake(op_complete_sem, 2000 / portTICK_PERIOD_MS)) {
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ESP_LOGE(TAG, "Timed out waiting for RSA operation (op_reg 0x%x int_reg 0x%x)",
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op_reg, REG_READ(RSA_INTERRUPT_REG));
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op_reg, DPORT_REG_READ(RSA_INTERRUPT_REG));
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abort(); /* indicates a fundamental problem with driver */
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}
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#else
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@ -261,7 +263,7 @@ static inline void execute_op(uint32_t op_reg)
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#endif
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/* clear the interrupt */
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REG_WRITE(RSA_INTERRUPT_REG, 1);
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DPORT_REG_WRITE(RSA_INTERRUPT_REG, 1);
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}
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/* Sub-stages of modulo multiplication/exponentiation operations */
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@ -289,10 +291,10 @@ int esp_mpi_mul_mpi_mod(mbedtls_mpi *Z, const mbedtls_mpi *X, const mbedtls_mpi
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mpi_to_mem_block(RSA_MEM_M_BLOCK_BASE, M, num_words);
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
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mpi_to_mem_block(RSA_MEM_RB_BLOCK_BASE, &Rinv, num_words);
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REG_WRITE(RSA_M_DASH_REG, (uint32_t)Mprime);
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DPORT_REG_WRITE(RSA_M_DASH_REG, (uint32_t)Mprime);
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/* "mode" register loaded with number of 512-bit blocks, minus 1 */
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REG_WRITE(RSA_MULT_MODE_REG, (num_words / 16) - 1);
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DPORT_REG_WRITE(RSA_MULT_MODE_REG, (num_words / 16) - 1);
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/* Execute first stage montgomery multiplication */
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execute_op(RSA_MULT_START_REG);
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@ -365,14 +367,14 @@ int mbedtls_mpi_exp_mod( mbedtls_mpi* Z, const mbedtls_mpi* X, const mbedtls_mpi
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esp_mpi_acquire_hardware();
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/* "mode" register loaded with number of 512-bit blocks, minus 1 */
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REG_WRITE(RSA_MODEXP_MODE_REG, (num_words / 16) - 1);
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DPORT_REG_WRITE(RSA_MODEXP_MODE_REG, (num_words / 16) - 1);
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/* Load M, X, Rinv, M-prime (M-prime is mod 2^32) */
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
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mpi_to_mem_block(RSA_MEM_Y_BLOCK_BASE, Y, num_words);
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mpi_to_mem_block(RSA_MEM_M_BLOCK_BASE, M, num_words);
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mpi_to_mem_block(RSA_MEM_RB_BLOCK_BASE, Rinv, num_words);
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REG_WRITE(RSA_M_DASH_REG, Mprime);
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DPORT_REG_WRITE(RSA_M_DASH_REG, Mprime);
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execute_op(RSA_START_MODEXP_REG);
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@ -502,12 +504,12 @@ int mbedtls_mpi_mul_mpi( mbedtls_mpi *Z, const mbedtls_mpi *X, const mbedtls_mpi
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This is OK for now because zeroing is done by hardware when we do esp_mpi_acquire_hardware().
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*/
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REG_WRITE(RSA_M_DASH_REG, 0);
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DPORT_REG_WRITE(RSA_M_DASH_REG, 0);
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/* "mode" register loaded with number of 512-bit blocks in result,
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plus 7 (for range 9-12). (this is ((N~ / 32) - 1) + 8))
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*/
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REG_WRITE(RSA_MULT_MODE_REG, (words_z / 16) + 7);
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DPORT_REG_WRITE(RSA_MULT_MODE_REG, (words_z / 16) + 7);
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execute_op(RSA_MULT_START_REG);
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@ -547,21 +549,21 @@ static int mpi_mult_mpi_failover_mod_mult(mbedtls_mpi *Z, const mbedtls_mpi *X,
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/* M = 2^num_words - 1, so block is entirely FF */
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for(int i = 0; i < num_words; i++) {
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REG_WRITE(RSA_MEM_M_BLOCK_BASE + i * 4, UINT32_MAX);
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DPORT_REG_WRITE(RSA_MEM_M_BLOCK_BASE + i * 4, UINT32_MAX);
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}
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/* Mprime = 1 */
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REG_WRITE(RSA_M_DASH_REG, 1);
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DPORT_REG_WRITE(RSA_M_DASH_REG, 1);
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/* "mode" register loaded with number of 512-bit blocks, minus 1 */
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REG_WRITE(RSA_MULT_MODE_REG, (num_words / 16) - 1);
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DPORT_REG_WRITE(RSA_MULT_MODE_REG, (num_words / 16) - 1);
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/* Load X */
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mpi_to_mem_block(RSA_MEM_X_BLOCK_BASE, X, num_words);
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/* Rinv = 1 */
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REG_WRITE(RSA_MEM_RB_BLOCK_BASE, 1);
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DPORT_REG_WRITE(RSA_MEM_RB_BLOCK_BASE, 1);
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for(int i = 1; i < num_words; i++) {
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REG_WRITE(RSA_MEM_RB_BLOCK_BASE + i * 4, 0);
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DPORT_REG_WRITE(RSA_MEM_RB_BLOCK_BASE + i * 4, 0);
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}
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execute_op(RSA_MULT_START_REG);
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@ -69,9 +69,9 @@
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#define SOC_RTC_DATA_HIGH 0x50002000
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#define DR_REG_DPORT_BASE 0x3ff00000
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#define DR_REG_DPORT_END 0x3ff00FFC
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#define DR_REG_RSA_BASE 0x3ff02000
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#define DR_REG_SHA_BASE 0x3ff03000
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#define DR_REG_DPORT_END 0x3ff03FFC
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#define DR_REG_UART_BASE 0x3ff40000
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#define DR_REG_SPI1_BASE 0x3ff42000
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#define DR_REG_SPI0_BASE 0x3ff43000
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