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Merge branch 'bugfix/workaround_gpio_pullupdown_bug' into 'master'
Work around the GPIO pullup/pulldown SoC bug Some GPIO pins need to have their pullups/pulldowns set in the RTC peripheral instead of in the GPIO peripheral because of a silicon bug. This merge: - Declares PIN_PULLUP_EN and friends as deprecated; they can't really be changed to work around the issue because they get passed an iomux register instead of an io pin number - Adds gpio_pullup_en and friends to the GPIO driver. These functions do have the workaround (as well as all the other functions in the gpio driver) and are meant to easily replace the PIN_PULLUP_EN routines - Fixes some comments in the gpio headers See merge request !200
This commit is contained in:
Jeroen Domburg
commit
078a16f7b4
@ -69,6 +69,74 @@ const uint32_t GPIO_PIN_MUX_REG[GPIO_PIN_COUNT] = {
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GPIO_PIN_REG_39
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};
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const gpio_pu_pd_desc_t gpio_pu_pd_desc[GPIO_PIN_COUNT]={
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{RTC_IO_TOUCH_PAD1_REG, RTC_IO_TOUCH_PAD1_RUE_M, RTC_IO_TOUCH_PAD1_RDE_M},
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{PERIPHS_IO_MUX_U0TXD_U, FUN_PU, FUN_PD},
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{RTC_IO_TOUCH_PAD2_REG, RTC_IO_TOUCH_PAD2_RUE_M, RTC_IO_TOUCH_PAD2_RDE_M},
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{PERIPHS_IO_MUX_U0RXD_U, FUN_PU, FUN_PD},
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{RTC_IO_TOUCH_PAD0_REG, RTC_IO_TOUCH_PAD0_RUE_M, RTC_IO_TOUCH_PAD0_RDE_M},
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{PERIPHS_IO_MUX_GPIO5_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_SD_CLK_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_SD_DATA0_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_SD_DATA1_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_SD_DATA2_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_SD_DATA3_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_SD_CMD_U, FUN_PU, FUN_PD},
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{RTC_IO_TOUCH_PAD5_REG, RTC_IO_TOUCH_PAD5_RUE_M, RTC_IO_TOUCH_PAD5_RDE_M},
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{RTC_IO_TOUCH_PAD4_REG, RTC_IO_TOUCH_PAD4_RUE_M, RTC_IO_TOUCH_PAD4_RDE_M},
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{RTC_IO_TOUCH_PAD6_REG, RTC_IO_TOUCH_PAD6_RUE_M, RTC_IO_TOUCH_PAD6_RDE_M},
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{RTC_IO_TOUCH_PAD3_REG, RTC_IO_TOUCH_PAD3_RUE_M, RTC_IO_TOUCH_PAD3_RDE_M},
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{PERIPHS_IO_MUX_GPIO16_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_GPIO17_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_GPIO18_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_GPIO19_U, FUN_PU, FUN_PD},
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{0,0,0},
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{PERIPHS_IO_MUX_GPIO21_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_GPIO22_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_GPIO23_U, FUN_PU, FUN_PD},
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{0,0,0},
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{RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_RUE_M, RTC_IO_PDAC1_RDE_M},
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{RTC_IO_PAD_DAC2_REG, RTC_IO_PDAC2_RUE_M, RTC_IO_PDAC2_RDE_M},
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{RTC_IO_TOUCH_PAD7_REG, RTC_IO_TOUCH_PAD7_RUE_M, RTC_IO_TOUCH_PAD7_RDE_M},
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{0,0,0},
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{0,0,0},
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{0,0,0},
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{0,0,0},
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{RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32P_RUE_M, RTC_IO_X32P_RDE_M},
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{RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32N_RUE_M, RTC_IO_X32N_RDE_M},
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{PERIPHS_IO_MUX_GPIO34_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_GPIO35_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_GPIO36_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_GPIO37_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_GPIO38_U, FUN_PU, FUN_PD},
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{PERIPHS_IO_MUX_GPIO39_U, FUN_PU, FUN_PD}
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};
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esp_err_t gpio_pullup_en(gpio_num_t gpio_num) {
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GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
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REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
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return ESP_OK;
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}
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esp_err_t gpio_pullup_dis(gpio_num_t gpio_num) {
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GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
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REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
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return ESP_OK;
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}
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esp_err_t gpio_pulldown_en(gpio_num_t gpio_num) {
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GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
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REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
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return ESP_OK;
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}
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esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num) {
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GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
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REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
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return ESP_OK;
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}
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esp_err_t gpio_set_intr_type(gpio_num_t gpio_num, gpio_int_type_t intr_type)
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{
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GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
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@ -152,20 +220,20 @@ esp_err_t gpio_set_pull_mode(gpio_num_t gpio_num, gpio_pull_mode_t pull)
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esp_err_t ret = ESP_OK;
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switch(pull) {
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case GPIO_PULLUP_ONLY:
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PIN_PULLUP_EN(GPIO_PIN_MUX_REG[gpio_num]);
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PIN_PULLDWN_DIS(GPIO_PIN_MUX_REG[gpio_num]);
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REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
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REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
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break;
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case GPIO_PULLDOWN_ONLY:
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PIN_PULLUP_DIS(GPIO_PIN_MUX_REG[gpio_num]);
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PIN_PULLDWN_EN(GPIO_PIN_MUX_REG[gpio_num]);
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REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
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REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
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break;
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case GPIO_PULLUP_PULLDOWN:
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PIN_PULLUP_EN(GPIO_PIN_MUX_REG[gpio_num]);
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PIN_PULLDWN_EN(GPIO_PIN_MUX_REG[gpio_num]);
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REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
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REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
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break;
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case GPIO_FLOATING:
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PIN_PULLUP_DIS(GPIO_PIN_MUX_REG[gpio_num]);
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PIN_PULLDWN_DIS(GPIO_PIN_MUX_REG[gpio_num]);
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REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
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REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
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break;
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default:
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ESP_LOGE(GPIO_TAG, "Unknown pull up/down mode,gpio_num=%u,pull=%u",gpio_num,pull);
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@ -253,15 +321,15 @@ esp_err_t gpio_config(gpio_config_t *pGPIOConfig)
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}
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if(pGPIOConfig->pull_up_en) {
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pu_en = 1;
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PIN_PULLUP_EN(io_reg);
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REG_SET_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pd);
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} else {
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PIN_PULLUP_DIS(io_reg);
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REG_CLR_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pd);
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}
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if(pGPIOConfig->pull_down_en) {
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pd_en = 1;
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PIN_PULLDWN_EN(io_reg);
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REG_SET_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pd);
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} else {
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PIN_PULLDWN_DIS(io_reg);
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REG_CLR_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pd);
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}
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ESP_LOGI(GPIO_TAG, "GPIO[%d]| InputEn: %d| OutputEn: %d| OpenDrain: %d| Pullup: %d| Pulldown: %d| Intr:%d ", io_num, input_en, output_en, od_en, pu_en, pd_en, pGPIOConfig->intr_type);
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gpio_set_intr_type(io_num, pGPIOConfig->intr_type);
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@ -117,6 +117,29 @@ extern const uint32_t GPIO_PIN_MUX_REG[GPIO_PIN_COUNT];
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#define GPIO_IS_VALID_GPIO(gpio_num) ((gpio_num < GPIO_PIN_COUNT && GPIO_PIN_MUX_REG[gpio_num] != 0)) //to decide whether it is a valid GPIO number
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#define GPIO_IS_VALID_OUTPUT_GPIO(gpio_num) ((GPIO_IS_VALID_GPIO(gpio_num)) && (gpio_num < 34)) //to decide whether it can be a valid GPIO number of output mode
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typedef struct {
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uint32_t reg; /*!< Register to modify to enable or disable pullups or pulldowns */
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uint32_t pu; /*!< Bit to set or clear in the above register to enable or disable the pullup, respectively */
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uint32_t pd; /*!< Bit to set or clear in the above register to enable or disable the pulldown, respectively */
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} gpio_pu_pd_desc_t;
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/**
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* Per-GPIO pullup/pulldown information
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* On the ESP32, some GPIOs need their pullups and pulldowns enabled and disabled in the RTC
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* peripheral instead of in the GPIO peripheral. This array documents for every GPIO what bit
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* to set or clear.
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*
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* This array is non-static, so if you need a very quick way of toggling the pull-up/downs, you can just
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* do e.g. REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu); inline.
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*
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* ToDo: Functions using the contents of this array will do a read/modify/write on GPIO as well as RTC
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* registers. We may need to look into muxes/locks for other code that accesses these RTC registers when we
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* write drivers for the RTC stuff.
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*/
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extern const gpio_pu_pd_desc_t gpio_pu_pd_desc[GPIO_PIN_COUNT];
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typedef enum {
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GPIO_NUM_0 = 0, /*!< GPIO0, input and output */
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GPIO_NUM_1 = 1, /*!< GPIO1, input and output */
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@ -220,7 +243,7 @@ esp_err_t gpio_config(gpio_config_t *pGPIOConfig);
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/**
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* @brief GPIO set interrupt trigger type
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*
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* @param gpio_num GPIO number. If you want to set output level of GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param intr_type Interrupt type, select from gpio_int_type_t
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*
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* @return
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@ -233,7 +256,7 @@ esp_err_t gpio_set_intr_type(gpio_num_t gpio_num, gpio_int_type_t intr_type);
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/**
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* @brief Enable GPIO module interrupt signal
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*
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* @param gpio_num GPIO number. If you want to set output level of GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param gpio_num GPIO number. If you want to enable an interrupt on e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
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*
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* @return
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* - ESP_OK Success
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@ -245,7 +268,7 @@ esp_err_t gpio_intr_enable(gpio_num_t gpio_num);
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/**
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* @brief Disable GPIO module interrupt signal
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*
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* @param gpio_num GPIO number. If you want to set output level of GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param gpio_num GPIO number. If you want to disable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
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*
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* @return
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* - ESP_OK success
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@ -257,7 +280,7 @@ esp_err_t gpio_intr_disable(gpio_num_t gpio_num);
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/**
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* @brief GPIO set output level
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*
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* @param gpio_num GPIO number. If you want to set output level of GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param gpio_num GPIO number. If you want to set the output level of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param level Output level. 0: low ; 1: high
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*
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* @return
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@ -270,7 +293,7 @@ esp_err_t gpio_set_level(gpio_num_t gpio_num, uint32_t level);
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/**
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* @brief GPIO get input level
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*
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* @param gpio_num GPIO number. If you want to get level of pin GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param gpio_num GPIO number. If you want to get the logic level of e.g. pin GPIO16, gpio_num should be GPIO_NUM_16 (16);
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*
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* @return
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* - 0 the GPIO input level is 0
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@ -284,7 +307,7 @@ int gpio_get_level(gpio_num_t gpio_num);
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*
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* Configure GPIO direction,such as output_only,input_only,output_and_input
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*
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* @param gpio_num Configure GPIO pins number, it should be GPIO number. If you want to set direction of GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param gpio_num Configure GPIO pins number, it should be GPIO number. If you want to set direction of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param mode GPIO direction
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*
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* @return
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@ -299,7 +322,7 @@ esp_err_t gpio_set_direction(gpio_num_t gpio_num, gpio_mode_t mode);
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*
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* User this Function,configure GPIO pull mode,such as pull-up,pull-down
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*
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* @param gpio_num GPIO number. If you want to set pull up or down mode for GPIO16,gpio_num should be GPIO_NUM_16 (16);
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* @param gpio_num GPIO number. If you want to set pull up or down mode for e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
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* @param pull GPIO pull up/down mode.
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*
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* @return
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@ -354,6 +377,53 @@ esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num);
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*/
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esp_err_t gpio_isr_register(uint32_t gpio_intr_num, void (*fn)(void*), void * arg);
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/**
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* @brief Enable pull-up on GPIO.
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*
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* @param gpio_num GPIO number
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t gpio_pullup_en(gpio_num_t gpio_num);
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/**
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* @brief Disable pull-up on GPIO.
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*
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* @param gpio_num GPIO number
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t gpio_pullup_dis(gpio_num_t gpio_num);
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/**
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* @brief Enable pull-down on GPIO.
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*
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* @param gpio_num GPIO number
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t gpio_pulldown_en(gpio_num_t gpio_num);
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/**
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* @brief Disable pull-down on GPIO.
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*
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* @param gpio_num GPIO number
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num);
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/**
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* *************** ATTENTION ********************/
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/**
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@ -25,6 +25,7 @@
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#include "soc/io_mux_reg.h"
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#include "esp_gdbstub.h"
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#include "driver/gpio.h"
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//Length of buffer used to reserve GDB commands. Has to be at least able to fit the G command, which
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//implies a minimum size of about 320 bytes.
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@ -354,7 +355,7 @@ static int gdbReadCommand() {
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void esp_gdbstub_panic_handler(XtExcFrame *frame) {
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dumpHwToRegfile(frame);
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//Make sure txd/rxd are enabled
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
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gpio_pullup_dis(1);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_U0TXD);
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@ -34,10 +34,41 @@
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#define PIN_INPUT_ENABLE(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME,FUN_IE)
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#define PIN_INPUT_DISABLE(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME,FUN_IE)
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#define PIN_SET_DRV(PIN_NAME, drv) REG_SET_FIELD(PIN_NAME, FUN_DRV, (drv));
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#define PIN_PULLUP_DIS(PIN_NAME) REG_CLR_BIT(PIN_NAME, FUN_PU)
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#define PIN_PULLUP_EN(PIN_NAME) REG_SET_BIT(PIN_NAME, FUN_PU)
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#define PIN_PULLDWN_DIS(PIN_NAME) REG_CLR_BIT(PIN_NAME, FUN_PD)
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#define PIN_PULLDWN_EN(PIN_NAME) REG_SET_BIT(PIN_NAME, FUN_PD)
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/*
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* @attention
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* The PIN_PULL[UP|DWN]_[EN|DIS]() functions used to exist as macros in previous SDK versions.
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* Unfortunately, however, they do not work for some GPIOs on the ESP32 chip, which needs pullups
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* and -downs turned on and off through RTC registers. The functions still exist for compatibility
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* with older code, but are marked as deprecated in order to generate a warning.
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* Please replace them in this fashion: (make sure to include driver/gpio.h as well)
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* PIN_PULLUP_EN(GPIO_PIN_MUX_REG[x]) -> gpio_pullup_en(x)
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* PIN_PULLUP_DIS(GPIO_PIN_MUX_REG[x]) -> gpio_pullup_dis(x)
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* PIN_PULLDWN_EN(GPIO_PIN_MUX_REG[x]) -> gpio_pulldown_en(x)
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* PIN_PULLDWN_DIS(GPIO_PIN_MUX_REG[x]) -> gpio_pulldown_dis(x)
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*
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*/
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static inline void __attribute__ ((deprecated)) PIN_PULLUP_DIS(uint32_t PIN_NAME)
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{
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REG_CLR_BIT(PIN_NAME, FUN_PU);
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}
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||||
|
||||
static inline void __attribute__ ((deprecated)) PIN_PULLUP_EN(uint32_t PIN_NAME)
|
||||
{
|
||||
REG_SET_BIT(PIN_NAME, FUN_PU);
|
||||
}
|
||||
|
||||
static inline void __attribute__ ((deprecated)) PIN_PULLDWN_DIS(uint32_t PIN_NAME)
|
||||
{
|
||||
REG_CLR_BIT(PIN_NAME, FUN_PD);
|
||||
}
|
||||
|
||||
static inline void __attribute__ ((deprecated)) PIN_PULLDWN_EN(uint32_t PIN_NAME)
|
||||
{
|
||||
REG_SET_BIT(PIN_NAME, FUN_PD);
|
||||
}
|
||||
|
||||
|
||||
#define PIN_FUNC_SELECT(PIN_NAME, FUNC) REG_SET_FIELD(PIN_NAME, MCU_SEL, FUNC)
|
||||
|
||||
#define PIN_FUNC_GPIO 2
|
||||
|
||||
Loading…
Reference in New Issue
Block a user