From 0580d68b690351e866323bac23baf2f8ae0c538f Mon Sep 17 00:00:00 2001 From: Wu Zheng Hui Date: Sun, 8 May 2022 17:57:40 +0800 Subject: [PATCH] esp32c2: Support riscv floating-point library selection --- Kconfig | 21 ++++++++++++++++++- components/esp_rom/CMakeLists.txt | 6 +++++- .../esp_rom/esp32c2/Kconfig.soc_caps.in | 4 ++++ components/esp_rom/esp32c2/esp_rom_caps.h | 1 + .../system/build_test/sdkconfig.ci.rvfplib | 2 ++ 5 files changed, 32 insertions(+), 2 deletions(-) create mode 100644 tools/test_apps/system/build_test/sdkconfig.ci.rvfplib diff --git a/Kconfig b/Kconfig index 22f48ffb28..07e679e19e 100644 --- a/Kconfig +++ b/Kconfig @@ -278,6 +278,26 @@ mainmenu "Espressif IoT Development Framework Configuration" endchoice # assertions + choice COMPILER_FLOAT_LIB_FROM + prompt "Compiler float lib source" + default COMPILER_FLOAT_LIB_FROM_RVFPLIB if ESP_ROM_HAS_RVFPLIB + default COMPILER_FLOAT_LIB_FROM_GCCLIB + help + In the soft-fp part of libgcc, riscv version is written in C, + and handles all edge cases in IEEE754, which makes it larger + and performance is slow. + + RVfplib is an optimized RISC-V library for FP arithmetic on 32-bit + integer processors, for single and double-precision FP. + RVfplib is "fast", but it has a few exceptions from IEEE 754 compliance. + + config COMPILER_FLOAT_LIB_FROM_GCCLIB + bool "libgcc" + config COMPILER_FLOAT_LIB_FROM_RVFPLIB + depends on ESP_ROM_HAS_RVFPLIB + bool "librvfp" + endchoice # COMPILER_FLOAT_LIB_FROM + config COMPILER_OPTIMIZATION_ASSERTION_LEVEL int default 0 if COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE @@ -418,7 +438,6 @@ mainmenu "Espressif IoT Development Framework Configuration" If enabled, RTL files will be produced during compilation. These files can be used by other tools, for example to calculate call graphs. - endmenu # Compiler Options menu "Component config" diff --git a/components/esp_rom/CMakeLists.txt b/components/esp_rom/CMakeLists.txt index 03da151226..17eecab140 100644 --- a/components/esp_rom/CMakeLists.txt +++ b/components/esp_rom/CMakeLists.txt @@ -58,7 +58,11 @@ if(target STREQUAL "linux") else() target_linker_script(${COMPONENT_LIB} INTERFACE "${target}/${ld_folder}/${target}.rom.ld") rom_linker_script("api") - rom_linker_script("libgcc") + if(CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB) + rom_linker_script("libgcc") + else() + rom_linker_script("rvfp") + endif() endif() idf_build_get_property(time_t_size TIME_T_SIZE) diff --git a/components/esp_rom/esp32c2/Kconfig.soc_caps.in b/components/esp_rom/esp32c2/Kconfig.soc_caps.in index 0d492df06a..162e79190c 100644 --- a/components/esp_rom/esp32c2/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32c2/Kconfig.soc_caps.in @@ -22,3 +22,7 @@ config ESP_ROM_HAS_RETARGETABLE_LOCKING config ESP_ROM_GET_CLK_FREQ bool default y + +config ESP_ROM_HAS_RVFPLIB + bool + default y diff --git a/components/esp_rom/esp32c2/esp_rom_caps.h b/components/esp_rom/esp32c2/esp_rom_caps.h index 84a95c1692..9574825971 100644 --- a/components/esp_rom/esp32c2/esp_rom_caps.h +++ b/components/esp_rom/esp32c2/esp_rom_caps.h @@ -11,3 +11,4 @@ #define ESP_ROM_UART_CLK_IS_XTAL (1) // UART clock source is selected to XTAL in ROM #define ESP_ROM_HAS_RETARGETABLE_LOCKING (1) // ROM was built with retargetable locking #define ESP_ROM_GET_CLK_FREQ (1) // Get clk frequency with rom function `ets_get_cpu_frequency` +#define ESP_ROM_HAS_RVFPLIB (1) // ROM has the rvfplib diff --git a/tools/test_apps/system/build_test/sdkconfig.ci.rvfplib b/tools/test_apps/system/build_test/sdkconfig.ci.rvfplib new file mode 100644 index 0000000000..09e782b75c --- /dev/null +++ b/tools/test_apps/system/build_test/sdkconfig.ci.rvfplib @@ -0,0 +1,2 @@ +CONFIG_IDF_TARGET="esp32c2" +CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB=y