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esp32s2beta: Fix heap memory regions when SPIRAM is disabled

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Angus Gratton 2019-06-07 18:01:28 +10:00 committed by suda-morris
parent b2e8d30414
commit 047aca97e8
2 changed files with 2 additions and 2 deletions
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2
components/soc/esp32s2beta/include/soc/soc.h
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@ -57,7 +57,7 @@
#define PRO_CPU_NUM (0)
#define SOC_MAX_CONTIGUOUS_RAM_SIZE 0x400000 ///< Largest span of contiguous memory (DRAM or IRAM) in the address space
#define SOC_MAX_CONTIGUOUS_RAM_SIZE (SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW) ///< Largest span of contiguous memory (DRAM or IRAM) in the address space
#define DR_REG_SYSTEM_BASE 0x3f4c0000
#define DR_REG_SENSITIVE_BASE 0x3f4c1000

2
components/soc/esp32s2beta/soc_memory_layout.c
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@ -67,7 +67,7 @@ Because of requirements in the coalescing code which merges adjacent regions, th
from low to high start address.
*/
const soc_memory_region_t soc_memory_regions[] = {
#ifdef CONFIG_SPIRAM_SUPPORT
#ifdef CONFIG_ESP32S2_SPIRAM_SUPPORT
{ SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW, 4, 0}, //SPI SRAM, if available
#if CONFIG_USE_AHB_DBUS3_ACCESS_SPIRAM
{ SOC_SLOW_EXTRAM_DATA_LOW, SOC_SLOW_EXTRAM_DATA_HIGH - SOC_SLOW_EXTRAM_DATA_LOW, 5, 0}, //SPI SRAM, if available