Merge branch 'bugfix/no_more_public_adc2_dma_on_c3_s3_v4.4' into 'release/v4.4'

adc: no longer support adc2 continuous mode on esp32c3 and esp32s3 (v4.4)

See merge request espressif/esp-idf!21649

components/driver/Kconfig

@@ -19,6 +19,28 @@ menu "Driver configurations"
 
                 For testing, disable this option so that we can measure the output of DAC by internal ADC.
 
+        config ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3
+            depends on IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3
+            bool "Force use ADC2 continumous mode on ESP32S3 or ESP32C3"
+            default n
+            help
+                On ESP32C3 and ESP32S3, ADC2 Digital Controller is not stable. Therefore,
+                ADC2 continuous mode is not suggested on ESP32S3 and ESP32C3
+
+                If you stick to this, you can enable this option to force use ADC2 under above conditions.
+                For more details, you can search for errata on espressif website.
+
+        config ADC_ONESHOT_FORCE_USE_ADC2_ON_C3
+            depends on IDF_TARGET_ESP32C3
+            bool "Force use ADC2 oneshot mode on ESP32C3"
+            default n
+            help
+                On ESP32C3, ADC2 Digital Controller is not stable. Therefore,
+                ADC2 oneshot mode is not suggested on ESP32C3
+
+                If you stick to this, you can enable this option to force use ADC2 under above conditions.
+                For more details, you can search for errata on espressif website.
+
     endmenu  # ADC Configuration
 
     menu "MCPWM configuration"

components/driver/adc.c

@@ -569,8 +569,21 @@ esp_err_t adc_digi_controller_configure(const adc_digi_configuration_t *config)
 #else
     for (int i = 0; i < config->pattern_num; i++) {
         ESP_RETURN_ON_FALSE((config->adc_pattern[i].bit_width == SOC_ADC_DIGI_MAX_BITWIDTH), ESP_ERR_INVALID_ARG, ADC_TAG, "ADC bitwidth not supported");
+#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
+        //we add this error log to hint users what happened
+        if (SOC_ADC_DIG_SUPPORTED_UNIT(config->adc_pattern[i].unit) == 0) {
+            ESP_LOGE(ADC_TAG, "ADC2 continuous mode is no longer supported, please use ADC1. Search for errata on espressif website for more details. You can enable CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3 to force use ADC2");
+        }
+#endif  //CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3
+#if !CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3
+        /**
+         * On all continuous mode supported chips, we will always check the unit to see if it's a continuous mode supported unit.
+         * However, on ESP32C3 and ESP32S3, we will jump this check, if `CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3` is enabled.
+         */
+        ESP_RETURN_ON_FALSE(SOC_ADC_DIG_SUPPORTED_UNIT(config->adc_pattern[i].unit), ESP_ERR_INVALID_ARG, ADC_TAG, "Only support using ADC1 DMA mode");
+#endif  //#if !CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3
     }
-#endif
+#endif  //#if CONFIG_IDF_TARGET_ESP32
     ESP_RETURN_ON_FALSE(config->sample_freq_hz <= SOC_ADC_SAMPLE_FREQ_THRES_HIGH && config->sample_freq_hz >= SOC_ADC_SAMPLE_FREQ_THRES_LOW, ESP_ERR_INVALID_ARG, ADC_TAG, "ADC sampling frequency out of range");
 #if CONFIG_IDF_TARGET_ESP32
     ESP_RETURN_ON_FALSE(config->conv_limit_en == 1, ESP_ERR_INVALID_ARG, ADC_TAG, "`conv_limit_en` should be set to 1");
@@ -731,6 +744,11 @@ esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten)
 
 esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *raw_out)
 {
+#if !CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3
+    ESP_LOGE(ADC_TAG, "ADC2 is no longer supported, please use ADC1. Search for errata on espressif website for more details. You can enable ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 to force use ADC2");
+    ESP_RETURN_ON_FALSE(SOC_ADC_DIG_SUPPORTED_UNIT(ADC_UNIT_2), ESP_ERR_INVALID_ARG, ADC_TAG, "adc unit not supported");
+#endif
+
     //On ESP32C3, the data width is always 12-bits.
     if (width_bit != ADC_WIDTH_BIT_12) {
         return ESP_ERR_INVALID_ARG;

components/driver/test/test_adc.c

@@ -290,6 +290,9 @@ TEST_CASE("test_adc_single", "[adc][ignore][manual]")
 /********************************************************************************
  *      ADC Speed Related Tests
  ********************************************************************************/
+//ESP32C3 ADC2 oneshot mode is not supported anymore
+#define ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2    ((SOC_ADC_PERIPH_NUM >= 2) && !CONFIG_IDF_TARGET_ESP32C3)
+
 #ifdef CONFIG_IDF_TARGET_ESP32
 #define CPU_FREQ_MHZ                    CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
 #elif CONFIG_IDF_TARGET_ESP32S2
@@ -374,26 +377,34 @@ TEST_CASE("test_adc_single_cali_time", "[adc][ignore][manual]")
 {
     ESP_LOGI(TAG, "CPU FREQ is %dMHz", CPU_FREQ_MHZ);
     uint32_t adc1_time_record[4][TIMES_PER_ATTEN] = {};
-    uint32_t adc2_time_record[4][TIMES_PER_ATTEN] = {};
     int adc1_raw = 0;
-    int adc2_raw = 0;
 
     //atten0 ~ atten3
     for (int i = 0; i < 4; i++) {
         ESP_LOGI(TAG, "----------------atten%d----------------", i);
         adc_single_cali_init(ADC_UNIT_1, ADC1_CALI_TEST_CHAN0, i);
+
+        for (int j = 0; j < TIMES_PER_ATTEN; j++) {
+            adc1_raw = adc1_get_raw(ADC1_CALI_TEST_CHAN0);
+            adc1_time_record[i][j] = get_cali_time_in_ccount(adc1_raw, &adc1_chars);
+            IDF_LOG_PERFORMANCE("ADC1 Cali time", "%d us", (int)GET_US_BY_CCOUNT(adc1_time_record[i][j]));
+        }
+    }
+
+#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
+    int adc2_raw = 0;
+    uint32_t adc2_time_record[4][TIMES_PER_ATTEN] = {};
+
+    //atten0 ~ atten3
+    for (int i = 0; i < 4; i++) {
+        ESP_LOGI(TAG, "----------------atten%d----------------", i);
         adc_single_cali_init(ADC_UNIT_2, ADC2_CALI_TEST_CHAN0, i);
 
         for (int j = 0; j < TIMES_PER_ATTEN; j++) {
-
-            adc1_raw = adc1_get_raw(ADC1_CALI_TEST_CHAN0);
             TEST_ESP_OK(adc2_get_raw(ADC2_CALI_TEST_CHAN0, ADC_WIDTH_BIT_DEFAULT, &adc2_raw));
-
-            adc1_time_record[i][j] = get_cali_time_in_ccount(adc1_raw, &adc1_chars);
             adc2_time_record[i][j] = get_cali_time_in_ccount(adc2_raw, &adc2_chars);
-
-            IDF_LOG_PERFORMANCE("ADC1 Cali time", "%d us", (int)GET_US_BY_CCOUNT(adc1_time_record[i][j]));
             IDF_LOG_PERFORMANCE("ADC2 Cali time", "%d us", (int)GET_US_BY_CCOUNT(adc2_time_record[i][j]));
         }
     }
+#endif  //#if ADC_TEST_ONESHOT_HIGH_LOW_TEST_ADC2
 }

components/soc/esp32/include/soc/soc_caps.h

@@ -80,6 +80,7 @@
 /*!< SAR ADC Module*/
 #define SOC_ADC_RTC_CTRL_SUPPORTED              1
 #define SOC_ADC_DIG_CTRL_SUPPORTED              1
+#define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT)        ((UNIT == 0) ? 1 : 0)
 #define SOC_ADC_PERIPH_NUM                      (2)
 #define SOC_ADC_CHANNEL_NUM(PERIPH_NUM)         ((PERIPH_NUM==0)? 8: 10)
 #define SOC_ADC_MAX_CHANNEL_NUM                 (10)

components/soc/esp32c3/include/soc/soc_caps.h

@@ -48,6 +48,7 @@
 #define SOC_ADC_ARBITER_SUPPORTED               1
 #define SOC_ADC_FILTER_SUPPORTED                1
 #define SOC_ADC_MONITOR_SUPPORTED               1
+#define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT)        ((UNIT == 0) ? 1 : 0)    //Digital controller supported ADC unit
 #define SOC_ADC_PERIPH_NUM                      (2)
 #define SOC_ADC_CHANNEL_NUM(PERIPH_NUM)         ((PERIPH_NUM==0)? 5 : 1)
 #define SOC_ADC_MAX_CHANNEL_NUM                 (5)

components/soc/esp32h2/include/soc/soc_caps.h

@@ -37,6 +37,7 @@
 #define SOC_ADC_ARBITER_SUPPORTED               1
 #define SOC_ADC_FILTER_SUPPORTED                1
 #define SOC_ADC_MONITOR_SUPPORTED               1
+#define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT)        ((UNIT == 0) ? 1 : 0)    //Digital controller supported ADC unit
 #define SOC_ADC_PERIPH_NUM                      (2)
 #define SOC_ADC_CHANNEL_NUM(PERIPH_NUM)         ((PERIPH_NUM==0)? 5 : 1)
 #define SOC_ADC_MAX_CHANNEL_NUM                 (5)

components/soc/esp32s2/include/soc/soc_caps.h

@@ -61,6 +61,7 @@
 #define SOC_ADC_ARBITER_SUPPORTED               1
 #define SOC_ADC_FILTER_SUPPORTED                1
 #define SOC_ADC_MONITOR_SUPPORTED               1
+#define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT)        1    //Digital controller supported ADC unit
 #define SOC_ADC_PERIPH_NUM                      (2)
 #define SOC_ADC_CHANNEL_NUM(PERIPH_NUM)         (10)
 #define SOC_ADC_MAX_CHANNEL_NUM                 (10)

components/soc/esp32s3/include/soc/soc_caps.h

@@ -51,6 +51,7 @@
 #define SOC_ADC_ARBITER_SUPPORTED               1
 #define SOC_ADC_FILTER_SUPPORTED                1
 #define SOC_ADC_MONITOR_SUPPORTED               1
+#define SOC_ADC_DIG_SUPPORTED_UNIT(UNIT)        ((UNIT == 0) ? 1 : 0)    //Digital controller supported ADC unit
 #define SOC_ADC_PERIPH_NUM                      (2)
 #define SOC_ADC_CHANNEL_NUM(PERIPH_NUM)         (10)
 #define SOC_ADC_MAX_CHANNEL_NUM                 (10)

docs/en/api-reference/peripherals/adc.rst

@@ -126,9 +126,18 @@ ADC Limitations
     .. only:: esp32c3
 
         - A specific ADC module can only work under one operating mode at any one time, either Continuous Read Mode or Single Read Mode.
-        - ADC1 and ADC2 can not work under Singel Read Mode simultaneously. One of them will get blocked until another one finishes.
         - For continuous (DMA) read mode, the ADC sampling frequency (the ``sample_freq_hz`` member of :cpp:type:`adc_digi_config_t`) should be within ``SOC_ADC_SAMPLE_FREQ_THRES_LOW`` and ``SOC_ADC_SAMPLE_FREQ_THRES_HIGH``.
 
+    .. only:: esp32c3
+
+        - ADC2 oneshot mode is no longer supported, due to hardware limitation. The results are not stable. This issue can be found in `ESP32C3 Errata <https://www.espressif.com/sites/default/files/documentation/esp32-c3_errata_en.pdf>`. For compatibility, you can enable :ref:`CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3` to force use ADC2.
+
+       - ADC2 continuous (DMA) mode is no longer supported, due to hardware limitation. The results are not stable. This issue can be found in `ESP32C3 Errata <https://www.espressif.com/sites/default/files/documentation/esp32-c3_errata_en.pdf>`. For compatibility, you can enable :ref:`CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3` to force use ADC2.
+
+    .. only:: esp32s3
+
+        - ADC2 continuous mode is no longer supported, due to hardware limitation. The results are not stable. This issue can be found in `ESP32S3 Errata <https://www.espressif.com/sites/default/files/documentation/esp32-s3_errata_en.pdf>`. For compatibility, you can enable :ref:`CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3` to force use ADC2.
+
 Driver Usage
 ------------
 

examples/peripherals/adc/dma_read/main/adc_dma_example_main.c

@@ -17,41 +17,37 @@
 #define GET_UNIT(x)        ((x>>3) & 0x1)
 
 #if CONFIG_IDF_TARGET_ESP32
-#define ADC_RESULT_BYTE     2
+#define ADC_RESULT_BYTE                 2
-#define ADC_CONV_LIMIT_EN   1                       //For ESP32, this should always be set to 1
+#define ADC_CONV_LIMIT_EN               1                       //For ESP32, this should always be set to 1
-#define ADC_CONV_MODE       ADC_CONV_SINGLE_UNIT_1  //ESP32 only supports ADC1 DMA mode
+#define ADC_OUTPUT_TYPE                 ADC_DIGI_OUTPUT_FORMAT_TYPE1
-#define ADC_OUTPUT_TYPE     ADC_DIGI_OUTPUT_FORMAT_TYPE1
+#define EXAMPLE_ADC_USE_OUTPUT_TYPE1    1
+#define ADC_CONV_MODE                   ADC_CONV_SINGLE_UNIT_1
 #elif CONFIG_IDF_TARGET_ESP32S2
-#define ADC_RESULT_BYTE     2
+#define ADC_RESULT_BYTE                 2
-#define ADC_CONV_LIMIT_EN   0
+#define ADC_CONV_LIMIT_EN               0
-#define ADC_CONV_MODE       ADC_CONV_BOTH_UNIT
+#define ADC_OUTPUT_TYPE                 ADC_DIGI_OUTPUT_FORMAT_TYPE2
-#define ADC_OUTPUT_TYPE     ADC_DIGI_OUTPUT_FORMAT_TYPE2
+#define ADC_CONV_MODE                   ADC_CONV_BOTH_UNIT
-#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32S3
-#define ADC_RESULT_BYTE     4
+#define ADC_RESULT_BYTE                 4
-#define ADC_CONV_LIMIT_EN   0
+#define ADC_CONV_LIMIT_EN               0
-#define ADC_CONV_MODE       ADC_CONV_ALTER_UNIT     //ESP32C3 only supports alter mode
+#define ADC_OUTPUT_TYPE                 ADC_DIGI_OUTPUT_FORMAT_TYPE2
-#define ADC_OUTPUT_TYPE     ADC_DIGI_OUTPUT_FORMAT_TYPE2
+#define ADC_CONV_MODE                   ADC_CONV_SINGLE_UNIT_1
-#elif CONFIG_IDF_TARGET_ESP32S3
-#define ADC_RESULT_BYTE     4
-#define ADC_CONV_LIMIT_EN   0
-#define ADC_CONV_MODE       ADC_CONV_BOTH_UNIT
-#define ADC_OUTPUT_TYPE     ADC_DIGI_OUTPUT_FORMAT_TYPE2
 #endif
 
-#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
-static uint16_t adc1_chan_mask = BIT(2) | BIT(3);
-static uint16_t adc2_chan_mask = BIT(0);
-static adc_channel_t channel[3] = {ADC1_CHANNEL_2, ADC1_CHANNEL_3, (ADC2_CHANNEL_0 | 1 << 3)};
-#endif
-#if CONFIG_IDF_TARGET_ESP32S2
-static uint16_t adc1_chan_mask = BIT(2) | BIT(3);
-static uint16_t adc2_chan_mask = BIT(0);
-static adc_channel_t channel[3] = {ADC1_CHANNEL_2, ADC1_CHANNEL_3, (ADC2_CHANNEL_0 | 1 << 3)};
-#endif
 #if CONFIG_IDF_TARGET_ESP32
 static uint16_t adc1_chan_mask = BIT(7);
 static uint16_t adc2_chan_mask = 0;
 static adc_channel_t channel[1] = {ADC1_CHANNEL_7};
+
+#elif CONFIG_IDF_TARGET_ESP32S2
+static uint16_t adc1_chan_mask = BIT(2) | BIT(3);
+static uint16_t adc2_chan_mask = BIT(0);
+static adc_channel_t channel[3] = {ADC1_CHANNEL_2, ADC1_CHANNEL_3, (ADC2_CHANNEL_0 | 1 << 3)};
+
+#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
+static uint16_t adc1_chan_mask = BIT(2) | BIT(3);
+static uint16_t adc2_chan_mask = 0;
+static adc_channel_t channel[2] = {ADC1_CHANNEL_2, ADC1_CHANNEL_3};
 #endif
 
 static const char *TAG = "ADC DMA";
@@ -92,16 +88,24 @@ static void continuous_adc_init(uint16_t adc1_chan_mask, uint16_t adc2_chan_mask
     ESP_ERROR_CHECK(adc_digi_controller_configure(&dig_cfg));
 }
 
-#if !CONFIG_IDF_TARGET_ESP32
 static bool check_valid_data(const adc_digi_output_data_t *data)
 {
-    const unsigned int unit = data->type2.unit;
+#if EXAMPLE_ADC_USE_OUTPUT_TYPE1
-    if (unit > 2) return false;
+    if (data->type1.channel >= SOC_ADC_CHANNEL_NUM(ADC_UNIT_1)) {
-    if (data->type2.channel >= SOC_ADC_CHANNEL_NUM(unit)) return false;
+        return false;
+    }
+#else
+    int unit = data->type2.unit;
+    if (unit >= ADC_UNIT_2) {
+        return false;
+    }
+    if (data->type2.channel >= SOC_ADC_CHANNEL_NUM(unit)) {
+        return false;
+    }
+#endif
 
     return true;
 }
-#endif
 
 void app_main(void)
 {
@@ -137,25 +141,15 @@ void app_main(void)
             ESP_LOGI("TASK:", "ret is %x, ret_num is %d", ret, ret_num);
             for (int i = 0; i < ret_num; i += ADC_RESULT_BYTE) {
                 adc_digi_output_data_t *p = (void*)&result[i];
-    #if CONFIG_IDF_TARGET_ESP32
+                if (check_valid_data(p)) {
-                ESP_LOGI(TAG, "Unit: %d, Channel: %d, Value: %x", 1, p->type1.channel, p->type1.data);
+            #if EXAMPLE_ADC_USE_OUTPUT_TYPE1
-    #else
-                if (ADC_CONV_MODE == ADC_CONV_BOTH_UNIT || ADC_CONV_MODE == ADC_CONV_ALTER_UNIT) {
-                    if (check_valid_data(p)) {
-                        ESP_LOGI(TAG, "Unit: %d,_Channel: %d, Value: %x", p->type2.unit+1, p->type2.channel, p->type2.data);
-                    } else {
-                        // abort();
-                        ESP_LOGI(TAG, "Invalid data [%d_%d_%x]", p->type2.unit+1, p->type2.channel, p->type2.data);
-                    }
-                }
-    #if CONFIG_IDF_TARGET_ESP32S2
-                else if (ADC_CONV_MODE == ADC_CONV_SINGLE_UNIT_2) {
-                    ESP_LOGI(TAG, "Unit: %d, Channel: %d, Value: %x", 2, p->type1.channel, p->type1.data);
-                } else if (ADC_CONV_MODE == ADC_CONV_SINGLE_UNIT_1) {
                     ESP_LOGI(TAG, "Unit: %d, Channel: %d, Value: %x", 1, p->type1.channel, p->type1.data);
+            #else
+                    ESP_LOGI(TAG, "Unit: %d,_Channel: %d, Value: %x", p->type2.unit + 1, p->type2.channel, p->type2.data);
+            #endif
+                } else {
+                    ESP_LOGI(TAG, "Invalid data");
                 }
-    #endif  //#if CONFIG_IDF_TARGET_ESP32S2
-    #endif
             }
             //See `note 1`
             vTaskDelay(1);

examples/peripherals/adc/single_read/single_read/main/single_read.c

@@ -51,7 +51,10 @@ static int adc_raw[2][10];
 static const char *TAG = "ADC SINGLE";
 
 static esp_adc_cal_characteristics_t adc1_chars;
+#if !CONFIG_IDF_TARGET_ESP32C3
+//ESP32C3 ADC2 single mode is no longer supported
 static esp_adc_cal_characteristics_t adc2_chars;
+#endif
 
 static bool adc_calibration_init(void)
 {
@@ -66,7 +69,9 @@ static bool adc_calibration_init(void)
     } else if (ret == ESP_OK) {
         cali_enable = true;
         esp_adc_cal_characterize(ADC_UNIT_1, ADC_EXAMPLE_ATTEN, ADC_WIDTH_BIT_DEFAULT, 0, &adc1_chars);
+#if !CONFIG_IDF_TARGET_ESP32C3
         esp_adc_cal_characterize(ADC_UNIT_2, ADC_EXAMPLE_ATTEN, ADC_WIDTH_BIT_DEFAULT, 0, &adc2_chars);
+#endif
     } else {
         ESP_LOGE(TAG, "Invalid arg");
     }
@@ -76,15 +81,16 @@ static bool adc_calibration_init(void)
 
 void app_main(void)
 {
-    esp_err_t ret = ESP_OK;
     uint32_t voltage = 0;
     bool cali_enable = adc_calibration_init();
 
     //ADC1 config
     ESP_ERROR_CHECK(adc1_config_width(ADC_WIDTH_BIT_DEFAULT));
     ESP_ERROR_CHECK(adc1_config_channel_atten(ADC1_EXAMPLE_CHAN0, ADC_EXAMPLE_ATTEN));
+#if !CONFIG_IDF_TARGET_ESP32C3
     //ADC2 config
     ESP_ERROR_CHECK(adc2_config_channel_atten(ADC2_EXAMPLE_CHAN0, ADC_EXAMPLE_ATTEN));
+#endif
 
     while (1) {
         adc_raw[0][0] = adc1_get_raw(ADC1_EXAMPLE_CHAN0);
@@ -95,6 +101,8 @@ void app_main(void)
         }
         vTaskDelay(pdMS_TO_TICKS(1000));
 
+#if !CONFIG_IDF_TARGET_ESP32C3
+        esp_err_t ret = ESP_OK;
         do {
             ret = adc2_get_raw(ADC2_EXAMPLE_CHAN0, ADC_WIDTH_BIT_DEFAULT, &adc_raw[1][0]);
         } while (ret == ESP_ERR_INVALID_STATE);
@@ -106,5 +114,6 @@ void app_main(void)
             ESP_LOGI(TAG_CH[1][0], "cali data: %d mV", voltage);
         }
         vTaskDelay(pdMS_TO_TICKS(1000));
+#endif
     }
 }