psram: remove CS/CLK pin settings in kconfig on ESP32S2

This commit is contained in:
Armando 2022-11-11 18:20:06 +08:00
parent a0281fc4c7
commit 0121b27a37
3 changed files with 14 additions and 17 deletions

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@ -164,22 +164,14 @@ menu "ESP32S2-specific"
default 8388608 if SPIRAM_TYPE_ESPPSRAM64 default 8388608 if SPIRAM_TYPE_ESPPSRAM64
default 0 default 0
menu "PSRAM clock and cs IO for ESP32S2" config SPIRAM_CLK_IO
depends on ESP32S2_SPIRAM_SUPPORT int
config DEFAULT_PSRAM_CLK_IO default 30
int "PSRAM CLK IO number"
range 0 33 config SPIRAM_CS_IO
default 30 int
help default 26
The PSRAM CLOCK IO can be any unused GPIO, user can config it based on hardware design.
config DEFAULT_PSRAM_CS_IO
int "PSRAM CS IO number"
range 0 33
default 26
help
The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design.
endmenu
config SPIRAM_FETCH_INSTRUCTIONS config SPIRAM_FETCH_INSTRUCTIONS
bool "Cache fetch instructions from SPI RAM" bool "Cache fetch instructions from SPI RAM"
default n default n

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@ -0,0 +1,5 @@
# sdkconfig replacement configurations for deprecated options formatted as
# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION
CONFIG_DEFAULT_PSRAM_CLK_IO CONFIG_SPIRAM_CLK_IO
CONFIG_DEFAULT_PSRAM_CS_IO CONFIG_SPIRAM_CS_IO

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@ -96,8 +96,8 @@ static const char* TAG = "psram";
#define FLASH_CLK_IO SPI_CLK_GPIO_NUM #define FLASH_CLK_IO SPI_CLK_GPIO_NUM
#define FLASH_CS_IO SPI_CS0_GPIO_NUM #define FLASH_CS_IO SPI_CS0_GPIO_NUM
// PSRAM clock and cs IO should be configured based on hardware design. // PSRAM clock and cs IO should be configured based on hardware design.
#define PSRAM_CLK_IO CONFIG_DEFAULT_PSRAM_CLK_IO // Default value is 30 #define PSRAM_CLK_IO SPI_CLK_GPIO_NUM
#define PSRAM_CS_IO CONFIG_DEFAULT_PSRAM_CS_IO // Default value is 26 #define PSRAM_CS_IO SPI_CS1_GPIO_NUM
#define PSRAM_SPIQ_SD0_IO SPI_Q_GPIO_NUM #define PSRAM_SPIQ_SD0_IO SPI_Q_GPIO_NUM
#define PSRAM_SPID_SD1_IO SPI_D_GPIO_NUM #define PSRAM_SPID_SD1_IO SPI_D_GPIO_NUM
#define PSRAM_SPIWP_SD3_IO SPI_WP_GPIO_NUM #define PSRAM_SPIWP_SD3_IO SPI_WP_GPIO_NUM