refactor(sar): build sar_periph_ctrl related files by chip

This commit is contained in:
Armando 2023-08-08 10:30:27 +08:00
parent 5bd644942a
commit 00df6b378d
15 changed files with 54 additions and 5 deletions

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@ -37,11 +37,11 @@ entries:
mspi_timing_config (noflash) mspi_timing_config (noflash)
if SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY = y: if SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY = y:
mspi_timing_by_mspi_delay (noflash) mspi_timing_by_mspi_delay (noflash)
if SOC_ADC_SHARED_POWER = y:
if ADC_ONESHOT_CTRL_FUNC_IN_IRAM = y: if ADC_ONESHOT_CTRL_FUNC_IN_IRAM = y:
sar_periph_ctrl (noflash) sar_periph_ctrl (noflash)
else: else:
sar_periph_ctrl: sar_periph_ctrl_power_enable (noflash) sar_periph_ctrl: sar_periph_ctrl_power_enable (noflash)
[mapping:soc_pm] [mapping:soc_pm]
archive: libsoc.a archive: libsoc.a

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@ -235,6 +235,10 @@ config SOC_ADC_RTC_MAX_BITWIDTH
int int
default 12 default 12
config SOC_ADC_SHARED_POWER
bool
default y
config SOC_SHARED_IDCACHE_SUPPORTED config SOC_SHARED_IDCACHE_SUPPORTED
bool bool
default y default y

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@ -134,6 +134,9 @@
#define SOC_ADC_RTC_MIN_BITWIDTH (9) #define SOC_ADC_RTC_MIN_BITWIDTH (9)
#define SOC_ADC_RTC_MAX_BITWIDTH (12) #define SOC_ADC_RTC_MAX_BITWIDTH (12)
/*!< ADC power control is shared by PWDET */
#define SOC_ADC_SHARED_POWER 1
/*-------------------------- BROWNOUT CAPS -----------------------------------*/ /*-------------------------- BROWNOUT CAPS -----------------------------------*/
#if SOC_CAPS_ECO_VER >= 100 #if SOC_CAPS_ECO_VER >= 100
#define SOC_BROWNOUT_RESET_SUPPORTED 1 #define SOC_BROWNOUT_RESET_SUPPORTED 1

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@ -179,6 +179,10 @@ config SOC_ADC_SELF_HW_CALI_SUPPORTED
bool bool
default y default y
config SOC_ADC_SHARED_POWER
bool
default y
config SOC_BROWNOUT_RESET_SUPPORTED config SOC_BROWNOUT_RESET_SUPPORTED
bool bool
default y default y

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@ -84,6 +84,9 @@
#define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/ #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/
#define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */ #define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */
/*!< ADC power control is shared by PWDET, TempSensor */
#define SOC_ADC_SHARED_POWER 1
/*-------------------------- BROWNOUT CAPS -----------------------------------*/ /*-------------------------- BROWNOUT CAPS -----------------------------------*/
#define SOC_BROWNOUT_RESET_SUPPORTED 1 #define SOC_BROWNOUT_RESET_SUPPORTED 1

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@ -259,6 +259,10 @@ config SOC_ADC_SELF_HW_CALI_SUPPORTED
bool bool
default y default y
config SOC_ADC_SHARED_POWER
bool
default y
config SOC_APB_BACKUP_DMA config SOC_APB_BACKUP_DMA
bool bool
default y default y

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@ -112,6 +112,9 @@
#define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/ #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/
#define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */ #define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */
/*!< ADC power control is shared by PWDET, TempSensor */
#define SOC_ADC_SHARED_POWER 1
/*-------------------------- APB BACKUP DMA CAPS -------------------------------*/ /*-------------------------- APB BACKUP DMA CAPS -------------------------------*/
#define SOC_APB_BACKUP_DMA (1) #define SOC_APB_BACKUP_DMA (1)

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@ -315,6 +315,10 @@ config SOC_ADC_TEMPERATURE_SHARE_INTR
bool bool
default y default y
config SOC_ADC_SHARED_POWER
bool
default y
config SOC_APB_BACKUP_DMA config SOC_APB_BACKUP_DMA
bool bool
default n default n

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@ -125,6 +125,9 @@
/*!< Interrupt */ /*!< Interrupt */
#define SOC_ADC_TEMPERATURE_SHARE_INTR (1) #define SOC_ADC_TEMPERATURE_SHARE_INTR (1)
/*!< ADC power control is shared by PWDET */
#define SOC_ADC_SHARED_POWER 1
// ESP32C6-TODO: Copy from esp32c6, need check // ESP32C6-TODO: Copy from esp32c6, need check
/*-------------------------- APB BACKUP DMA CAPS -------------------------------*/ /*-------------------------- APB BACKUP DMA CAPS -------------------------------*/
#define SOC_APB_BACKUP_DMA (0) #define SOC_APB_BACKUP_DMA (0)

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@ -295,6 +295,10 @@ config SOC_ADC_TEMPERATURE_SHARE_INTR
bool bool
default y default y
config SOC_ADC_SHARED_POWER
bool
default y
config SOC_APB_BACKUP_DMA config SOC_APB_BACKUP_DMA
bool bool
default n default n

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@ -121,6 +121,9 @@
/*!< Interrupt */ /*!< Interrupt */
#define SOC_ADC_TEMPERATURE_SHARE_INTR (1) #define SOC_ADC_TEMPERATURE_SHARE_INTR (1)
/*!< ADC power control is shared by PWDET */
#define SOC_ADC_SHARED_POWER 1
// ESP32H2-TODO: Copy from esp32c6, need check // ESP32H2-TODO: Copy from esp32c6, need check
/*-------------------------- APB BACKUP DMA CAPS -------------------------------*/ /*-------------------------- APB BACKUP DMA CAPS -------------------------------*/
#define SOC_APB_BACKUP_DMA (0) #define SOC_APB_BACKUP_DMA (0)

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@ -275,6 +275,10 @@ config SOC_ADC_SELF_HW_CALI_SUPPORTED
bool bool
default y default y
config SOC_ADC_SHARED_POWER
bool
default y
config SOC_BROWNOUT_RESET_SUPPORTED config SOC_BROWNOUT_RESET_SUPPORTED
bool bool
default y default y

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@ -122,6 +122,9 @@
#define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/ #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/
#define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */ #define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */
/*!< ADC power control is shared by PWDET, TempSensor */
#define SOC_ADC_SHARED_POWER 1
/*-------------------------- BROWNOUT CAPS -----------------------------------*/ /*-------------------------- BROWNOUT CAPS -----------------------------------*/
#define SOC_BROWNOUT_RESET_SUPPORTED 1 #define SOC_BROWNOUT_RESET_SUPPORTED 1

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@ -315,6 +315,10 @@ config SOC_ADC_SELF_HW_CALI_SUPPORTED
bool bool
default y default y
config SOC_ADC_SHARED_POWER
bool
default y
config SOC_APB_BACKUP_DMA config SOC_APB_BACKUP_DMA
bool bool
default y default y

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@ -115,6 +115,9 @@
#define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/ #define SOC_ADC_CALIBRATION_V1_SUPPORTED (1) /*!< support HW offset calibration version 1*/
#define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */ #define SOC_ADC_SELF_HW_CALI_SUPPORTED (1) /*!< support HW offset self calibration */
/*!< ADC power control is shared by PWDET, TempSensor */
#define SOC_ADC_SHARED_POWER 1
/*-------------------------- APB BACKUP DMA CAPS -------------------------------*/ /*-------------------------- APB BACKUP DMA CAPS -------------------------------*/
#define SOC_APB_BACKUP_DMA (1) #define SOC_APB_BACKUP_DMA (1)