mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
235 lines
10 KiB
C
235 lines
10 KiB
C
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/*
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* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "modem/reg_base.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef volatile struct {
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union {
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struct {
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uint32_t reg_clk_en : 1;
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uint32_t reg_clk_debug_ena : 1;
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uint32_t reserved2 : 30;
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};
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uint32_t val;
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} test_conf;
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union {
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struct {
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uint32_t reg_clk_lp_timer_sel_osc_slow : 1;
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uint32_t reg_clk_lp_timer_sel_osc_fast : 1;
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uint32_t reg_clk_lp_timer_sel_xtal : 1;
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uint32_t reg_clk_lp_timer_sel_xtal32k : 1;
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uint32_t reg_clk_lp_timer_div_num : 12;
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uint32_t reserved16 : 16;
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};
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uint32_t val;
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} lp_timer_conf;
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union {
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struct {
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uint32_t reg_clk_coex_lp_sel_osc_slow : 1;
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uint32_t reg_clk_coex_lp_sel_osc_fast : 1;
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uint32_t reg_clk_coex_lp_sel_xtal : 1;
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uint32_t reg_clk_coex_lp_sel_xtal32k : 1;
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uint32_t reg_clk_coex_lp_div_num : 12;
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uint32_t reserved16 : 16;
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};
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uint32_t val;
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} coex_lp_clk_conf;
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union {
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struct {
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uint32_t reg_clk_wifipwr_lp_sel_osc_slow: 1;
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uint32_t reg_clk_wifipwr_lp_sel_osc_fast: 1;
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uint32_t reg_clk_wifipwr_lp_sel_xtal : 1;
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uint32_t reg_clk_wifipwr_lp_sel_xtal32k: 1;
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uint32_t reg_clk_wifipwr_lp_div_num : 12;
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uint32_t reserved16 : 16;
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};
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uint32_t val;
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} wifi_lp_clk_conf;
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union {
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struct {
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uint32_t reg_clk_i2c_mst_sel_160m : 1;
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uint32_t reserved1 : 31;
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};
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uint32_t val;
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} i2c_mst_clk_conf;
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union {
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struct {
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uint32_t reg_clk_modem_32k_sel : 2;
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uint32_t reserved2 : 30;
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};
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uint32_t val;
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} modem_32k_clk_conf;
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union {
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struct {
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uint32_t reg_clk_wifipwr_en : 1;
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uint32_t reg_clk_coex_en : 1;
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uint32_t reg_clk_i2c_mst_en : 1;
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uint32_t reg_clk_lp_timer_en : 1;
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uint32_t reserved4 : 1;
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uint32_t reserved5 : 1;
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uint32_t reserved6 : 1;
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uint32_t reserved7 : 1;
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uint32_t reserved8 : 1;
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uint32_t reserved9 : 1;
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uint32_t reserved10 : 1;
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uint32_t reserved11 : 1;
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uint32_t reserved12 : 1;
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uint32_t reserved13 : 1;
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uint32_t reserved14 : 1;
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uint32_t reserved15 : 1;
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uint32_t reserved16 : 1;
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uint32_t reserved17 : 1;
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uint32_t reserved18 : 1;
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uint32_t reserved19 : 1;
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uint32_t reserved20 : 1;
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uint32_t reserved21 : 1;
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uint32_t reserved22 : 1;
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uint32_t reserved23 : 1;
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uint32_t reserved24 : 1;
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uint32_t reserved25 : 1;
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uint32_t reserved26 : 1;
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uint32_t reserved27 : 1;
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uint32_t reserved28 : 1;
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uint32_t reserved29 : 1;
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uint32_t reserved30 : 1;
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uint32_t reserved31 : 1;
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};
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uint32_t val;
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} clk_conf;
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union {
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struct {
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uint32_t reg_clk_wifipwr_fo : 1;
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uint32_t reg_clk_coex_fo : 1;
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uint32_t reg_clk_i2c_mst_fo : 1;
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uint32_t reg_clk_lp_timer_fo : 1;
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uint32_t reg_clk_bcmem_fo : 1;
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uint32_t reg_clk_i2c_mst_mem_fo : 1;
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uint32_t reg_clk_chan_freq_mem_fo : 1;
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uint32_t reg_clk_pbus_mem_fo : 1;
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uint32_t reg_clk_agc_mem_fo : 1;
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uint32_t reg_clk_dc_mem_fo : 1;
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uint32_t reserved10 : 1;
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uint32_t reserved11 : 1;
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uint32_t reserved12 : 1;
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uint32_t reserved13 : 1;
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uint32_t reserved14 : 1;
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uint32_t reserved15 : 1;
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uint32_t reserved16 : 1;
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uint32_t reserved17 : 1;
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uint32_t reserved18 : 1;
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uint32_t reserved19 : 1;
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uint32_t reserved20 : 1;
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uint32_t reserved21 : 1;
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uint32_t reserved22 : 1;
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uint32_t reserved23 : 1;
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uint32_t reserved24 : 1;
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uint32_t reserved25 : 1;
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uint32_t reserved26 : 1;
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uint32_t reserved27 : 1;
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uint32_t reserved28 : 1;
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uint32_t reserved29 : 1;
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uint32_t reserved30 : 1;
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uint32_t reserved31 : 1;
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};
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uint32_t val;
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} clk_conf_force_on;
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union {
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struct {
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uint32_t reserved0 : 16;
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uint32_t reg_clk_wifipwr_st_map : 4;
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uint32_t reg_clk_coex_st_map : 4;
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uint32_t reg_clk_i2c_mst_st_map : 4;
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uint32_t reg_clk_lp_apb_st_map : 4;
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};
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uint32_t val;
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} clk_conf_power_st;
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union {
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struct {
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uint32_t reg_rst_wifipwr : 1;
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uint32_t reg_rst_coex : 1;
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uint32_t reg_rst_i2c_mst : 1;
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uint32_t reg_rst_lp_timer : 1;
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uint32_t reserved4 : 1;
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uint32_t reserved5 : 1;
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uint32_t reserved6 : 1;
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uint32_t reserved7 : 1;
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uint32_t reserved8 : 1;
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uint32_t reserved9 : 1;
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uint32_t reserved10 : 1;
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uint32_t reserved11 : 1;
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uint32_t reserved12 : 1;
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uint32_t reserved13 : 1;
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uint32_t reserved14 : 1;
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uint32_t reserved15 : 1;
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uint32_t reserved16 : 1;
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uint32_t reserved17 : 1;
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uint32_t reserved18 : 1;
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uint32_t reserved19 : 1;
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uint32_t reserved20 : 1;
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uint32_t reserved21 : 1;
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uint32_t reserved22 : 1;
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uint32_t reserved23 : 1;
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uint32_t reserved24 : 1;
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uint32_t reserved25 : 1;
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uint32_t reserved26 : 1;
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uint32_t reserved27 : 1;
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uint32_t reserved28 : 1;
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uint32_t reserved29 : 1;
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uint32_t reserved30 : 1;
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uint32_t reserved31 : 1;
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};
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uint32_t val;
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} rst_conf;
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union {
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struct {
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uint32_t reg_dc_mem_force_pu : 1;
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uint32_t reg_dc_mem_force_pd : 1;
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uint32_t reg_agc_mem_force_pu : 1;
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uint32_t reg_agc_mem_force_pd : 1;
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uint32_t reg_pbus_mem_force_pu : 1;
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uint32_t reg_pbus_mem_force_pd : 1;
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uint32_t reg_bc_mem_force_pu : 1;
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uint32_t reg_bc_mem_force_pd : 1;
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uint32_t reg_i2c_mst_mem_force_pu : 1;
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uint32_t reg_i2c_mst_mem_force_pd : 1;
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uint32_t reg_chan_freq_mem_force_pu : 1;
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uint32_t reg_chan_freq_mem_force_pd : 1;
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uint32_t reg_modem_pwr_mem_wp : 3;
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uint32_t reg_modem_pwr_mem_wa : 3;
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uint32_t reg_modem_pwr_mem_ra : 2;
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uint32_t reserved20 : 1;
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uint32_t reserved21 : 1;
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uint32_t reserved22 : 1;
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uint32_t reserved23 : 1;
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uint32_t reserved24 : 1;
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uint32_t reserved25 : 1;
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uint32_t reserved26 : 1;
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uint32_t reserved27 : 1;
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uint32_t reserved28 : 1;
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uint32_t reserved29 : 1;
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uint32_t reserved30 : 1;
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uint32_t reserved31 : 1;
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};
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uint32_t val;
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} mem_conf;
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union {
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struct {
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uint32_t reg_date : 28;
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uint32_t reserved28 : 4;
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};
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uint32_t val;
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} date;
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} modem_lpcon_dev_t;
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extern modem_lpcon_dev_t MODEM_LPCON;
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#ifdef __cplusplus
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}
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#endif
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