esp-idf/examples/system/ulp_riscv/sdkconfig.defaults

CONFIG_IDF_TARGET="esp32s2"
# Enable ULP
CONFIG_ESP32S2_ULP_COPROC_ENABLED=y
CONFIG_ESP32S2_ULP_COPROC_RISCV=y
CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=4096
# Set log level to Warning to produce clean output
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
CONFIG_BOOTLOADER_LOG_LEVEL=2
CONFIG_LOG_DEFAULT_LEVEL_WARN=y
CONFIG_LOG_DEFAULT_LEVEL=2
example ulp_riscv: Set IDF_TARGET to esp32s2 2020-12-22 03:53:53 -05:00			`CONFIG_IDF_TARGET="esp32s2"`
ulp: added support to building code for riscv ULP coprocessor 2020-04-17 15:34:56 -04:00			`# Enable ULP`
			`CONFIG_ESP32S2_ULP_COPROC_ENABLED=y`
			`CONFIG_ESP32S2_ULP_COPROC_RISCV=y`
			`CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=4096`
			`# Set log level to Warning to produce clean output`
			`CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y`
			`CONFIG_BOOTLOADER_LOG_LEVEL=2`
			`CONFIG_LOG_DEFAULT_LEVEL_WARN=y`
Whitespace: Automated whitespace fixes (large commit) Apply the pre-commit hook whitespace fixes to all files in the repo. (Line endings, blank lines at end of file, trailing whitespace) 2020-11-10 02:40:01 -05:00			`CONFIG_LOG_DEFAULT_LEVEL=2`