2020-02-25 09:19:48 -05:00
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// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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2020-11-26 03:57:11 -05:00
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Tests for the adc device driver on ESP32 only
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2020-02-25 09:19:48 -05:00
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*/
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2020-11-26 03:57:11 -05:00
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#include "sdkconfig.h"
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#if CONFIG_IDF_TARGET_ESP32
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#include "esp_system.h"
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#include "driver/adc.h"
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#include "driver/rtc_io.h"
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#include "driver/gpio.h"
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#include "unity.h"
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#include "esp_system.h"
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#include "esp_event.h"
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#include "esp_wifi.h"
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#include "esp_log.h"
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#include "nvs_flash.h"
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#include "test_utils.h"
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#include "esp_rom_sys.h"
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#include "driver/dac.h"
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/*
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* ADC DMA testcase
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*/
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#include "driver/i2s.h"
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#include "test/test_common_adc.h"
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//i2s number
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#define EXAMPLE_I2S_NUM (0)
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//i2s sample rate
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#define EXAMPLE_I2S_SAMPLE_RATE (150000)
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//i2s data bits
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#define EXAMPLE_I2S_SAMPLE_BITS (16)
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//enable display buffer for debug
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#define EXAMPLE_I2S_BUF_DEBUG (0)
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//I2S read buffer length
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#define EXAMPLE_I2S_READ_LEN (16 * 1024)
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//I2S data format, ADC-I2S only support mono.
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#define EXAMPLE_I2S_FORMAT I2S_CHANNEL_FMT_ONLY_RIGHT
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//I2S built-in ADC unit
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#define I2S_ADC_UNIT ADC_UNIT_1
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//I2S built-in ADC channel
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#define I2S_ADC_CHANNEL ADC1_CHANNEL_4
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/**
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* @brief I2S ADC/DAC mode init.
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*/
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static void example_i2s_init(void)
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{
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int i2s_num = EXAMPLE_I2S_NUM;
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i2s_config_t i2s_config = {
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.mode = I2S_MODE_MASTER | I2S_MODE_RX | I2S_MODE_ADC_BUILT_IN,
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.sample_rate = EXAMPLE_I2S_SAMPLE_RATE,
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.bits_per_sample = EXAMPLE_I2S_SAMPLE_BITS,
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.channel_format = EXAMPLE_I2S_FORMAT,
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.intr_alloc_flags = 0,
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.dma_buf_count = 2,
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.dma_buf_len = 1024,
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.use_apll = 0,
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};
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//install and start i2s driver
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TEST_ESP_OK( i2s_driver_install(i2s_num, &i2s_config, 0, NULL) );
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//init ADC pad
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TEST_ESP_OK( i2s_set_adc_mode(I2S_ADC_UNIT, I2S_ADC_CHANNEL) );
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}
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static void example_i2s_deinit(void)
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{
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TEST_ESP_OK( i2s_driver_uninstall(EXAMPLE_I2S_NUM) );
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}
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/**
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* @brief debug buffer data
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*/
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static void example_disp_buf(uint8_t *buf, int length)
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{
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printf("\n======");
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for (int i = 0; i < length; i += 2) {
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uint16_t data = ((uint16_t)buf[i+1] << 8) | (uint16_t)buf[i];
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adc_digi_output_data_t *p = (adc_digi_output_data_t *)&data;
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if ((i) % 16 == 0) printf("\n");
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printf("[%d_%d] ", p->type1.channel, p->type1.data);
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}
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printf("\n======\n");
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}
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static esp_err_t adc_dma_data_check(uint8_t *buf, int length, int ideal_level)
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{
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for (int i = 0; i < length; i += 2) {
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uint16_t data = ((uint16_t)buf[i+1] << 8) | (uint16_t)buf[i];
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adc_digi_output_data_t *p = (adc_digi_output_data_t *)&data;
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if (p->type1.channel != I2S_ADC_CHANNEL) {
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TEST_FAIL_MESSAGE("I2S-DMA data channel error!");
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}
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if (ideal_level == 1) { // high level 3.3v
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TEST_ASSERT_EQUAL( 0xFFF, p->type1.data );
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} else if (ideal_level == 0) { // low level 0v
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TEST_ASSERT_LESS_THAN( 10, p->type1.data );
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} else if (ideal_level == 2) { // middle level 1.4v
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TEST_ASSERT_INT_WITHIN( 128, 1586, p->type1.data );
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} else if (ideal_level == 3) { // normal level
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} else { // no check
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}
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}
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return ESP_OK;
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}
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static void adc_dma_read(uint8_t *buf, int length)
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{
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size_t bytes_read = 0;
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int flash_wr_size = 0;
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2020-09-18 06:31:52 -04:00
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vTaskDelay(pdTICKS_TO_MS(100));
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while (flash_wr_size < length) {
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//read data from I2S bus, in this case, from ADC.
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TEST_ESP_OK( i2s_read(EXAMPLE_I2S_NUM, (void *) buf + flash_wr_size, length - flash_wr_size, &bytes_read, portMAX_DELAY) );
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flash_wr_size += bytes_read;
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example_disp_buf((uint8_t *) buf, 128);
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}
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}
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TEST_CASE("ADC DMA read", "[adc dma]")
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{
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int i2s_read_len = EXAMPLE_I2S_READ_LEN;
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char *i2s_read_buff = (char *) calloc(i2s_read_len, sizeof(char));
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example_i2s_init();
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TEST_ESP_OK( i2s_adc_enable(EXAMPLE_I2S_NUM) );
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adc_fake_tie_low(I2S_ADC_UNIT, I2S_ADC_CHANNEL);
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adc_dma_read((uint8_t *)i2s_read_buff, i2s_read_len);
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adc_dma_data_check((uint8_t *)i2s_read_buff, i2s_read_len, 0);
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adc_fake_tie_middle(I2S_ADC_UNIT, I2S_ADC_CHANNEL);
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adc_dma_read((uint8_t *)i2s_read_buff, i2s_read_len);
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adc_dma_data_check((uint8_t *)i2s_read_buff, i2s_read_len, 2);
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adc_fake_tie_high(I2S_ADC_UNIT, I2S_ADC_CHANNEL);
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adc_dma_read((uint8_t *)i2s_read_buff, i2s_read_len);
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adc_dma_data_check((uint8_t *)i2s_read_buff, i2s_read_len, 1);
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adc_io_normal(I2S_ADC_UNIT, I2S_ADC_CHANNEL);
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TEST_ESP_OK( i2s_adc_disable(EXAMPLE_I2S_NUM) );
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if (i2s_read_buff) {
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free(i2s_read_buff);
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i2s_read_buff = NULL;
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}
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example_i2s_deinit();
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}
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2020-11-26 03:57:11 -05:00
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#endif // CONFIG_IDF_TARGET_ESP32
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