2021-05-23 19:06:17 -04:00
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2018-06-06 07:56:43 -04:00
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/**
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* this case is used for test PCNT
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* prepare job for test environment UT_T1_PCNT:
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2019-12-02 03:34:59 -05:00
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* We use internal signals instead of external wiring, but please keep the following IO connections, or connect nothing to prevent the signal from being disturbed.
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2018-06-06 07:56:43 -04:00
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* 1. prepare one ESP-WROOM-32 board and connect it to PC.
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2019-12-02 03:34:59 -05:00
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* 2. connect GPIO21 with GPIO4
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2018-06-06 07:56:43 -04:00
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* 3. GPIO5 connect to 3.3v
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* 4. GPIO19 connect to GND
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* 5. logic analyzer will help too if possible
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*
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* the GPIO18 is the pulse producer, the GPIO4 is the input GPIO
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*/
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#include <stdio.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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2020-10-12 02:23:49 -04:00
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#include "soc/soc_caps.h"
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#if SOC_PCNT_SUPPORTED
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2018-06-06 07:56:43 -04:00
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#include "driver/gpio.h"
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#include "driver/pcnt.h"
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#include "driver/ledc.h"
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#include "esp_attr.h"
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#include "esp_log.h"
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2019-05-13 06:02:45 -04:00
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#include "soc/gpio_periph.h"
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2021-08-10 05:19:12 -04:00
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#include "soc/pcnt_struct.h"
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2018-06-06 07:56:43 -04:00
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#include "unity.h"
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2020-06-19 00:00:58 -04:00
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#include "esp_rom_gpio.h"
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2018-06-06 07:56:43 -04:00
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2019-12-02 03:34:59 -05:00
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#define PULSE_IO 21
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2018-06-06 07:56:43 -04:00
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#define PCNT_INPUT_IO 4
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2019-12-02 03:34:59 -05:00
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#define PCNT_CTRL_VCC_IO 5
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#define PCNT_CTRL_GND_IO 2
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2018-06-06 07:56:43 -04:00
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#define HIGHEST_LIMIT 10
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#define LOWEST_LIMIT 0
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#define MAX_THRESHOLD 5
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#define MIN_THRESHOLD 0
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2019-12-02 03:34:59 -05:00
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#define PCNT_CTRL_HIGH_LEVEL 1
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#define PCNT_CTRL_LOW_LEVEL 0
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2018-06-06 07:56:43 -04:00
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2019-12-02 03:34:59 -05:00
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static xQueueHandle pcnt_evt_queue = NULL;
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2018-06-06 07:56:43 -04:00
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typedef struct {
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int zero_times;
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int h_limit;
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int l_limit;
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int h_threshold;
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int l_threshold;
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int filter_time;
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} event_times;
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2019-12-02 03:34:59 -05:00
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static void pcnt_test_io_config(int ctrl_level)
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{
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// Connect internal signals using IO matrix.
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gpio_set_direction(PULSE_IO, GPIO_MODE_INPUT_OUTPUT);
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2020-06-19 00:00:58 -04:00
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esp_rom_gpio_connect_out_signal(PULSE_IO, LEDC_LS_SIG_OUT1_IDX, 0, 0); // LEDC_TIMER_1, LEDC_LOW_SPEED_MODE
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esp_rom_gpio_connect_in_signal(PULSE_IO, PCNT_SIG_CH0_IN0_IDX, 0); // PCNT_UNIT_0, PCNT_CHANNEL_0
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2021-08-10 05:19:12 -04:00
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esp_rom_gpio_connect_in_signal(ctrl_level ? GPIO_MATRIX_CONST_ONE_INPUT : GPIO_MATRIX_CONST_ZERO_INPUT, PCNT_CTRL_CH0_IN0_IDX, 0); // PCNT_UNIT_0, PCNT_CHANNEL_0
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2019-12-02 03:34:59 -05:00
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}
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2018-06-06 07:56:43 -04:00
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/* use LEDC to produce pulse for PCNT
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* the frequency of LEDC is 1000, so every second will get 1000 count values
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* the PCNT count the LEDC pulse
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* */
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static void produce_pulse(void)
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{
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ledc_timer_config_t ledc_timer = {
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2019-12-02 03:34:59 -05:00
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.speed_mode = LEDC_LOW_SPEED_MODE,
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2018-06-06 07:56:43 -04:00
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.timer_num = LEDC_TIMER_1,
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2021-12-15 00:01:16 -05:00
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.duty_resolution = LEDC_TIMER_14_BIT,
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.freq_hz = 2,
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2018-11-01 00:23:11 -04:00
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.clk_cfg = LEDC_AUTO_CLK,
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2018-06-06 07:56:43 -04:00
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};
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2019-08-11 01:48:17 -04:00
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ESP_ERROR_CHECK(ledc_timer_config(&ledc_timer));
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2018-06-06 07:56:43 -04:00
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ledc_channel_config_t ledc_channel = {
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2019-12-02 03:34:59 -05:00
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.speed_mode = LEDC_LOW_SPEED_MODE,
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2018-06-06 07:56:43 -04:00
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.channel = LEDC_CHANNEL_1,
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.timer_sel = LEDC_TIMER_1,
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.intr_type = LEDC_INTR_DISABLE,
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.gpio_num = PULSE_IO,
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.duty = 100,
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.hpoint = 0,
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};
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2019-08-11 01:48:17 -04:00
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ESP_ERROR_CHECK(ledc_channel_config(&ledc_channel));
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2018-06-06 07:56:43 -04:00
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}
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static void IRAM_ATTR pcnt_intr_handler(void *arg)
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{
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uint32_t intr_status = PCNT.int_st.val;
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int i;
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uint32_t status;
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BaseType_t port_status = pdFALSE;
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2021-08-10 05:19:12 -04:00
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for (i = 0; i < SOC_PCNT_UNITS_PER_GROUP; i++) {
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2018-06-06 07:56:43 -04:00
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if (intr_status & (BIT(i))) {
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status = PCNT.status_unit[i].val;
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PCNT.int_clr.val = BIT(i);
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xQueueSendFromISR(pcnt_evt_queue, &status, &port_status);
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if (port_status == pdTRUE) {
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portYIELD_FROM_ISR();
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}
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}
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}
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}
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2021-08-10 05:19:12 -04:00
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static void event_calculate(event_times *event)
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2018-06-06 07:56:43 -04:00
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{
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int16_t test_counter = 0;
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int times = 0;
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BaseType_t port_status;
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uint32_t status = 0;
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while (times < 10) {
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2021-12-15 00:01:16 -05:00
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port_status = xQueueReceive(pcnt_evt_queue, &status, 1001 / portTICK_PERIOD_MS);
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2018-06-06 07:56:43 -04:00
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if (port_status == pdTRUE) {
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event->filter_time++;
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TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
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printf("Current counter value :%d\n", test_counter);
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2019-12-02 03:34:59 -05:00
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if (status & PCNT_EVT_THRES_1) {
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2018-06-06 07:56:43 -04:00
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printf("THRES1 EVT\n");
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event->h_threshold++;
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}
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2019-12-02 03:34:59 -05:00
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if (status & PCNT_EVT_THRES_0) {
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2018-06-06 07:56:43 -04:00
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printf("THRES0 EVT\n");
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event->l_threshold++;
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}
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2019-12-02 03:34:59 -05:00
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if (status & PCNT_EVT_L_LIM) {
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2018-06-06 07:56:43 -04:00
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printf("L_LIM EVT\n");
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event->l_limit++;
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}
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2019-12-02 03:34:59 -05:00
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if (status & PCNT_EVT_H_LIM) {
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2018-06-06 07:56:43 -04:00
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printf("H_LIM EVT\n");
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event->h_limit++;
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}
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2019-12-02 03:34:59 -05:00
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if (status & PCNT_EVT_ZERO) {
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2018-06-06 07:56:43 -04:00
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printf("ZERO EVT\n");
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event->zero_times++;
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}
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} else {
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TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
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printf("Current counter value :%d\n", test_counter);
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}
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times++;
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}
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printf("%d, %d, %d, %d, %d, %d\n", event->h_threshold, event->l_threshold,
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2021-08-10 05:19:12 -04:00
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event->l_limit, event->h_limit, event->zero_times, event->filter_time);
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2018-06-06 07:56:43 -04:00
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}
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/*
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* There exist 2 kind of counting methods: positive and negative counting method
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* 1. when control IO is high level, PCNT is positive counting mode
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* 2. when control IO is low level, PCNT is positive negative mode
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* the positive method standard is as below:
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* ----------------------------------------------------------------------------------
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* POS_ MODE | LCTRL_ MODE | HCTRL_ MODE | sig l→h when ctrl=0 | sig l→h when ctrl=1
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* NEG_ MODE | | | |
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* ===================================================================================
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* 1 (inc) | 0 (-) | 0 (-) | Inc ctr | Inc ctr
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* 2 (dec) | 0 (-) | 0 (-) | Dec ctr | Dec ctr
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* 0 (-) | x | x | No action | No action
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* 1 (inc) | 0 (-) | 1 (inv) | Inc ctr | Dec ctr
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* 1 (inc) | 1 (inv) | 0 (-) | Dec ctr | Inc ctr
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* 2 (dec) | 0 (-) | 1 (inv) | Dec ctr | Inc ctr
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* 1 (inc) | 0 (-) | 2 (dis) | Inc ctr | No action
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* 1 (inc) | 2 (dis) | 0 (-) | No action | Inc ctr
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* -----------------------------------------------------------------------------------
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* */
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static void count_mode_test(gpio_num_t ctl_io)
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{
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int16_t test_counter;
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//produce pulse, 100HZ
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ledc_timer_config_t ledc_timer = {
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2019-12-02 03:34:59 -05:00
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.speed_mode = LEDC_LOW_SPEED_MODE,
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2018-06-06 07:56:43 -04:00
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.timer_num = LEDC_TIMER_1,
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.duty_resolution = LEDC_TIMER_10_BIT,
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.freq_hz = 100,
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2018-11-01 00:23:11 -04:00
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.clk_cfg = LEDC_AUTO_CLK,
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2018-06-06 07:56:43 -04:00
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};
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ledc_timer_config(&ledc_timer);
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ledc_channel_config_t ledc_channel = {
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2019-12-02 03:34:59 -05:00
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.speed_mode = LEDC_LOW_SPEED_MODE,
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2018-06-06 07:56:43 -04:00
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.channel = LEDC_CHANNEL_1,
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.timer_sel = LEDC_TIMER_1,
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.intr_type = LEDC_INTR_DISABLE,
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.gpio_num = PULSE_IO,
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.duty = 100,
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.hpoint = 0,
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};
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ledc_channel_config(&ledc_channel);
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pcnt_config_t pcnt_config = {
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.pulse_gpio_num = PCNT_INPUT_IO,
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.ctrl_gpio_num = ctl_io,
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.channel = PCNT_CHANNEL_0,
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.unit = PCNT_UNIT_0,
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.pos_mode = PCNT_COUNT_INC,
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.neg_mode = PCNT_COUNT_DIS,
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.lctrl_mode = PCNT_MODE_REVERSE,
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.hctrl_mode = PCNT_MODE_KEEP,
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.counter_h_lim = 101,
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.counter_l_lim = -101,
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};
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TEST_ESP_OK(pcnt_unit_config(&pcnt_config));
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2019-12-02 03:34:59 -05:00
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pcnt_test_io_config((ctl_io == PCNT_CTRL_VCC_IO) ? PCNT_CTRL_HIGH_LEVEL : PCNT_CTRL_LOW_LEVEL);
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2018-06-06 07:56:43 -04:00
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int16_t result1[8] = {100, -100, 0, -100, 100, 100, 0, 100};
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int16_t result2[8] = {100, -100, 0, 100, -100, -100, 100, 0};
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int16_t *result;
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2019-12-02 03:34:59 -05:00
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if (ctl_io == PCNT_CTRL_VCC_IO) {
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2018-06-06 07:56:43 -04:00
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result = result1;
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} else {
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result = result2;
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}
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2021-12-15 00:01:16 -05:00
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// Wait for ledc and pcnt settling down
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vTaskDelay(500 / portTICK_RATE_MS);
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2018-06-06 07:56:43 -04:00
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// 1, 0, 0, 0
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TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_set_mode(PCNT_UNIT_0, PCNT_CHANNEL_0,
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PCNT_COUNT_INC, PCNT_COUNT_DIS,
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PCNT_MODE_KEEP, PCNT_MODE_KEEP));
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TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
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vTaskDelay(1000 / portTICK_RATE_MS);
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TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
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printf("value: %d\n", test_counter);
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TEST_ASSERT_INT16_WITHIN(1, test_counter, result[0]);
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//2, 0, 0, 0
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TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_set_mode(PCNT_UNIT_0, PCNT_CHANNEL_0,
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PCNT_COUNT_DEC, PCNT_COUNT_DIS,
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PCNT_MODE_KEEP, PCNT_MODE_KEEP));
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TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
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vTaskDelay(1000 / portTICK_RATE_MS);
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TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
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printf("value: %d\n", test_counter);
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TEST_ASSERT_INT16_WITHIN(1, test_counter, result[1]);
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//0,0,0,0
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TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_set_mode(PCNT_UNIT_0, PCNT_CHANNEL_0,
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PCNT_COUNT_DIS, PCNT_COUNT_DIS,
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PCNT_MODE_KEEP, PCNT_MODE_KEEP));
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TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
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vTaskDelay(1000 / portTICK_RATE_MS);
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TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
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printf("value: %d\n", test_counter);
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TEST_ASSERT_INT16_WITHIN(1, test_counter, result[2]);
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//1,0,1,0
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TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_set_mode(PCNT_UNIT_0, PCNT_CHANNEL_0,
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PCNT_COUNT_INC, PCNT_COUNT_DIS,
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PCNT_MODE_REVERSE, PCNT_MODE_KEEP));
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TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
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vTaskDelay(1000 / portTICK_RATE_MS);
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TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
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printf("value: %d\n", test_counter);
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TEST_ASSERT_INT16_WITHIN(1, test_counter, result[3]);
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//1,0,0,1
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TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
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TEST_ESP_OK(pcnt_set_mode(PCNT_UNIT_0, PCNT_CHANNEL_0,
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PCNT_COUNT_INC, PCNT_COUNT_DIS,
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PCNT_MODE_KEEP, PCNT_MODE_REVERSE));
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TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
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vTaskDelay(1000 / portTICK_RATE_MS);
|
|
|
|
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
|
|
|
|
printf("value: %d\n", test_counter);
|
|
|
|
TEST_ASSERT_INT16_WITHIN(1, test_counter, result[4]);
|
|
|
|
|
|
|
|
//2,0,0,1
|
|
|
|
TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_set_mode(PCNT_UNIT_0, PCNT_CHANNEL_0,
|
|
|
|
PCNT_COUNT_DEC, PCNT_COUNT_DIS,
|
|
|
|
PCNT_MODE_REVERSE, PCNT_MODE_KEEP));
|
|
|
|
TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
|
|
|
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
|
|
|
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
|
|
|
|
printf("value: %d\n", test_counter);
|
|
|
|
TEST_ASSERT_INT16_WITHIN(1, test_counter, result[5]);
|
|
|
|
|
|
|
|
//1,0,2,0
|
|
|
|
TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_set_mode(PCNT_UNIT_0, PCNT_CHANNEL_0,
|
|
|
|
PCNT_COUNT_INC, PCNT_COUNT_DIS,
|
|
|
|
PCNT_MODE_DISABLE, PCNT_MODE_KEEP));
|
|
|
|
TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
|
|
|
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
|
|
|
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
|
|
|
|
printf("value: %d\n", test_counter);
|
|
|
|
TEST_ASSERT_INT16_WITHIN(1, test_counter, result[6]);
|
|
|
|
|
|
|
|
//1,0,0,2
|
|
|
|
TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_set_mode(PCNT_UNIT_0, PCNT_CHANNEL_0,
|
|
|
|
PCNT_COUNT_INC, PCNT_COUNT_DIS,
|
|
|
|
PCNT_MODE_KEEP, PCNT_MODE_DISABLE));
|
|
|
|
TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
|
|
|
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
|
|
|
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
|
|
|
|
printf("value: %d\n", test_counter);
|
|
|
|
TEST_ASSERT_INT16_WITHIN(1, test_counter, result[7]);
|
|
|
|
}
|
|
|
|
|
|
|
|
// test PCNT basic configuration
|
2019-12-02 03:34:59 -05:00
|
|
|
TEST_CASE("PCNT test config", "[pcnt]")
|
2018-06-06 07:56:43 -04:00
|
|
|
{
|
|
|
|
pcnt_config_t pcnt_config = {
|
|
|
|
.pulse_gpio_num = PCNT_INPUT_IO,
|
2019-12-02 03:34:59 -05:00
|
|
|
.ctrl_gpio_num = PCNT_CTRL_VCC_IO,
|
2018-06-06 07:56:43 -04:00
|
|
|
.channel = PCNT_CHANNEL_0,
|
|
|
|
.unit = PCNT_UNIT_0,
|
|
|
|
.pos_mode = PCNT_COUNT_INC,
|
|
|
|
.neg_mode = PCNT_COUNT_DIS,
|
|
|
|
.lctrl_mode = PCNT_MODE_REVERSE,
|
|
|
|
.hctrl_mode = PCNT_MODE_KEEP,
|
|
|
|
.counter_h_lim = 100,
|
|
|
|
.counter_l_lim = 0,
|
|
|
|
};
|
|
|
|
// basic configuration
|
|
|
|
pcnt_config_t temp_pcnt_config = pcnt_config;
|
|
|
|
TEST_ESP_OK(pcnt_unit_config(&pcnt_config));
|
|
|
|
|
2021-08-10 05:19:12 -04:00
|
|
|
// test SOC_PCNT_UNITS_PER_GROUP units, from 0-(SOC_PCNT_UNITS_PER_GROUP-1)
|
2018-06-06 07:56:43 -04:00
|
|
|
pcnt_config = temp_pcnt_config;
|
2021-08-10 05:19:12 -04:00
|
|
|
pcnt_config.unit = SOC_PCNT_UNITS_PER_GROUP;
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ASSERT_NOT_NULL((void *)pcnt_unit_config(&pcnt_config));
|
2021-08-10 05:19:12 -04:00
|
|
|
for (int i = 0; i < SOC_PCNT_UNITS_PER_GROUP; i++) {
|
2018-06-06 07:56:43 -04:00
|
|
|
pcnt_config.unit = i;
|
|
|
|
TEST_ESP_OK(pcnt_unit_config(&pcnt_config));
|
|
|
|
}
|
|
|
|
|
|
|
|
// test channels
|
|
|
|
pcnt_config = temp_pcnt_config;
|
|
|
|
pcnt_config.channel = PCNT_CHANNEL_MAX;
|
|
|
|
TEST_ASSERT_NOT_NULL((void *)pcnt_unit_config(&pcnt_config));
|
|
|
|
pcnt_config = temp_pcnt_config;
|
|
|
|
pcnt_config.pulse_gpio_num = -1;
|
|
|
|
TEST_ESP_OK(pcnt_unit_config(&pcnt_config));
|
|
|
|
|
|
|
|
pcnt_config = temp_pcnt_config;
|
2019-12-02 03:34:59 -05:00
|
|
|
pcnt_config.pulse_gpio_num = GPIO_NUM_MAX + 1;
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ASSERT_NOT_NULL((void *)pcnt_unit_config(&pcnt_config));
|
|
|
|
|
|
|
|
// test pulse_gpio_num and ctrl_gpio_num is the same
|
|
|
|
pcnt_config = temp_pcnt_config;
|
|
|
|
pcnt_config.pulse_gpio_num = PCNT_INPUT_IO;
|
|
|
|
pcnt_config.ctrl_gpio_num = PCNT_INPUT_IO;
|
|
|
|
TEST_ASSERT_NOT_NULL((void *)pcnt_unit_config(&pcnt_config));
|
|
|
|
|
|
|
|
pcnt_config = temp_pcnt_config;
|
|
|
|
pcnt_config.pos_mode = PCNT_COUNT_MAX;
|
|
|
|
TEST_ASSERT_NOT_NULL((void *)pcnt_unit_config(&pcnt_config));
|
|
|
|
|
|
|
|
pcnt_config = temp_pcnt_config;
|
|
|
|
pcnt_config.hctrl_mode = PCNT_MODE_MAX;
|
|
|
|
TEST_ASSERT_NOT_NULL((void *)pcnt_unit_config(&pcnt_config));
|
|
|
|
|
|
|
|
pcnt_config = temp_pcnt_config;
|
|
|
|
pcnt_config.lctrl_mode = PCNT_MODE_MAX;
|
|
|
|
TEST_ASSERT_NOT_NULL((void *)pcnt_unit_config(&pcnt_config));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* PCNT basic property:
|
|
|
|
* 1. pause counter
|
|
|
|
* 2. resume counter
|
|
|
|
* 3. clear counter
|
|
|
|
* 4. check the counter value*/
|
2019-12-02 03:34:59 -05:00
|
|
|
TEST_CASE("PCNT basic function test", "[pcnt]")
|
2018-06-06 07:56:43 -04:00
|
|
|
{
|
|
|
|
int16_t test_counter;
|
|
|
|
int16_t time = 0;
|
|
|
|
int clear_count = 0;
|
|
|
|
int resume_count = 0;
|
|
|
|
int temp_value = 0;
|
|
|
|
pcnt_config_t pcnt_config = {
|
|
|
|
.pulse_gpio_num = PCNT_INPUT_IO,
|
2019-12-02 03:34:59 -05:00
|
|
|
.ctrl_gpio_num = PCNT_CTRL_VCC_IO,
|
2018-06-06 07:56:43 -04:00
|
|
|
.channel = PCNT_CHANNEL_0,
|
|
|
|
.unit = PCNT_UNIT_0,
|
|
|
|
.pos_mode = PCNT_COUNT_INC,
|
|
|
|
.neg_mode = PCNT_COUNT_DIS,
|
|
|
|
.lctrl_mode = PCNT_MODE_REVERSE,
|
|
|
|
.hctrl_mode = PCNT_MODE_KEEP,
|
|
|
|
.counter_h_lim = 10,
|
|
|
|
.counter_l_lim = -10,
|
|
|
|
};
|
|
|
|
TEST_ESP_OK(pcnt_unit_config(&pcnt_config));
|
|
|
|
|
|
|
|
// use LEDC to produce the pulse, then the PCNT to count it
|
|
|
|
produce_pulse();
|
2019-12-02 03:34:59 -05:00
|
|
|
pcnt_test_io_config(PCNT_CTRL_HIGH_LEVEL);
|
2018-06-06 07:56:43 -04:00
|
|
|
|
|
|
|
// initialize first, the initail value should be 0
|
|
|
|
TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
|
|
|
|
TEST_ASSERT_EQUAL_INT16(test_counter, 0);
|
|
|
|
|
|
|
|
// resume the PCNT
|
|
|
|
TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
|
|
|
|
TEST_ASSERT_EQUAL_INT16(test_counter, 0);
|
|
|
|
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
|
|
|
|
TEST_ASSERT_EQUAL_INT16(test_counter, 0);
|
|
|
|
|
|
|
|
//count now
|
|
|
|
while (time != 10) {
|
2021-12-15 00:01:16 -05:00
|
|
|
vTaskDelay(501 / portTICK_RATE_MS); // in case of can't wait to get counter(edge effect)
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
|
|
|
|
printf("COUNT: %d\n", test_counter);
|
|
|
|
TEST_ASSERT_NOT_EQUAL(test_counter, temp_value);
|
|
|
|
temp_value = test_counter;
|
|
|
|
|
|
|
|
if (test_counter == 5 || test_counter == -5) {
|
|
|
|
//test clear
|
|
|
|
TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
|
|
|
|
TEST_ASSERT_EQUAL_INT16(test_counter, 0);
|
|
|
|
clear_count++;
|
|
|
|
}
|
|
|
|
if (test_counter == 0) {
|
|
|
|
//test pause
|
|
|
|
TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
|
2021-12-15 00:01:16 -05:00
|
|
|
vTaskDelay(500 / portTICK_RATE_MS);
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
|
|
|
|
printf("PAUSE: %d\n", test_counter);
|
|
|
|
TEST_ASSERT_EQUAL_INT16(test_counter, 0);
|
|
|
|
|
|
|
|
// test resume
|
|
|
|
TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
|
2021-12-15 00:01:16 -05:00
|
|
|
vTaskDelay(500 / portTICK_RATE_MS);
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
|
|
|
|
printf("RESUME: %d\n", test_counter);
|
2019-12-02 03:34:59 -05:00
|
|
|
TEST_ASSERT_EQUAL_INT16(test_counter, 1);
|
2018-06-06 07:56:43 -04:00
|
|
|
resume_count++;
|
|
|
|
}
|
|
|
|
time++;
|
|
|
|
}
|
|
|
|
TEST_ASSERT_EQUAL_INT16(clear_count, 2);
|
|
|
|
TEST_ASSERT_EQUAL_INT16(resume_count, 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* there are 4 situations will be tested:
|
|
|
|
* 1. set event to interrupt triggered
|
|
|
|
* 2. disable interrupt to stop triggering interrupt
|
|
|
|
* 3. enable interrupt to interrupt triggered again
|
|
|
|
* 4. disable event to stop triggering interrupt
|
|
|
|
*
|
|
|
|
* PCNT interrupt type:
|
|
|
|
* 1. PCNT_EVT_THRES_1
|
|
|
|
* 2. PCNT_EVT_THRES_0
|
|
|
|
* 3. PCNT_EVT_ZERO
|
|
|
|
* 4. PCNT_EVT_H_LIM
|
|
|
|
* 5. PCNT_EVT_L_LIM
|
|
|
|
* */
|
2019-12-02 03:34:59 -05:00
|
|
|
TEST_CASE("PCNT interrupt method test(control IO is high)", "[pcnt][timeout=120]")
|
2018-06-06 07:56:43 -04:00
|
|
|
{
|
|
|
|
pcnt_config_t config = {
|
|
|
|
.pulse_gpio_num = PCNT_INPUT_IO,
|
2019-12-02 03:34:59 -05:00
|
|
|
.ctrl_gpio_num = PCNT_CTRL_VCC_IO,
|
2018-06-06 07:56:43 -04:00
|
|
|
.channel = PCNT_CHANNEL_0,
|
|
|
|
.unit = PCNT_UNIT_0,
|
|
|
|
.pos_mode = PCNT_COUNT_INC,
|
|
|
|
.neg_mode = PCNT_COUNT_DIS,
|
|
|
|
.lctrl_mode = PCNT_MODE_REVERSE,
|
|
|
|
.hctrl_mode = PCNT_MODE_KEEP,
|
2021-12-15 00:01:16 -05:00
|
|
|
.counter_h_lim = 10,
|
2018-06-06 07:56:43 -04:00
|
|
|
.counter_l_lim = 0,
|
|
|
|
};
|
|
|
|
TEST_ESP_OK(pcnt_unit_config(&config));
|
|
|
|
produce_pulse();
|
2019-12-02 03:34:59 -05:00
|
|
|
pcnt_test_io_config(PCNT_CTRL_HIGH_LEVEL);
|
2018-06-06 07:56:43 -04:00
|
|
|
|
|
|
|
event_times event = {
|
|
|
|
.zero_times = 0,
|
|
|
|
.h_limit = 0,
|
|
|
|
.l_limit = 0,
|
|
|
|
.h_threshold = 0,
|
|
|
|
.l_threshold = 0,
|
|
|
|
.filter_time = 0,
|
|
|
|
};
|
|
|
|
|
|
|
|
//interrupt set
|
|
|
|
TEST_ESP_OK(pcnt_set_filter_value(PCNT_UNIT_0, 2));
|
|
|
|
TEST_ESP_OK(pcnt_filter_enable(PCNT_UNIT_0));
|
2021-12-15 00:01:16 -05:00
|
|
|
TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_1, 8)); // when arrive to max threshold trigger
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_1));
|
2021-12-15 00:01:16 -05:00
|
|
|
TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_0, 2)); // when arrive to minimum threshold trigger
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_0));
|
|
|
|
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_ZERO));
|
|
|
|
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_H_LIM)); // when arrive to max limit trigger
|
|
|
|
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_L_LIM)); // when arrive to minimum limit trigger
|
|
|
|
|
2019-12-02 03:34:59 -05:00
|
|
|
// initialize first, the initail value should be 0
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
|
|
|
|
|
2019-12-02 03:34:59 -05:00
|
|
|
pcnt_evt_queue = xQueueCreate(10, sizeof(uint32_t));
|
|
|
|
|
|
|
|
pcnt_isr_handle_t pcnt_isr_service;
|
|
|
|
TEST_ESP_OK(pcnt_isr_register(pcnt_intr_handler, NULL, 0, &pcnt_isr_service));
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ESP_OK(pcnt_intr_enable(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
|
|
|
|
|
|
|
|
// test event
|
|
|
|
event_calculate(&event);
|
2018-06-25 21:07:51 -04:00
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_threshold, 2);
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.l_threshold, 2);
|
2018-06-25 21:07:51 -04:00
|
|
|
TEST_ASSERT(event.l_limit == 0);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_limit, 2);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.zero_times, 2);
|
|
|
|
TEST_ASSERT_INT_WITHIN(3, event.filter_time, 4);
|
2018-06-06 07:56:43 -04:00
|
|
|
|
|
|
|
// test interrupt disable
|
|
|
|
TEST_ESP_OK(pcnt_intr_disable(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
|
|
|
|
// for the original control io disable interrupt status
|
|
|
|
event_calculate(&event);
|
2018-06-25 21:07:51 -04:00
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_threshold, 2);
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.l_threshold, 2);
|
2018-06-25 21:07:51 -04:00
|
|
|
TEST_ASSERT(event.l_limit == 0);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_limit, 2);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.zero_times, 2);
|
|
|
|
TEST_ASSERT_INT_WITHIN(3, event.filter_time, 4);
|
2018-06-06 07:56:43 -04:00
|
|
|
|
|
|
|
// enable the intr
|
|
|
|
TEST_ESP_OK(pcnt_intr_enable(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
|
|
|
|
event_calculate(&event);
|
2018-06-25 21:07:51 -04:00
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_threshold, 4);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.l_threshold, 4);
|
|
|
|
TEST_ASSERT(event.l_limit == 0);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_limit, 4);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.zero_times, 4);
|
|
|
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TEST_ASSERT_INT_WITHIN(3, event.filter_time, 10);
|
2018-06-06 07:56:43 -04:00
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|
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|
|
|
|
// disable part of events
|
|
|
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TEST_ESP_OK(pcnt_event_disable(PCNT_UNIT_0, PCNT_EVT_ZERO));
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|
|
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TEST_ESP_OK(pcnt_event_disable(PCNT_UNIT_0, PCNT_EVT_L_LIM));
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|
|
|
TEST_ESP_OK(pcnt_event_disable(PCNT_UNIT_0, PCNT_EVT_THRES_0));
|
|
|
|
event_calculate(&event);
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2018-06-25 21:07:51 -04:00
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TEST_ASSERT_INT_WITHIN(2, event.h_threshold, 5);
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2018-06-06 07:56:43 -04:00
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TEST_ASSERT_INT_WITHIN(2, event.l_threshold, 4);
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2018-06-25 21:07:51 -04:00
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TEST_ASSERT(event.l_limit == 0);
|
2019-12-02 03:34:59 -05:00
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TEST_ASSERT_INT_WITHIN(3, event.h_limit, 6);
|
2018-06-25 21:07:51 -04:00
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.zero_times, 4);
|
|
|
|
TEST_ASSERT_INT_WITHIN(3, event.filter_time, 14);
|
2018-06-06 07:56:43 -04:00
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|
|
|
2019-12-02 03:34:59 -05:00
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|
|
// Because this test uses its own ISR, we need to release it with `pcnt_isr_unregister` instead of `pcnt_isr_service_uninstall`
|
|
|
|
TEST_ESP_OK(pcnt_isr_unregister(pcnt_isr_service));
|
|
|
|
vQueueDelete(pcnt_evt_queue);
|
2018-06-06 07:56:43 -04:00
|
|
|
}
|
|
|
|
|
2019-12-02 03:34:59 -05:00
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|
|
TEST_CASE("PCNT interrupt method test(control IO is low)", "[pcnt][timeout=120]")
|
2018-06-06 07:56:43 -04:00
|
|
|
{
|
|
|
|
pcnt_config_t config = {
|
|
|
|
.pulse_gpio_num = PCNT_INPUT_IO,
|
|
|
|
.ctrl_gpio_num = PCNT_CTRL_GND_IO,
|
|
|
|
.channel = PCNT_CHANNEL_0,
|
|
|
|
.unit = PCNT_UNIT_0,
|
|
|
|
.pos_mode = PCNT_COUNT_INC,
|
|
|
|
.neg_mode = PCNT_COUNT_DIS,
|
|
|
|
.lctrl_mode = PCNT_MODE_REVERSE,
|
|
|
|
.hctrl_mode = PCNT_MODE_KEEP,
|
|
|
|
.counter_h_lim = 0,
|
2021-12-15 00:01:16 -05:00
|
|
|
.counter_l_lim = -10,
|
2018-06-06 07:56:43 -04:00
|
|
|
};
|
|
|
|
TEST_ESP_OK(pcnt_unit_config(&config));
|
|
|
|
produce_pulse();
|
2019-12-02 03:34:59 -05:00
|
|
|
pcnt_test_io_config(PCNT_CTRL_LOW_LEVEL);
|
2018-06-06 07:56:43 -04:00
|
|
|
|
|
|
|
event_times event = {
|
|
|
|
.zero_times = 0,
|
|
|
|
.h_limit = 0,
|
|
|
|
.l_limit = 0,
|
|
|
|
.h_threshold = 0,
|
|
|
|
.l_threshold = 0,
|
|
|
|
.filter_time = 0,
|
|
|
|
};
|
|
|
|
|
|
|
|
//interrupt set
|
|
|
|
TEST_ESP_OK(pcnt_set_filter_value(PCNT_UNIT_0, 2));
|
|
|
|
TEST_ESP_OK(pcnt_filter_enable(PCNT_UNIT_0));
|
2021-12-15 00:01:16 -05:00
|
|
|
TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_1, -8)); // when arrive to max threshold trigger
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_1));
|
|
|
|
TEST_ESP_OK(pcnt_set_event_value(PCNT_UNIT_0, PCNT_EVT_THRES_0, 0)); // when arrive to minimum threshold trigger
|
|
|
|
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_THRES_0));
|
|
|
|
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_ZERO));
|
|
|
|
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_H_LIM)); // when arrive to max limit trigger
|
|
|
|
TEST_ESP_OK(pcnt_event_enable(PCNT_UNIT_0, PCNT_EVT_L_LIM)); // when arrive to minimum limit trigger
|
|
|
|
|
|
|
|
// to initialize for PCNT
|
|
|
|
TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
|
|
|
|
|
2019-12-02 03:34:59 -05:00
|
|
|
pcnt_evt_queue = xQueueCreate(10, sizeof(uint32_t));
|
2020-09-09 22:37:58 -04:00
|
|
|
|
2019-12-02 03:34:59 -05:00
|
|
|
pcnt_isr_handle_t pcnt_isr_service;
|
|
|
|
TEST_ESP_OK(pcnt_isr_register(pcnt_intr_handler, NULL, 0, &pcnt_isr_service));
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ESP_OK(pcnt_intr_enable(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
|
|
|
|
|
|
|
|
// test event
|
|
|
|
event_calculate(&event);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_threshold, 1);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.l_threshold, 1);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.l_limit, 1);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_limit, 0);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.zero_times, 1);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.filter_time, 2);
|
|
|
|
|
|
|
|
// test interrupt disable
|
|
|
|
TEST_ESP_OK(pcnt_intr_disable(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
|
|
|
|
// for the original control io disable interrupt status
|
|
|
|
event_calculate(&event);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_threshold, 1);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.l_threshold, 1);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.l_limit, 1);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_limit, 0);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.zero_times, 1);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.filter_time, 2);
|
|
|
|
|
|
|
|
// enable the intr
|
|
|
|
pcnt_unit_config(&config);
|
2019-12-02 03:34:59 -05:00
|
|
|
pcnt_test_io_config(PCNT_CTRL_LOW_LEVEL);
|
2018-06-06 07:56:43 -04:00
|
|
|
TEST_ESP_OK(pcnt_intr_enable(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
|
|
|
|
TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
|
|
|
|
event_calculate(&event);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_threshold, 2);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.l_threshold, 3);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.l_limit, 2);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_limit, 0);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.zero_times, 2);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.filter_time, 6);
|
|
|
|
|
|
|
|
// disable part of events
|
|
|
|
TEST_ESP_OK(pcnt_event_disable(PCNT_UNIT_0, PCNT_EVT_ZERO));
|
|
|
|
TEST_ESP_OK(pcnt_event_disable(PCNT_UNIT_0, PCNT_EVT_L_LIM));
|
|
|
|
TEST_ESP_OK(pcnt_event_disable(PCNT_UNIT_0, PCNT_EVT_THRES_0));
|
|
|
|
event_calculate(&event);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_threshold, 4);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.l_threshold, 3);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.l_limit, 2);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.h_limit, 0);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.zero_times, 2);
|
|
|
|
TEST_ASSERT_INT_WITHIN(2, event.filter_time, 8);
|
|
|
|
|
2019-12-02 03:34:59 -05:00
|
|
|
// Because this test uses its own ISR, we need to release it with `pcnt_isr_unregister` instead of `pcnt_isr_service_uninstall`
|
|
|
|
TEST_ESP_OK(pcnt_isr_unregister(pcnt_isr_service));
|
|
|
|
vQueueDelete(pcnt_evt_queue);
|
2018-06-06 07:56:43 -04:00
|
|
|
}
|
|
|
|
|
2019-12-02 03:34:59 -05:00
|
|
|
TEST_CASE("PCNT counting mode test", "[pcnt]")
|
2018-06-06 07:56:43 -04:00
|
|
|
{
|
|
|
|
printf("PCNT mode test for positive count\n");
|
2019-12-02 03:34:59 -05:00
|
|
|
count_mode_test(PCNT_CTRL_VCC_IO);
|
2018-06-06 07:56:43 -04:00
|
|
|
printf("PCNT mode test for negative count\n");
|
|
|
|
count_mode_test(PCNT_CTRL_GND_IO);
|
2020-08-20 00:22:36 -04:00
|
|
|
}
|
|
|
|
|
2020-10-12 02:23:49 -04:00
|
|
|
#endif // #if SOC_PCNT_SUPPORTED
|