2021-11-06 05:29:29 -04:00
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/*
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2022-01-17 21:32:56 -05:00
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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2021-11-06 05:29:29 -04:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "soc/uart_periph.h"
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#include "soc/gpio_periph.h"
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#include "soc/soc.h"
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#include "esp_gdbstub_common.h"
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#include "sdkconfig.h"
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#define UART_NUM CONFIG_ESP_CONSOLE_UART_NUM
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#define GDBSTUB_MEM_REGION_COUNT 9
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#define UART_REG_FIELD_LEN 0x84
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typedef struct {
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intptr_t lower;
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intptr_t upper;
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} mem_bound_t;
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static const mem_bound_t mem_region_table [GDBSTUB_MEM_REGION_COUNT] =
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{
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{SOC_DROM_LOW, SOC_DROM_HIGH},
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{SOC_IROM_LOW, SOC_IROM_HIGH},
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{SOC_IRAM_LOW, SOC_IRAM_HIGH},
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{SOC_DRAM_LOW, SOC_DRAM_HIGH},
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{SOC_IROM_MASK_LOW, SOC_IROM_MASK_HIGH},
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{SOC_DROM_MASK_LOW, SOC_DROM_MASK_HIGH},
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// RTC DRAM and RTC DATA are identical with RTC IRAM, hence we skip them
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// We shouldn't read the uart registers since it will disturb the debugging via UART,
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// so skip UART part of the peripheral registers.
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{DR_REG_UART_BASE + UART_REG_FIELD_LEN, SOC_PERIPHERAL_HIGH},
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{SOC_DEBUG_LOW, SOC_DEBUG_HIGH},
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};
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static inline bool check_inside_valid_region(intptr_t addr)
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{
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for (size_t i = 0; i < GDBSTUB_MEM_REGION_COUNT; i++) {
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if (addr >= mem_region_table[i].lower && addr < mem_region_table[i].upper) {
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return true;
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}
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}
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return false;
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}
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void esp_gdbstub_target_init()
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{
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}
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//assume UART gdbstub channel
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int esp_gdbstub_getchar()
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{
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while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_RXFIFO_CNT) == 0) {
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;
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}
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return REG_READ(UART_FIFO_AHB_REG(UART_NUM));
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}
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void esp_gdbstub_putchar(int c)
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{
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while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_TXFIFO_CNT) >= 126) {
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;
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}
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REG_WRITE(UART_FIFO_AHB_REG(UART_NUM), c);
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}
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void esp_gdbstub_flush()
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{
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//not needed for uart
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}
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int esp_gdbstub_readmem(intptr_t addr)
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{
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if (!check_inside_valid_region(addr)) {
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/* see esp_cpu_configure_region_protection */
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return -1;
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}
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uint32_t val_aligned = *(uint32_t *)(addr & (~3));
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uint32_t shift = (addr & 3) * 8;
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return (val_aligned >> shift) & 0xff;
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}
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