2022-09-13 06:47:08 -04:00
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/*
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2023-01-19 21:49:43 -05:00
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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2022-09-13 06:47:08 -04:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include "sdkconfig.h"
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#include "freertos/FreeRTOS.h"
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#include "esp_err.h"
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#include "esp_intr_alloc.h"
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#include "esp_heap_caps.h"
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#include "soc/soc_caps.h"
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#include "hal/gdma_hal.h"
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#include "hal/gdma_ll.h"
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#include "soc/gdma_periph.h"
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#include "esp_private/gdma.h"
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#if CONFIG_GDMA_ISR_IRAM_SAFE || CONFIG_GDMA_CTRL_FUNC_IN_IRAM
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#define GDMA_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
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#else
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#define GDMA_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
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#endif
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#if CONFIG_GDMA_ISR_IRAM_SAFE
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#define GDMA_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED)
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#else
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#define GDMA_INTR_ALLOC_FLAGS ESP_INTR_FLAG_INTRDISABLED
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct gdma_pair_t gdma_pair_t;
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typedef struct gdma_channel_t gdma_channel_t;
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typedef struct gdma_tx_channel_t gdma_tx_channel_t;
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typedef struct gdma_rx_channel_t gdma_rx_channel_t;
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typedef struct gdma_group_t {
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int group_id; // Group ID, index from 0
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gdma_hal_context_t hal; // HAL instance is at group level
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portMUX_TYPE spinlock; // group level spinlock
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2023-01-19 21:49:43 -05:00
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uint32_t tx_periph_in_use_mask; // each bit indicates which peripheral (TX direction) has been occupied
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uint32_t rx_periph_in_use_mask; // each bit indicates which peripheral (RX direction) has been occupied
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2022-09-13 06:47:08 -04:00
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gdma_pair_t *pairs[SOC_GDMA_PAIRS_PER_GROUP]; // handles of GDMA pairs
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int pair_ref_counts[SOC_GDMA_PAIRS_PER_GROUP]; // reference count used to protect pair install/uninstall
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} gdma_group_t;
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struct gdma_pair_t {
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gdma_group_t *group; // which group the pair belongs to
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int pair_id; // Pair ID, index from 0
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gdma_tx_channel_t *tx_chan; // pointer of tx channel in the pair
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gdma_rx_channel_t *rx_chan; // pointer of rx channel in the pair
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int occupy_code; // each bit indicates which channel has been occupied (an occupied channel will be skipped during channel search)
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portMUX_TYPE spinlock; // pair level spinlock
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};
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struct gdma_channel_t {
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gdma_pair_t *pair; // which pair the channel belongs to
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intr_handle_t intr; // per-channel interrupt handle
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portMUX_TYPE spinlock; // channel level spinlock
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gdma_channel_direction_t direction; // channel direction
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int periph_id; // Peripheral instance ID, indicates which peripheral is connected to this GDMA channel
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size_t sram_alignment; // alignment for memory in SRAM
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size_t psram_alignment; // alignment for memory in PSRAM
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esp_err_t (*del)(gdma_channel_t *channel); // channel deletion function, it's polymorphic, see `gdma_del_tx_channel` or `gdma_del_rx_channel`
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2023-04-03 03:55:00 -04:00
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struct {
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uint32_t start_stop_by_etm: 1; // whether the channel is started/stopped by ETM
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} flags;
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2022-09-13 06:47:08 -04:00
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};
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struct gdma_tx_channel_t {
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gdma_channel_t base; // GDMA channel, base class
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void *user_data; // user registered DMA event data
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gdma_event_callback_t on_trans_eof; // TX EOF callback
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};
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struct gdma_rx_channel_t {
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gdma_channel_t base; // GDMA channel, base class
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void *user_data; // user registered DMA event data
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gdma_event_callback_t on_recv_eof; // RX EOF callback
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};
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#ifdef __cplusplus
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}
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#endif
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