2019-10-29 23:19:22 -04:00
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#include "esp_system.h"
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#include "esp_private/system_internal.h"
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#include "esp_heap_caps.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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2020-03-10 11:46:10 -04:00
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#include "soc/rtc.h"
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#include "soc/rtc_cntl_reg.h"
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2020-04-30 10:37:57 -04:00
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#include "panic_internal.h"
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#if CONFIG_IDF_TARGET_ESP32
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#include "esp32/rom/uart.h"
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#elif CONFIG_IDF_TARGET_ESP32S2
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2020-03-10 11:46:10 -04:00
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#include "esp32s2/rom/uart.h"
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#include "esp32s2/memprot.h"
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#endif
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2019-10-29 23:19:22 -04:00
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#define SHUTDOWN_HANDLERS_NO 2
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static shutdown_handler_t shutdown_handlers[SHUTDOWN_HANDLERS_NO];
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esp_err_t esp_register_shutdown_handler(shutdown_handler_t handler)
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{
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for (int i = 0; i < SHUTDOWN_HANDLERS_NO; i++) {
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if (shutdown_handlers[i] == handler) {
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return ESP_ERR_INVALID_STATE;
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} else if (shutdown_handlers[i] == NULL) {
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shutdown_handlers[i] = handler;
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return ESP_OK;
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}
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}
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return ESP_ERR_NO_MEM;
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}
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esp_err_t esp_unregister_shutdown_handler(shutdown_handler_t handler)
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{
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for (int i = 0; i < SHUTDOWN_HANDLERS_NO; i++) {
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if (shutdown_handlers[i] == handler) {
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shutdown_handlers[i] = NULL;
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return ESP_OK;
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}
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}
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return ESP_ERR_INVALID_STATE;
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}
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2020-04-30 10:37:57 -04:00
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void IRAM_ATTR esp_restart_noos_dig(void)
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2020-03-10 11:46:10 -04:00
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{
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// make sure all the panic handler output is sent from UART FIFO
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2020-04-30 10:37:57 -04:00
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if (CONFIG_ESP_CONSOLE_UART_NUM >= 0) {
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uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
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}
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2020-03-10 11:46:10 -04:00
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2020-04-30 10:37:57 -04:00
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// switch to XTAL (otherwise we will keep running from the PLL)
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2020-03-10 11:46:10 -04:00
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rtc_clk_cpu_freq_set_xtal();
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2020-04-30 10:37:57 -04:00
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#if CONFIG_IDF_TARGET_ESP32
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esp_cpu_unstall(PRO_CPU_NUM);
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#endif
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2020-03-10 11:46:10 -04:00
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// reset the digital part
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SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
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while (true) {
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;
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}
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}
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2019-10-29 23:19:22 -04:00
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void IRAM_ATTR esp_restart(void)
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{
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for (int i = SHUTDOWN_HANDLERS_NO - 1; i >= 0; i--) {
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if (shutdown_handlers[i]) {
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shutdown_handlers[i]();
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}
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}
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// Disable scheduler on this core.
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vTaskSuspendAll();
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2020-03-10 11:46:10 -04:00
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#if CONFIG_IDF_TARGET_ESP32S2
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2020-04-30 10:37:57 -04:00
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if (esp_memprot_is_intr_ena_any() || esp_memprot_is_locked_any()) {
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esp_restart_noos_dig();
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2020-03-10 11:46:10 -04:00
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}
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#endif
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2019-10-29 23:19:22 -04:00
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esp_restart_noos();
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}
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uint32_t esp_get_free_heap_size( void )
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{
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return heap_caps_get_free_size( MALLOC_CAP_DEFAULT );
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}
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uint32_t esp_get_minimum_free_heap_size( void )
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{
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return heap_caps_get_minimum_free_size( MALLOC_CAP_DEFAULT );
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}
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2020-03-10 11:46:10 -04:00
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const char *esp_get_idf_version(void)
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2019-10-29 23:19:22 -04:00
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{
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return IDF_VER;
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}
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2020-03-10 11:46:10 -04:00
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void __attribute__((noreturn)) esp_system_abort(const char *details)
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2020-02-02 10:23:16 -05:00
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{
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panic_abort(details);
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2020-04-30 10:37:57 -04:00
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}
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