2021-05-23 20:09:38 -04:00
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/*
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2022-01-17 01:37:30 -05:00
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* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
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2021-05-23 20:09:38 -04:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2019-07-19 09:20:16 -04:00
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#include <string.h>
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2021-08-25 05:02:19 -04:00
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#include "esp_check.h"
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2019-07-19 09:20:16 -04:00
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#include "freertos/FreeRTOS.h"
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#include "driver/rtc_io.h"
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2022-05-24 05:26:36 -04:00
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#include "driver/dac_types_legacy.h"
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2019-07-19 09:20:16 -04:00
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#include "soc/dac_periph.h"
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2022-05-24 05:26:36 -04:00
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#include "hal/gpio_types.h"
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#include "hal/dac_ll.h"
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#include "clk_ctrl_os.h"
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2019-07-19 09:20:16 -04:00
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extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
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2022-01-17 01:37:30 -05:00
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static __attribute__((unused)) const char *TAG = "DAC";
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2019-07-19 09:20:16 -04:00
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/*---------------------------------------------------------------
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DAC
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---------------------------------------------------------------*/
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esp_err_t dac_pad_get_io_num(dac_channel_t channel, gpio_num_t *gpio_num)
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{
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2022-10-10 07:17:22 -04:00
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ESP_RETURN_ON_FALSE(channel < SOC_DAC_CHAN_NUM, ESP_ERR_INVALID_ARG, TAG, "DAC channel error");
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2019-07-19 09:20:16 -04:00
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*gpio_num = (gpio_num_t)dac_periph_signal.dac_channel_io_num[channel];
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return ESP_OK;
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}
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static esp_err_t dac_rtc_pad_init(dac_channel_t channel)
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{
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ESP_RETURN_ON_FALSE(channel < SOC_DAC_CHAN_NUM, ESP_ERR_INVALID_ARG, TAG, "DAC channel error");
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2019-07-19 09:20:16 -04:00
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gpio_num_t gpio_num = 0;
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dac_pad_get_io_num(channel, &gpio_num);
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rtc_gpio_init(gpio_num);
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rtc_gpio_set_direction(gpio_num, RTC_GPIO_MODE_DISABLED);
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rtc_gpio_pullup_dis(gpio_num);
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rtc_gpio_pulldown_dis(gpio_num);
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return ESP_OK;
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}
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esp_err_t dac_output_enable(dac_channel_t channel)
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{
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ESP_RETURN_ON_FALSE(channel < SOC_DAC_CHAN_NUM, ESP_ERR_INVALID_ARG, TAG, "DAC channel error");
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2019-07-19 09:20:16 -04:00
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dac_rtc_pad_init(channel);
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portENTER_CRITICAL(&rtc_spinlock);
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2022-05-24 05:26:36 -04:00
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dac_ll_power_on(channel);
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dac_ll_rtc_sync_by_adc(false);
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2019-07-19 09:20:16 -04:00
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portEXIT_CRITICAL(&rtc_spinlock);
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return ESP_OK;
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}
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esp_err_t dac_output_disable(dac_channel_t channel)
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{
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2022-10-10 07:17:22 -04:00
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ESP_RETURN_ON_FALSE(channel < SOC_DAC_CHAN_NUM, ESP_ERR_INVALID_ARG, TAG, "DAC channel error");
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2019-07-19 09:20:16 -04:00
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portENTER_CRITICAL(&rtc_spinlock);
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2022-05-24 05:26:36 -04:00
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dac_ll_power_down(channel);
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2019-07-19 09:20:16 -04:00
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portEXIT_CRITICAL(&rtc_spinlock);
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return ESP_OK;
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}
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esp_err_t dac_output_voltage(dac_channel_t channel, uint8_t dac_value)
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{
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2022-10-10 07:17:22 -04:00
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ESP_RETURN_ON_FALSE(channel < SOC_DAC_CHAN_NUM, ESP_ERR_INVALID_ARG, TAG, "DAC channel error");
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2019-07-19 09:20:16 -04:00
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portENTER_CRITICAL(&rtc_spinlock);
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2022-05-24 05:26:36 -04:00
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dac_ll_update_output_value(channel, dac_value);
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2019-07-19 09:20:16 -04:00
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portEXIT_CRITICAL(&rtc_spinlock);
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return ESP_OK;
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}
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esp_err_t dac_out_voltage(dac_channel_t channel, uint8_t dac_value)
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{
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2022-10-10 07:17:22 -04:00
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ESP_RETURN_ON_FALSE(channel < SOC_DAC_CHAN_NUM, ESP_ERR_INVALID_ARG, TAG, "DAC channel error");
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2019-07-19 09:20:16 -04:00
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portENTER_CRITICAL(&rtc_spinlock);
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2022-05-24 05:26:36 -04:00
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dac_ll_update_output_value(channel, dac_value);
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2019-07-19 09:20:16 -04:00
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portEXIT_CRITICAL(&rtc_spinlock);
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return ESP_OK;
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}
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esp_err_t dac_cw_generator_enable(void)
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{
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portENTER_CRITICAL(&rtc_spinlock);
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2022-10-10 07:17:22 -04:00
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periph_rtc_dig_clk8m_enable();
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2022-05-24 05:26:36 -04:00
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dac_ll_cw_generator_enable();
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2019-07-19 09:20:16 -04:00
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portEXIT_CRITICAL(&rtc_spinlock);
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return ESP_OK;
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}
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esp_err_t dac_cw_generator_disable(void)
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{
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portENTER_CRITICAL(&rtc_spinlock);
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2022-05-24 05:26:36 -04:00
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dac_ll_cw_generator_disable();
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2022-10-10 07:17:22 -04:00
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periph_rtc_dig_clk8m_disable();
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2019-07-19 09:20:16 -04:00
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portEXIT_CRITICAL(&rtc_spinlock);
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return ESP_OK;
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}
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esp_err_t dac_cw_generator_config(dac_cw_config_t *cw)
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{
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2021-08-25 05:02:19 -04:00
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ESP_RETURN_ON_FALSE(cw, ESP_ERR_INVALID_ARG, TAG, "invalid clock configuration");
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2019-07-19 09:20:16 -04:00
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portENTER_CRITICAL(&rtc_spinlock);
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2022-10-10 07:17:22 -04:00
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/* Enable the rtc8m clock temporary to get the correct frequecy */
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periph_rtc_dig_clk8m_enable();
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uint32_t rtc_freq = periph_rtc_dig_clk8m_get_freq();
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periph_rtc_dig_clk8m_disable();
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dac_ll_cw_set_freq(cw->freq, rtc_freq);
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dac_ll_cw_set_atten(cw->en_ch, (dac_cosine_atten_t)cw->scale);
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dac_ll_cw_set_phase(cw->en_ch, (dac_cosine_phase_t)cw->phase);
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2022-05-09 05:33:51 -04:00
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dac_ll_cw_set_dc_offset(cw->en_ch, cw->offset);
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2022-10-10 07:17:22 -04:00
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dac_ll_cw_enable_channel(cw->en_ch, true);
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2019-07-19 09:20:16 -04:00
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portEXIT_CRITICAL(&rtc_spinlock);
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return ESP_OK;
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2020-07-29 08:46:37 -04:00
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}
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2022-05-24 05:26:36 -04:00
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/**
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* @brief This function will be called during start up, to check that this legacy DAC driver is not running along with the new driver
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*/
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__attribute__((constructor))
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static void check_dac_legacy_driver_conflict(void)
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{
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// This function was declared as weak here. The new DAC driver has one implementation.
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2022-10-10 07:17:22 -04:00
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// So if the new DAC driver is not linked in, then `dac_priv_register_channel()` should be NULL at runtime.
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extern __attribute__((weak)) esp_err_t dac_priv_register_channel(dac_channel_t chan_id, const char *mode_name);
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if ((void *)dac_priv_register_channel != NULL) {
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2022-05-24 05:26:36 -04:00
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ESP_EARLY_LOGE(TAG, "CONFLICT! The new DAC driver is not allowed to be used together with the legacy driver");
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abort();
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}
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2022-10-10 07:17:22 -04:00
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ESP_EARLY_LOGW(TAG, "legacy driver is deprecated, please migrate to `driver/dac_oneshot.h`, `driver/dac_cosine.h` or `driver/dac_conti.h` instead");
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2022-05-24 05:26:36 -04:00
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}
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