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59 lines
2.2 KiB
C
59 lines
2.2 KiB
C
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/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <stdint.h>
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#include "sdkconfig.h"
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#include "soc/ext_mem_defs.h"
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#include "../ext_mem_layout.h"
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/**
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* These regions is referring to linear address
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* The start addresses in this list should always be sorted from low to high, as MMU driver will need to
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* coalesce adjacent regions
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*/
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const mmu_mem_region_t g_mmu_mem_regions[SOC_MMU_LINEAR_ADDRESS_REGION_NUM] = {
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[0] = {
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.start = SOC_MMU_IRAM0_LINEAR_ADDRESS_LOW,
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.end = SOC_MMU_IRAM0_LINEAR_ADDRESS_HIGH,
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.size = BUS_SIZE(SOC_MMU_IRAM0_LINEAR),
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.bus_id = CACHE_BUS_IBUS0,
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.targets = MMU_TARGET_FLASH0 | MMU_TARGET_PSRAM0,
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.caps = MMU_MEM_CAP_EXEC | MMU_MEM_CAP_32BIT,
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},
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[1] = {
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.start = SOC_MMU_DROM0_LINEAR_ADDRESS_LOW,
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.end = SOC_MMU_DROM0_LINEAR_ADDRESS_HIGH,
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.size = BUS_SIZE(SOC_MMU_DROM0_LINEAR),
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.bus_id = CACHE_BUS_IBUS2,
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.targets = MMU_TARGET_FLASH0 | MMU_TARGET_PSRAM0,
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.caps = MMU_MEM_CAP_READ | MMU_MEM_CAP_32BIT | MMU_MEM_CAP_8BIT,
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},
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[2] = {
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.start = SOC_MMU_DPORT_LINEAR_ADDRESS_LOW,
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.end = SOC_MMU_DPORT_LINEAR_ADDRESS_HIGH,
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.size = BUS_SIZE(SOC_MMU_DPORT_LINEAR),
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.bus_id = CACHE_BUS_DBUS2,
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.targets = MMU_TARGET_FLASH0 | MMU_TARGET_PSRAM0,
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.caps = MMU_MEM_CAP_READ | MMU_MEM_CAP_WRITE | MMU_MEM_CAP_32BIT,
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},
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[3] = {
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.start = SOC_MMU_DRAM1_LINEAR_ADDRESS_LOW,
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.end = SOC_MMU_DRAM1_LINEAR_ADDRESS_HIGH,
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.size = BUS_SIZE(SOC_MMU_DRAM1_LINEAR),
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.bus_id = CACHE_BUS_DBUS1,
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.targets = MMU_TARGET_FLASH0 | MMU_TARGET_PSRAM0,
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.caps = MMU_MEM_CAP_READ | MMU_MEM_CAP_WRITE | MMU_MEM_CAP_32BIT | MMU_MEM_CAP_8BIT,
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},
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[4] = {
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.start = SOC_MMU_DRAM0_LINEAR_ADDRESS_LOW,
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.end = SOC_MMU_DRAM0_LINEAR_ADDRESS_HIGH,
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.size = BUS_SIZE(SOC_MMU_DRAM0_LINEAR),
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.bus_id = CACHE_BUS_DBUS0,
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.targets = MMU_TARGET_FLASH0 | MMU_TARGET_PSRAM0,
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.caps = MMU_MEM_CAP_READ | MMU_MEM_CAP_WRITE | MMU_MEM_CAP_32BIT | MMU_MEM_CAP_8BIT,
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},
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};
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