2021-09-15 17:06:10 -04:00
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/*
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2024-01-15 10:30:20 -05:00
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* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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2021-09-15 17:06:10 -04:00
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*
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2024-01-15 10:30:20 -05:00
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* SPDX-License-Identifier: Apache-2.0 OR MIT
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2021-09-15 17:06:10 -04:00
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*/
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2023-12-13 17:32:53 -05:00
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#include "sdkconfig.h"
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2022-07-21 07:24:42 -04:00
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#include "esp_cpu.h"
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2021-05-28 17:20:02 -04:00
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#include "esp_log.h"
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#include "esp_app_trace_membufs_proto.h"
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#include "esp_app_trace_port.h"
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2021-01-05 18:26:07 -05:00
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#include "riscv/semihosting.h"
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2021-05-28 17:20:02 -04:00
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/** RISCV HW transport data */
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typedef struct {
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uint8_t inited; // initialization state flags for every core
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#if CONFIG_APPTRACE_LOCK_ENABLE
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esp_apptrace_lock_t lock; // sync lock
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#endif
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esp_apptrace_membufs_proto_data_t membufs;
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} esp_apptrace_riscv_data_t;
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/** RISCV memory host iface control block */
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typedef struct {
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uint32_t ctrl;
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// - Guard field. If this register is not zero then CPU is changing this struct and
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// this guard field holds address of the instruction which application will execute when CPU finishes with those modifications.
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uint32_t stat;
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esp_apptrace_mem_block_t * mem_blocks;
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} esp_apptrace_riscv_ctrl_block_t;
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#define ESP_APPTRACE_RISCV_BLOCK_LEN_MSK 0x7FFFUL
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#define ESP_APPTRACE_RISCV_BLOCK_LEN(_l_) ((_l_) & ESP_APPTRACE_RISCV_BLOCK_LEN_MSK)
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#define ESP_APPTRACE_RISCV_BLOCK_LEN_GET(_v_) ((_v_) & ESP_APPTRACE_RISCV_BLOCK_LEN_MSK)
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#define ESP_APPTRACE_RISCV_BLOCK_ID_MSK 0x7FUL
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#define ESP_APPTRACE_RISCV_BLOCK_ID(_id_) (((_id_) & ESP_APPTRACE_RISCV_BLOCK_ID_MSK) << 15)
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#define ESP_APPTRACE_RISCV_BLOCK_ID_GET(_v_) (((_v_) >> 15) & ESP_APPTRACE_RISCV_BLOCK_ID_MSK)
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#define ESP_APPTRACE_RISCV_HOST_DATA (1 << 22)
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#define ESP_APPTRACE_RISCV_HOST_CONNECT (1 << 23)
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2022-07-21 07:24:42 -04:00
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#define ESP_APPTRACE_RISCV_INITED(_hw_) ((_hw_)->inited & (1 << 0/*esp_cpu_get_core_id()*/))
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2021-05-28 17:20:02 -04:00
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static esp_err_t esp_apptrace_riscv_init(esp_apptrace_riscv_data_t *hw_data);
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static esp_err_t esp_apptrace_riscv_flush(esp_apptrace_riscv_data_t *hw_data, esp_apptrace_tmo_t *tmo);
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static esp_err_t esp_apptrace_riscv_flush_nolock(esp_apptrace_riscv_data_t *hw_data, uint32_t min_sz, esp_apptrace_tmo_t *tmo);
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static uint8_t *esp_apptrace_riscv_up_buffer_get(esp_apptrace_riscv_data_t *hw_data, uint32_t size, esp_apptrace_tmo_t *tmo);
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static esp_err_t esp_apptrace_riscv_up_buffer_put(esp_apptrace_riscv_data_t *hw_data, uint8_t *ptr, esp_apptrace_tmo_t *tmo);
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static void esp_apptrace_riscv_down_buffer_config(esp_apptrace_riscv_data_t *hw_data, uint8_t *buf, uint32_t size);
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static uint8_t *esp_apptrace_riscv_down_buffer_get(esp_apptrace_riscv_data_t *hw_data, uint32_t *size, esp_apptrace_tmo_t *tmo);
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static esp_err_t esp_apptrace_riscv_down_buffer_put(esp_apptrace_riscv_data_t *hw_data, uint8_t *ptr, esp_apptrace_tmo_t *tmo);
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static bool esp_apptrace_riscv_host_is_connected(esp_apptrace_riscv_data_t *hw_data);
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static esp_err_t esp_apptrace_riscv_buffer_swap_start(uint32_t curr_block_id);
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static esp_err_t esp_apptrace_riscv_buffer_swap(uint32_t new_block_id);
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static esp_err_t esp_apptrace_riscv_buffer_swap_end(uint32_t new_block_id, uint32_t prev_block_len);
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static bool esp_apptrace_riscv_host_data_pending(void);
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const static char *TAG = "esp_apptrace";
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2023-12-13 17:32:53 -05:00
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static esp_apptrace_riscv_ctrl_block_t s_tracing_ctrl[CONFIG_FREERTOS_NUMBER_OF_CORES];
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2021-05-28 17:20:02 -04:00
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esp_apptrace_hw_t *esp_apptrace_jtag_hw_get(void **data)
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{
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#if CONFIG_APPTRACE_DEST_JTAG
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static esp_apptrace_membufs_proto_hw_t s_trace_proto_hw = {
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.swap_start = esp_apptrace_riscv_buffer_swap_start,
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.swap = esp_apptrace_riscv_buffer_swap,
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.swap_end = esp_apptrace_riscv_buffer_swap_end,
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.host_data_pending = esp_apptrace_riscv_host_data_pending,
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};
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static esp_apptrace_riscv_data_t s_trace_hw_data = {
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.membufs = {
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.hw = &s_trace_proto_hw,
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},
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};
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static esp_apptrace_hw_t s_trace_hw = {
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.init = (esp_err_t (*)(void *))esp_apptrace_riscv_init,
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.get_up_buffer = (uint8_t *(*)(void *, uint32_t, esp_apptrace_tmo_t *))esp_apptrace_riscv_up_buffer_get,
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.put_up_buffer = (esp_err_t (*)(void *, uint8_t *, esp_apptrace_tmo_t *))esp_apptrace_riscv_up_buffer_put,
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.flush_up_buffer_nolock = (esp_err_t (*)(void *, uint32_t, esp_apptrace_tmo_t *))esp_apptrace_riscv_flush_nolock,
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.flush_up_buffer = (esp_err_t (*)(void *, esp_apptrace_tmo_t *))esp_apptrace_riscv_flush,
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.down_buffer_config = (void (*)(void *, uint8_t *, uint32_t ))esp_apptrace_riscv_down_buffer_config,
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.get_down_buffer = (uint8_t *(*)(void *, uint32_t *, esp_apptrace_tmo_t *))esp_apptrace_riscv_down_buffer_get,
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.put_down_buffer = (esp_err_t (*)(void *, uint8_t *, esp_apptrace_tmo_t *))esp_apptrace_riscv_down_buffer_put,
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.host_is_connected = (bool (*)(void *))esp_apptrace_riscv_host_is_connected,
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};
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*data = &s_trace_hw_data;
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return &s_trace_hw;
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#else
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return NULL;
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#endif
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}
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/* Advertises apptrace control block address to host.
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This function can be overriden with custom implementation,
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e.g. OpenOCD flasher stub use own implementation of it. */
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__attribute__((weak)) int esp_apptrace_advertise_ctrl_block(void *ctrl_block_addr)
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{
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2022-07-19 01:20:07 -04:00
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if (!esp_cpu_dbgr_is_attached()) {
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2021-05-28 17:20:02 -04:00
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return 0;
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}
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2022-02-02 14:27:13 -05:00
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return (int) semihosting_call_noerrno(ESP_SEMIHOSTING_SYS_APPTRACE_INIT, (long*)ctrl_block_addr);
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2021-05-28 17:20:02 -04:00
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}
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/* Returns up buffers config.
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This function can be overriden with custom implementation,
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e.g. OpenOCD flasher stub use own implementation of it. */
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__attribute__((weak)) void esp_apptrace_get_up_buffers(esp_apptrace_mem_block_t mem_blocks_cfg[2])
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{
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static uint8_t s_mem_blocks[2][CONFIG_APPTRACE_BUF_SIZE];
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mem_blocks_cfg[0].start = s_mem_blocks[0];
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mem_blocks_cfg[0].sz = CONFIG_APPTRACE_BUF_SIZE;
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mem_blocks_cfg[1].start = s_mem_blocks[1];
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mem_blocks_cfg[1].sz = CONFIG_APPTRACE_BUF_SIZE;
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}
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static esp_err_t esp_apptrace_riscv_lock(esp_apptrace_riscv_data_t *hw_data, esp_apptrace_tmo_t *tmo)
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{
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#if CONFIG_APPTRACE_LOCK_ENABLE
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esp_err_t ret = esp_apptrace_lock_take(&hw_data->lock, tmo);
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if (ret != ESP_OK) {
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return ESP_FAIL;
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}
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#endif
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return ESP_OK;
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}
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static esp_err_t esp_apptrace_riscv_unlock(esp_apptrace_riscv_data_t *hw_data)
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{
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esp_err_t ret = ESP_OK;
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#if CONFIG_APPTRACE_LOCK_ENABLE
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ret = esp_apptrace_lock_give(&hw_data->lock);
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#endif
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return ret;
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}
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/*****************************************************************************************/
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/***************************** Apptrace HW iface *****************************************/
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/*****************************************************************************************/
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static esp_err_t esp_apptrace_riscv_init(esp_apptrace_riscv_data_t *hw_data)
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{
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2022-07-21 07:24:42 -04:00
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int core_id = esp_cpu_get_core_id();
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2021-05-28 17:20:02 -04:00
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if (hw_data->inited == 0) {
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esp_apptrace_mem_block_t mem_blocks_cfg[2];
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esp_apptrace_get_up_buffers(mem_blocks_cfg);
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esp_err_t res = esp_apptrace_membufs_init(&hw_data->membufs, mem_blocks_cfg);
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if (res != ESP_OK) {
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ESP_APPTRACE_LOGE("Failed to init membufs proto (%d)!", res);
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return res;
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}
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#if CONFIG_APPTRACE_LOCK_ENABLE
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esp_apptrace_lock_init(&hw_data->lock);
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#endif
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}
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hw_data->inited |= 1 << core_id;
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ESP_APPTRACE_LOGI("Apptrace initialized on CPU%d. Tracing control block @ %p.", core_id, &s_tracing_ctrl[core_id]);
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s_tracing_ctrl[core_id].mem_blocks = hw_data->membufs.blocks;
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for (int i = 0; i < 2; i++) {
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2024-03-07 10:43:45 -05:00
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ESP_APPTRACE_LOGD("Mem buf[%d] %" PRIu32 " bytes @ %p (%p/%p)", i,
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2021-05-28 17:20:02 -04:00
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s_tracing_ctrl[core_id].mem_blocks[i].sz, s_tracing_ctrl[core_id].mem_blocks[i].start,
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&(s_tracing_ctrl[core_id].mem_blocks[i].start), &(s_tracing_ctrl[core_id].mem_blocks[i].sz));
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}
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// notify host about control block address
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int res = esp_apptrace_advertise_ctrl_block(&s_tracing_ctrl[core_id]);
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assert(res == 0 && "Falied to send config to host!");
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return ESP_OK;
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}
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static uint8_t *esp_apptrace_riscv_up_buffer_get(esp_apptrace_riscv_data_t *hw_data, uint32_t size, esp_apptrace_tmo_t *tmo)
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{
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uint8_t *ptr;
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if (!ESP_APPTRACE_RISCV_INITED(hw_data)) {
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return NULL;
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}
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esp_err_t res = esp_apptrace_riscv_lock(hw_data, tmo);
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if (res != ESP_OK) {
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return NULL;
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}
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ptr = esp_apptrace_membufs_up_buffer_get(&hw_data->membufs, size, tmo);
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// now we can safely unlock apptrace to allow other tasks/ISRs to get other buffers and write their data
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if (esp_apptrace_riscv_unlock(hw_data) != ESP_OK) {
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assert(false && "Failed to unlock apptrace data!");
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}
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return ptr;
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}
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static esp_err_t esp_apptrace_riscv_up_buffer_put(esp_apptrace_riscv_data_t *hw_data, uint8_t *ptr, esp_apptrace_tmo_t *tmo)
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{
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if (!ESP_APPTRACE_RISCV_INITED(hw_data)) {
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return ESP_ERR_INVALID_STATE;
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}
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// Can avoid locking because esp_apptrace_membufs_up_buffer_put() just modifies buffer's header
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esp_err_t res = esp_apptrace_membufs_up_buffer_put(&hw_data->membufs, ptr, tmo);
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return res;
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}
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static void esp_apptrace_riscv_down_buffer_config(esp_apptrace_riscv_data_t *hw_data, uint8_t *buf, uint32_t size)
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{
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if (!ESP_APPTRACE_RISCV_INITED(hw_data)) {
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return;
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}
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esp_apptrace_membufs_down_buffer_config(&hw_data->membufs, buf, size);
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}
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static uint8_t *esp_apptrace_riscv_down_buffer_get(esp_apptrace_riscv_data_t *hw_data, uint32_t *size, esp_apptrace_tmo_t *tmo)
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{
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uint8_t *ptr;
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if (!ESP_APPTRACE_RISCV_INITED(hw_data)) {
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return NULL;
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}
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esp_err_t res = esp_apptrace_riscv_lock(hw_data, tmo);
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if (res != ESP_OK) {
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return NULL;
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}
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ptr = esp_apptrace_membufs_down_buffer_get(&hw_data->membufs, size, tmo);
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// now we can safely unlock apptrace to allow other tasks/ISRs to get other buffers and write their data
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if (esp_apptrace_riscv_unlock(hw_data) != ESP_OK) {
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assert(false && "Failed to unlock apptrace data!");
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}
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return ptr;
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}
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static esp_err_t esp_apptrace_riscv_down_buffer_put(esp_apptrace_riscv_data_t *hw_data, uint8_t *ptr, esp_apptrace_tmo_t *tmo)
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{
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if (!ESP_APPTRACE_RISCV_INITED(hw_data)) {
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return ESP_ERR_INVALID_STATE;
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}
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// Can avoid locking because esp_apptrace_membufs_down_buffer_put() does nothing
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/*esp_err_t res = esp_apptrace_riscv_lock(hw_data, tmo);
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if (res != ESP_OK) {
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return res;
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}*/
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esp_err_t res = esp_apptrace_membufs_down_buffer_put(&hw_data->membufs, ptr, tmo);
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// now we can safely unlock apptrace to allow other tasks/ISRs to get other buffers and write their data
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/*if (esp_apptrace_riscv_unlock(hw_data) != ESP_OK) {
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assert(false && "Failed to unlock apptrace data!");
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}*/
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return res;
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}
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static bool esp_apptrace_riscv_host_is_connected(esp_apptrace_riscv_data_t *hw_data)
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{
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if (!ESP_APPTRACE_RISCV_INITED(hw_data)) {
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return false;
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}
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2022-07-21 07:24:42 -04:00
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return s_tracing_ctrl[esp_cpu_get_core_id()].ctrl & ESP_APPTRACE_RISCV_HOST_CONNECT ? true : false;
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2021-05-28 17:20:02 -04:00
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}
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static esp_err_t esp_apptrace_riscv_flush_nolock(esp_apptrace_riscv_data_t *hw_data, uint32_t min_sz, esp_apptrace_tmo_t *tmo)
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{
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if (!ESP_APPTRACE_RISCV_INITED(hw_data)) {
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return ESP_ERR_INVALID_STATE;
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}
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return esp_apptrace_membufs_flush_nolock(&hw_data->membufs, min_sz, tmo);
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}
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static esp_err_t esp_apptrace_riscv_flush(esp_apptrace_riscv_data_t *hw_data, esp_apptrace_tmo_t *tmo)
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{
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if (!ESP_APPTRACE_RISCV_INITED(hw_data)) {
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return ESP_ERR_INVALID_STATE;
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}
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esp_err_t res = esp_apptrace_riscv_lock(hw_data, tmo);
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|
if (res != ESP_OK) {
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
|
|
|
res = esp_apptrace_membufs_flush_nolock(&hw_data->membufs, 0, tmo);
|
|
|
|
|
|
|
|
// now we can safely unlock apptrace to allow other tasks/ISRs to get other buffers and write their data
|
|
|
|
if (esp_apptrace_riscv_unlock(hw_data) != ESP_OK) {
|
|
|
|
assert(false && "Failed to unlock apptrace data!");
|
|
|
|
}
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*****************************************************************************************/
|
|
|
|
/************************** Membufs proto HW iface ***************************************/
|
|
|
|
/*****************************************************************************************/
|
|
|
|
|
|
|
|
static inline void esp_apptrace_riscv_buffer_swap_lock(void)
|
|
|
|
{
|
|
|
|
extern uint32_t __esp_apptrace_riscv_updated;
|
|
|
|
|
|
|
|
// indicate to host that we are about to update.
|
|
|
|
// this is used only to place CPU into streaming mode at tracing startup
|
|
|
|
// before starting streaming host can halt us after we read ESP_APPTRACE_RISCV_CTRL_REG and before we updated it
|
|
|
|
// HACK: in this case host will set breakpoint just after ESP_APPTRACE_RISCV_CTRL_REG update,
|
|
|
|
// here we set address to set bp at
|
|
|
|
// enter ERI update critical section
|
2022-07-21 07:24:42 -04:00
|
|
|
s_tracing_ctrl[esp_cpu_get_core_id()].stat = (uint32_t)&__esp_apptrace_riscv_updated;
|
2021-05-28 17:20:02 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
static __attribute__((noinline)) void esp_apptrace_riscv_buffer_swap_unlock(void)
|
|
|
|
{
|
|
|
|
// exit ERI update critical section
|
2022-07-21 07:24:42 -04:00
|
|
|
s_tracing_ctrl[esp_cpu_get_core_id()].stat = 0;
|
2021-05-28 17:20:02 -04:00
|
|
|
// TODO: currently host sets breakpoint, use break instruction to stop;
|
|
|
|
// it will allow to use ESP_APPTRACE_RISCV_STAT_REG for other purposes
|
|
|
|
asm volatile (
|
|
|
|
" .global __esp_apptrace_riscv_updated\n"
|
|
|
|
"__esp_apptrace_riscv_updated:\n"); // host will set bp here to resolve collision at streaming start
|
|
|
|
}
|
|
|
|
|
|
|
|
static esp_err_t esp_apptrace_riscv_buffer_swap_start(uint32_t curr_block_id)
|
|
|
|
{
|
|
|
|
esp_err_t res = ESP_OK;
|
|
|
|
|
|
|
|
esp_apptrace_riscv_buffer_swap_lock();
|
|
|
|
|
2022-07-21 07:24:42 -04:00
|
|
|
uint32_t ctrl_reg = s_tracing_ctrl[esp_cpu_get_core_id()].ctrl;
|
2021-05-28 17:20:02 -04:00
|
|
|
uint32_t host_connected = ESP_APPTRACE_RISCV_HOST_CONNECT & ctrl_reg;
|
|
|
|
if (host_connected) {
|
|
|
|
uint32_t acked_block = ESP_APPTRACE_RISCV_BLOCK_ID_GET(ctrl_reg);
|
|
|
|
uint32_t host_to_read = ESP_APPTRACE_RISCV_BLOCK_LEN_GET(ctrl_reg);
|
|
|
|
if (host_to_read != 0 || acked_block != (curr_block_id & ESP_APPTRACE_RISCV_BLOCK_ID_MSK)) {
|
2024-03-07 10:43:45 -05:00
|
|
|
ESP_APPTRACE_LOGD("[%d]: Can not switch %" PRIx32 " %" PRIu32 " %" PRIx32 " %" PRIx32 "/%" PRIx32, esp_cpu_get_core_id(), ctrl_reg, host_to_read, acked_block,
|
2021-05-28 17:20:02 -04:00
|
|
|
curr_block_id & ESP_APPTRACE_RISCV_BLOCK_ID_MSK, curr_block_id);
|
|
|
|
res = ESP_ERR_NO_MEM;
|
|
|
|
goto _on_err;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return ESP_OK;
|
|
|
|
_on_err:
|
|
|
|
esp_apptrace_riscv_buffer_swap_unlock();
|
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
|
|
|
static esp_err_t esp_apptrace_riscv_buffer_swap_end(uint32_t new_block_id, uint32_t prev_block_len)
|
|
|
|
{
|
2022-07-21 07:24:42 -04:00
|
|
|
uint32_t ctrl_reg = s_tracing_ctrl[esp_cpu_get_core_id()].ctrl;
|
2021-05-28 17:20:02 -04:00
|
|
|
uint32_t host_connected = ESP_APPTRACE_RISCV_HOST_CONNECT & ctrl_reg;
|
2022-07-21 07:24:42 -04:00
|
|
|
s_tracing_ctrl[esp_cpu_get_core_id()].ctrl = ESP_APPTRACE_RISCV_BLOCK_ID(new_block_id) |
|
2021-05-28 17:20:02 -04:00
|
|
|
host_connected | ESP_APPTRACE_RISCV_BLOCK_LEN(prev_block_len);
|
|
|
|
esp_apptrace_riscv_buffer_swap_unlock();
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static esp_err_t esp_apptrace_riscv_buffer_swap(uint32_t new_block_id)
|
|
|
|
{
|
|
|
|
/* do nothing */
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool esp_apptrace_riscv_host_data_pending(void)
|
|
|
|
{
|
2022-07-21 07:24:42 -04:00
|
|
|
uint32_t ctrl_reg = s_tracing_ctrl[esp_cpu_get_core_id()].ctrl;
|
2021-05-28 17:20:02 -04:00
|
|
|
// ESP_APPTRACE_LOGV("%s() 0x%x", __func__, ctrl_reg);
|
|
|
|
return (ctrl_reg & ESP_APPTRACE_RISCV_HOST_DATA) ? true : false;
|
|
|
|
}
|