2021-06-09 22:28:23 -04:00
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menu "ESP32H2-Specific"
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visible if IDF_TARGET_ESP32H2
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2021-06-09 22:22:35 -04:00
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2021-06-09 22:28:23 -04:00
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choice ESP32H2_DEFAULT_CPU_FREQ_MHZ
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prompt "CPU frequency"
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default ESP32H2_DEFAULT_CPU_FREQ_64 if IDF_ENV_FPGA
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default ESP32H2_DEFAULT_CPU_FREQ_96 if !IDF_ENV_FPGA
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help
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CPU frequency to be set on application startup.
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2021-06-09 22:28:23 -04:00
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config ESP32H2_DEFAULT_CPU_FREQ_16
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bool "16 MHz"
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2021-08-27 07:59:33 -04:00
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depends on IDF_ENV_FPGA #ESP32H2-TODO: IDF-3786
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config ESP32H2_DEFAULT_CPU_FREQ_32
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bool "32 MHz"
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depends on IDF_ENV_FPGA #ESP32H2-TODO: IDF-3786
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config ESP32H2_DEFAULT_CPU_FREQ_64
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bool "64 MHz"
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depends on IDF_ENV_FPGA #ESP32H2-TODO: IDF-3786
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config ESP32H2_DEFAULT_CPU_FREQ_96
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bool "96 MHz"
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depends on !IDF_ENV_FPGA
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endchoice
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2021-06-09 22:28:23 -04:00
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config ESP32H2_DEFAULT_CPU_FREQ_MHZ
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int
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default 16 if ESP32H2_DEFAULT_CPU_FREQ_16
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default 32 if ESP32H2_DEFAULT_CPU_FREQ_32
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default 64 if ESP32H2_DEFAULT_CPU_FREQ_64
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default 96 if ESP32H2_DEFAULT_CPU_FREQ_96
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choice ESP32H2_REV_MIN
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prompt "Minimum Supported ESP32-H2 Revision"
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default ESP32H2_REV_MIN_0
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help
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Minimum revision that ESP-IDF would support.
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Only supporting higher chip revisions can reduce binary size.
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config ESP32H2_REV_MIN_0
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bool "Rev 0"
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endchoice
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2021-06-09 22:28:23 -04:00
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config ESP32H2_REV_MIN
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int
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default 0 if ESP32H2_REV_MIN_0
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choice ESP32H2_TIME_SYSCALL
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prompt "Timers used for gettimeofday function"
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default ESP32H2_TIME_SYSCALL_USE_RTC_SYSTIMER
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help
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This setting defines which hardware timers are used to
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implement 'gettimeofday' and 'time' functions in C library.
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- If both high-resolution (systimer) and RTC timers are used, timekeeping will
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continue in deep sleep. Time will be reported at 1 microsecond
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resolution. This is the default, and the recommended option.
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- If only high-resolution timer (systimer) is used, gettimeofday will
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provide time at microsecond resolution.
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Time will not be preserved when going into deep sleep mode.
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- If only RTC timer is used, timekeeping will continue in
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deep sleep, but time will be measured at 6.(6) microsecond
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resolution. Also the gettimeofday function itself may take
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longer to run.
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- If no timers are used, gettimeofday and time functions
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return -1 and set errno to ENOSYS.
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- When RTC is used for timekeeping, two RTC_STORE registers are
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used to keep time in deep sleep mode.
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config ESP32H2_TIME_SYSCALL_USE_RTC_SYSTIMER
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bool "RTC and high-resolution timer"
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select ESP_TIME_FUNCS_USE_RTC_TIMER
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select ESP_TIME_FUNCS_USE_ESP_TIMER
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config ESP32H2_TIME_SYSCALL_USE_RTC
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bool "RTC"
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select ESP_TIME_FUNCS_USE_RTC_TIMER
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config ESP32H2_TIME_SYSCALL_USE_SYSTIMER
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bool "High-resolution timer"
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select ESP_TIME_FUNCS_USE_ESP_TIMER
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config ESP32H2_TIME_SYSCALL_USE_NONE
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bool "None"
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select ESP_TIME_FUNCS_USE_NONE
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endchoice
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2021-06-09 22:28:23 -04:00
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choice ESP32H2_RTC_CLK_SRC
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prompt "RTC clock source"
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default ESP32H2_RTC_CLK_SRC_INT_RC
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help
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Choose which clock is used as RTC clock source.
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config ESP32H2_RTC_CLK_SRC_INT_RC
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bool "Internal 150kHz RC oscillator"
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config ESP32H2_RTC_CLK_SRC_EXT_CRYS
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bool "External 32kHz crystal"
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select ESP_SYSTEM_RTC_EXT_XTAL
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config ESP32H2_RTC_CLK_SRC_EXT_OSC
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bool "External 32kHz oscillator at 32K_XP pin"
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2021-08-29 23:30:12 -04:00
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select ESP_SYSTEM_RTC_EXT_OSC
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config ESP32H2_RTC_CLK_SRC_INT_8MD256
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bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
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endchoice
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config ESP32H2_RTC_CLK_CAL_CYCLES
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int "Number of cycles for RTC_SLOW_CLK calibration"
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default 3000 if ESP32H2_RTC_CLK_SRC_EXT_CRYS || ESP32H2_RTC_CLK_SRC_EXT_OSC || ESP32H2_RTC_CLK_SRC_INT_8MD256
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default 576 if ESP32H2_RTC_CLK_SRC_INT_RC
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range 0 125000
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help
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When the startup code initializes RTC_SLOW_CLK, it can perform
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calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
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frequency. This option sets the number of RTC_SLOW_CLK cycles measured
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by the calibration routine. Higher numbers increase calibration
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precision, which may be important for applications which spend a lot of
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time in deep sleep. Lower numbers reduce startup time.
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When this option is set to 0, clock calibration will not be performed at
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startup, and approximate clock frequencies will be assumed:
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- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
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- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
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In case more value will help improve the definition of the launch of the crystal.
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If the crystal could not start, it will be switched to internal RC.
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2021-06-09 22:28:23 -04:00
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config ESP32H2_LIGHTSLEEP_GPIO_RESET_WORKAROUND
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bool "light sleep GPIO reset workaround"
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default y
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select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE
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help
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2021-06-09 22:28:23 -04:00
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ESP32H2 will reset at wake-up if GPIO is received a small electrostatic pulse during
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light sleep, with specific condition
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- GPIO needs to be configured as input-mode only
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- The pin receives a small electrostatic pulse, and reset occurs when the pulse
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voltage is higher than 6 V
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For GPIO set to input mode only, it is not a good practice to leave it open/floating,
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The hardware design needs to controlled it with determined supply or ground voltage
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is necessary.
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This option provides a software workaround for this issue. Configure to isolate all
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GPIO pins in sleep state.
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2021-06-09 22:28:23 -04:00
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endmenu # ESP32H2-Specific
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