2021-05-23 19:06:17 -04:00
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2018-04-24 04:11:02 -04:00
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#include <string.h>
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2018-07-17 07:10:33 -04:00
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#include <sys/param.h>
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2018-04-24 04:11:02 -04:00
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#include "unity.h"
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2018-04-11 02:56:00 -04:00
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#include "test_utils.h" // unity_send_signal
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#include "driver/uart.h" // for the uart driver access
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2018-04-24 04:11:02 -04:00
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#include "esp_log.h"
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2018-04-11 02:56:00 -04:00
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#include "esp_system.h" // for uint32_t esp_random()
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2020-11-19 04:03:10 -05:00
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#include "esp_rom_gpio.h"
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#include "soc/uart_periph.h"
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2020-08-20 00:22:36 -04:00
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2018-04-24 04:11:02 -04:00
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#define UART_TAG "Uart"
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#define UART_NUM1 (UART_NUM_1)
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#define BUF_SIZE (100)
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#define UART1_RX_PIN (22)
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#define UART1_TX_PIN (23)
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#define UART_BAUD_11520 (11520)
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#define UART_BAUD_115200 (115200)
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#define TOLERANCE (0.02) //baud rate error tolerance 2%.
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2020-11-19 04:03:10 -05:00
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#define UART1_CTS_PIN (13)
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2018-04-11 02:56:00 -04:00
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// RTS for RS485 Half-Duplex Mode manages DE/~RE
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#define UART1_RTS_PIN (18)
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// Number of packets to be send during test
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#define PACKETS_NUMBER (10)
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// Wait timeout for uart driver
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#define PACKET_READ_TICS (1000 / portTICK_RATE_MS)
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2020-11-19 04:03:10 -05:00
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#define TEST_DEFAULT_CLK UART_SCLK_APB
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static void uart_config(uint32_t baud_rate, uart_sclk_t source_clk)
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2018-04-24 04:11:02 -04:00
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{
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uart_config_t uart_config = {
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.baud_rate = baud_rate,
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2020-11-19 04:03:10 -05:00
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.source_clk = source_clk,
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2018-04-24 04:11:02 -04:00
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.data_bits = UART_DATA_8_BITS,
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.parity = UART_PARITY_DISABLE,
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.stop_bits = UART_STOP_BITS_1,
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.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
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};
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2020-11-19 04:03:10 -05:00
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2019-04-17 08:19:44 -04:00
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uart_driver_install(UART_NUM1, BUF_SIZE * 2, BUF_SIZE * 2, 20, NULL, 0);
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2018-04-24 04:11:02 -04:00
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uart_param_config(UART_NUM1, &uart_config);
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2019-11-27 08:32:52 -05:00
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TEST_ESP_OK(uart_set_loop_back(UART_NUM1, true));
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2018-04-24 04:11:02 -04:00
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}
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2019-06-04 00:17:55 -04:00
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static volatile bool exit_flag;
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static void test_task(void *pvParameters)
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{
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xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
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char* data = (char *) malloc(256);
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while (exit_flag == false) {
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uart_tx_chars(UART_NUM1, data, 256);
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// The uart_wait_tx_done() function does not block anything if ticks_to_wait = 0.
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uart_wait_tx_done(UART_NUM1, 0);
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}
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free(data);
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xSemaphoreGive(*sema);
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vTaskDelete(NULL);
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}
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static void test_task2(void *pvParameters)
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{
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while (exit_flag == false) {
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// This task obstruct a setting tx_done_sem semaphore in the UART interrupt.
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// It leads to waiting the ticks_to_wait time in uart_wait_tx_done() function.
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2019-04-17 08:19:44 -04:00
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uart_disable_tx_intr(UART_NUM1);
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2019-06-04 00:17:55 -04:00
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}
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vTaskDelete(NULL);
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}
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TEST_CASE("test uart_wait_tx_done is not blocked when ticks_to_wait=0", "[uart]")
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{
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2020-11-19 04:03:10 -05:00
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uart_config(UART_BAUD_11520, TEST_DEFAULT_CLK);
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2019-06-04 00:17:55 -04:00
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xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
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exit_flag = false;
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xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
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xTaskCreate(test_task2, "tsk2", 2048, NULL, 5, NULL);
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printf("Waiting for 5 sec\n");
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vTaskDelay(5000 / portTICK_PERIOD_MS);
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exit_flag = true;
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if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
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vSemaphoreDelete(exit_sema);
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} else {
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TEST_FAIL_MESSAGE("uart_wait_tx_done is blocked");
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}
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TEST_ESP_OK(uart_driver_delete(UART_NUM1));
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}
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2019-04-15 09:07:38 -04:00
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TEST_CASE("test uart get baud-rate", "[uart]")
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2018-04-24 04:11:02 -04:00
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{
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2020-11-19 04:03:10 -05:00
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#if SOC_UART_SUPPORT_REF_TICK
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2018-04-24 04:11:02 -04:00
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uint32_t baud_rate1 = 0;
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printf("init uart%d, use reftick, baud rate : %d\n", (int)UART_NUM1, (int)UART_BAUD_11520);
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2020-11-19 04:03:10 -05:00
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uart_config(UART_BAUD_11520, UART_SCLK_REF_TICK);
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2018-04-24 04:11:02 -04:00
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uart_get_baudrate(UART_NUM1, &baud_rate1);
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2020-11-19 04:03:10 -05:00
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printf("get baud rate when use reftick: %d\n", (int)baud_rate1);
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TEST_ASSERT_UINT32_WITHIN(UART_BAUD_11520 * TOLERANCE, UART_BAUD_11520, baud_rate1);
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#endif
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uint32_t baud_rate2 = 0;
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2018-04-24 04:11:02 -04:00
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printf("init uart%d, unuse reftick, baud rate : %d\n", (int)UART_NUM1, (int)UART_BAUD_115200);
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2020-11-19 04:03:10 -05:00
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uart_config(UART_BAUD_115200, TEST_DEFAULT_CLK);
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2018-04-24 04:11:02 -04:00
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uart_get_baudrate(UART_NUM1, &baud_rate2);
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printf("get baud rate when don't use reftick: %d\n", (int)baud_rate2);
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2019-12-11 22:32:38 -05:00
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TEST_ASSERT_UINT32_WITHIN(UART_BAUD_115200 * TOLERANCE, UART_BAUD_115200, baud_rate2);
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2020-11-19 04:03:10 -05:00
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uart_driver_delete(UART_NUM1);
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2018-04-24 04:11:02 -04:00
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ESP_LOGI(UART_TAG, "get baud-rate test passed ....\n");
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2018-04-11 02:56:00 -04:00
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}
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2019-04-15 09:07:38 -04:00
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TEST_CASE("test uart tx data with break", "[uart]")
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2018-07-19 09:41:35 -04:00
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{
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const int buf_len = 200;
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const int send_len = 128;
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const int brk_len = 10;
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char *psend = (char *)malloc(buf_len);
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2019-12-11 22:32:38 -05:00
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TEST_ASSERT_NOT_NULL(psend);
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2018-07-19 09:41:35 -04:00
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memset(psend, '0', buf_len);
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2020-11-19 04:03:10 -05:00
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uart_config(UART_BAUD_115200, TEST_DEFAULT_CLK);
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2018-07-19 09:41:35 -04:00
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printf("Uart%d send %d bytes with break\n", UART_NUM1, send_len);
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uart_write_bytes_with_break(UART_NUM1, (const char *)psend, send_len, brk_len);
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uart_wait_tx_done(UART_NUM1, (portTickType)portMAX_DELAY);
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//If the code is running here, it means the test passed, otherwise it will crash due to the interrupt wdt timeout.
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printf("Send data with break test passed\n");
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free(psend);
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2019-04-15 09:07:38 -04:00
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uart_driver_delete(UART_NUM1);
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2018-07-19 09:41:35 -04:00
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}
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2019-11-27 08:32:52 -05:00
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static void uart_word_len_set_get_test(int uart_num)
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{
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printf("uart word len set and get test\n");
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uart_word_length_t word_length_set = 0;
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uart_word_length_t word_length_get = 0;
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for (int i = 0; i < UART_DATA_BITS_MAX; i++) {
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word_length_set = UART_DATA_5_BITS + i;
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TEST_ESP_OK(uart_set_word_length(uart_num, word_length_set));
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TEST_ESP_OK(uart_get_word_length(uart_num, &word_length_get));
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2019-12-11 22:32:38 -05:00
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TEST_ASSERT_EQUAL(word_length_set, word_length_get);
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2019-11-27 08:32:52 -05:00
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}
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}
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static void uart_stop_bit_set_get_test(int uart_num)
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{
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printf("uart stop bit set and get test\n");
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uart_stop_bits_t stop_bit_set = 0;
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uart_stop_bits_t stop_bit_get = 0;
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for (int i = UART_STOP_BITS_1; i < UART_STOP_BITS_MAX; i++) {
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stop_bit_set = i;
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TEST_ESP_OK(uart_set_stop_bits(uart_num, stop_bit_set));
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TEST_ESP_OK(uart_get_stop_bits(uart_num, &stop_bit_get));
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2019-12-11 22:32:38 -05:00
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TEST_ASSERT_EQUAL(stop_bit_set, stop_bit_get);
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2019-11-27 08:32:52 -05:00
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}
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}
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static void uart_parity_set_get_test(int uart_num)
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{
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printf("uart parity set and get test\n");
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uart_parity_t parity_set[3] = {
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UART_PARITY_DISABLE,
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UART_PARITY_EVEN,
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UART_PARITY_ODD,
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};
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uart_parity_t parity_get = 0;
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for (int i = 0; i < 3; i++) {
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TEST_ESP_OK(uart_set_parity(uart_num, parity_set[i]));
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TEST_ESP_OK(uart_get_parity(uart_num, &parity_get));
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2019-12-11 22:32:38 -05:00
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TEST_ASSERT_EQUAL(parity_set[i], parity_get);
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2019-11-27 08:32:52 -05:00
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}
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}
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static void uart_hw_flow_set_get_test(int uart_num)
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{
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printf("uart hw flow control set and get test\n");
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2019-12-11 22:32:38 -05:00
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uart_hw_flowcontrol_t flowcontrol_set = 0;
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uart_hw_flowcontrol_t flowcontrol_get = 0;
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2019-11-27 08:32:52 -05:00
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for (int i = 0; i < UART_HW_FLOWCTRL_DISABLE; i++) {
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2019-12-11 22:32:38 -05:00
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TEST_ESP_OK(uart_set_hw_flow_ctrl(uart_num, flowcontrol_set, 20));
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TEST_ESP_OK(uart_get_hw_flow_ctrl(uart_num, &flowcontrol_get));
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TEST_ASSERT_EQUAL(flowcontrol_set, flowcontrol_get);
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2019-11-27 08:32:52 -05:00
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}
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}
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static void uart_wakeup_set_get_test(int uart_num)
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{
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printf("uart wake up set and get test\n");
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int wake_up_set = 0;
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int wake_up_get = 0;
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for (int i = 3; i < 0x3ff; i++) {
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wake_up_set = i;
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TEST_ESP_OK(uart_set_wakeup_threshold(uart_num, wake_up_set));
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TEST_ESP_OK(uart_get_wakeup_threshold(uart_num, &wake_up_get));
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2019-12-11 22:32:38 -05:00
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TEST_ASSERT_EQUAL(wake_up_set, wake_up_get);
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2019-11-27 08:32:52 -05:00
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}
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}
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TEST_CASE("uart general API test", "[uart]")
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{
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const int uart_num = UART_NUM1;
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uart_config_t uart_config = {
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.baud_rate = 115200,
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.data_bits = UART_DATA_8_BITS,
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.parity = UART_PARITY_DISABLE,
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.stop_bits = UART_STOP_BITS_1,
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.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
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2020-11-19 04:03:10 -05:00
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.source_clk = TEST_DEFAULT_CLK,
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2019-11-27 08:32:52 -05:00
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};
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uart_param_config(uart_num, &uart_config);
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uart_word_len_set_get_test(uart_num);
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uart_stop_bit_set_get_test(uart_num);
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uart_parity_set_get_test(uart_num);
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uart_hw_flow_set_get_test(uart_num);
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uart_wakeup_set_get_test(uart_num);
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}
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static void uart_write_task(void *param)
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{
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int uart_num = (int)param;
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uint8_t *tx_buf = (uint8_t *)malloc(1024);
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if(tx_buf == NULL) {
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2019-12-11 22:32:38 -05:00
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TEST_FAIL_MESSAGE("tx buffer malloc fail");
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2019-11-27 08:32:52 -05:00
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}
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for(int i = 1; i < 1023; i++) {
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tx_buf[i] = (i & 0xff);
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}
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for(int i = 0; i < 1024; i++) {
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//d[0] and d[1023] are header
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tx_buf[0] = (i & 0xff);
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tx_buf[1023] = ((~i) & 0xff);
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uart_write_bytes(uart_num, (const char*)tx_buf, 1024);
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uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
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}
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free(tx_buf);
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vTaskDelete(NULL);
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}
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2020-11-19 04:03:10 -05:00
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/**
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* The following tests use loop back
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*
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* NOTE: In the following tests, because the internal loopback is enabled, the CTS signal is connected to
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* the RTS signal internally. However, On ESP32S3, they are not, and the CTS keeps the default level (which
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* is a high level). So the workaround is to map the CTS in_signal to a GPIO pin (here IO13 is used) and connect
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* the RTS output_signal to this IO.
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*/
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2019-12-11 22:32:38 -05:00
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TEST_CASE("uart read write test", "[uart]")
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2019-11-27 08:32:52 -05:00
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{
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const int uart_num = UART_NUM1;
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uint8_t *rd_data = (uint8_t *)malloc(1024);
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if(rd_data == NULL) {
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2019-12-11 22:32:38 -05:00
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TEST_FAIL_MESSAGE("rx buffer malloc fail");
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2019-11-27 08:32:52 -05:00
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}
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uart_config_t uart_config = {
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.baud_rate = 2000000,
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.data_bits = UART_DATA_8_BITS,
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.parity = UART_PARITY_DISABLE,
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.stop_bits = UART_STOP_BITS_1,
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2020-09-25 06:34:27 -04:00
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.flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
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2020-11-19 04:03:10 -05:00
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.source_clk = TEST_DEFAULT_CLK,
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2020-09-25 06:34:27 -04:00
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.rx_flow_ctrl_thresh = 120
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2019-11-27 08:32:52 -05:00
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};
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TEST_ESP_OK(uart_driver_install(uart_num, BUF_SIZE * 2, 0, 20, NULL, 0));
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TEST_ESP_OK(uart_param_config(uart_num, &uart_config));
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TEST_ESP_OK(uart_set_loop_back(uart_num, true));
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2020-11-19 04:03:10 -05:00
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TEST_ESP_OK(uart_set_pin(uart_num, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART1_CTS_PIN));
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//Connect the RTS out_signal to the CTS pin (which is mapped to CTS in_signal)
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esp_rom_gpio_connect_out_signal(UART1_CTS_PIN, uart_periph_signal[uart_num].rts_sig, 0, 0);
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2019-12-12 01:20:39 -05:00
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TEST_ESP_OK(uart_wait_tx_done(uart_num, portMAX_DELAY));
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vTaskDelay(1 / portTICK_PERIOD_MS); // make sure last byte has flushed from TX FIFO
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TEST_ESP_OK(uart_flush_input(uart_num));
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2020-07-08 02:48:18 -04:00
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xTaskCreate(uart_write_task, "uart_write_task", 2048 * 4, (void *)uart_num, UNITY_FREERTOS_PRIORITY - 1, NULL);
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2019-11-27 08:32:52 -05:00
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for (int i = 0; i < 1024; i++) {
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2020-09-25 06:34:27 -04:00
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int bytes_remaining = 1024;
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2019-11-27 08:32:52 -05:00
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memset(rd_data, 0, 1024);
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2020-09-25 06:34:27 -04:00
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while (bytes_remaining) {
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int bytes_received = uart_read_bytes(uart_num, rd_data + 1024 - bytes_remaining, bytes_remaining, (TickType_t)1000);
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if (bytes_received < 0) {
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2019-12-11 22:32:38 -05:00
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TEST_FAIL_MESSAGE("read timeout, uart read write test fail");
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2019-11-27 08:32:52 -05:00
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}
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2020-09-25 06:34:27 -04:00
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bytes_remaining -= bytes_received;
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}
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int check_fail_cnt = 0;
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if (rd_data[0] != (i & 0xff)) {
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printf("packet %d index check error at offset 0, expected 0x%02x\n", i, i);
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++check_fail_cnt;
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}
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if (rd_data[1023] != ((~i) & 0xff)) {
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printf("packet %d index check error at offset 1023, expected 0x%02x\n", i, ((~i) & 0xff));
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++check_fail_cnt;
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2019-11-27 08:32:52 -05:00
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|
|
}
|
|
|
|
for (int j = 1; j < 1023; j++) {
|
2020-09-25 06:34:27 -04:00
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|
|
if (rd_data[j] != (j & 0xff)) {
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|
|
printf("data mismatch in packet %d offset %d, expected 0x%02x got 0x%02x\n", i, j, (j & 0xff), rd_data[j]);
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|
|
++check_fail_cnt;
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|
|
|
}
|
|
|
|
if (check_fail_cnt > 10) {
|
|
|
|
printf("(further checks skipped)\n");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (check_fail_cnt > 0) {
|
|
|
|
ESP_LOG_BUFFER_HEX("rd_data", rd_data, 1024);
|
|
|
|
TEST_FAIL();
|
2019-11-27 08:32:52 -05:00
|
|
|
}
|
|
|
|
}
|
|
|
|
uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
|
|
|
|
uart_driver_delete(uart_num);
|
|
|
|
free(rd_data);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_CASE("uart tx with ringbuffer test", "[uart]")
|
|
|
|
{
|
|
|
|
const int uart_num = UART_NUM1;
|
|
|
|
uint8_t *rd_data = (uint8_t *)malloc(1024);
|
|
|
|
uint8_t *wr_data = (uint8_t *)malloc(1024);
|
|
|
|
if(rd_data == NULL || wr_data == NULL) {
|
2019-12-11 22:32:38 -05:00
|
|
|
TEST_FAIL_MESSAGE("buffer malloc fail");
|
2019-11-27 08:32:52 -05:00
|
|
|
}
|
|
|
|
uart_config_t uart_config = {
|
|
|
|
.baud_rate = 2000000,
|
|
|
|
.data_bits = UART_DATA_8_BITS,
|
|
|
|
.parity = UART_PARITY_DISABLE,
|
|
|
|
.stop_bits = UART_STOP_BITS_1,
|
2020-06-11 23:31:34 -04:00
|
|
|
.flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
|
|
|
|
.rx_flow_ctrl_thresh = 120,
|
2020-11-19 04:03:10 -05:00
|
|
|
.source_clk = TEST_DEFAULT_CLK,
|
2019-11-27 08:32:52 -05:00
|
|
|
};
|
2020-06-04 08:57:50 -04:00
|
|
|
uart_wait_tx_idle_polling(uart_num);
|
2019-11-27 08:32:52 -05:00
|
|
|
TEST_ESP_OK(uart_param_config(uart_num, &uart_config));
|
|
|
|
TEST_ESP_OK(uart_driver_install(uart_num, 1024 * 2, 1024 *2, 20, NULL, 0));
|
|
|
|
TEST_ESP_OK(uart_set_loop_back(uart_num, true));
|
2020-11-19 04:03:10 -05:00
|
|
|
TEST_ESP_OK(uart_set_pin(uart_num, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART1_CTS_PIN));
|
|
|
|
//Connect the RTS out_signal to the CTS pin (which is mapped to CTS in_signal)
|
|
|
|
esp_rom_gpio_connect_out_signal(UART1_CTS_PIN, uart_periph_signal[uart_num].rts_sig, 0, 0);
|
|
|
|
|
2019-11-27 08:32:52 -05:00
|
|
|
for (int i = 0; i < 1024; i++) {
|
|
|
|
wr_data[i] = i;
|
|
|
|
rd_data[i] = 0;
|
|
|
|
}
|
|
|
|
uart_write_bytes(uart_num, (const char*)wr_data, 1024);
|
|
|
|
uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
|
|
|
|
uart_read_bytes(uart_num, rd_data, 1024, (TickType_t)1000);
|
2019-12-11 22:32:38 -05:00
|
|
|
TEST_ASSERT_EQUAL_HEX8_ARRAY(wr_data, rd_data, 1024);
|
2019-11-27 08:32:52 -05:00
|
|
|
TEST_ESP_OK(uart_driver_delete(uart_num));
|
|
|
|
free(rd_data);
|
|
|
|
free(wr_data);
|
|
|
|
}
|