2020-10-20 10:53:40 -04:00
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// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
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2018-07-04 19:01:03 -04:00
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _DRIVER_I2C_H_
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#define _DRIVER_I2C_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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2019-06-04 23:32:20 -04:00
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2018-07-04 19:01:03 -04:00
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#include <esp_types.h>
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#include "esp_err.h"
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#include "esp_intr_alloc.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/semphr.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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#include "freertos/ringbuf.h"
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#include "driver/gpio.h"
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2020-09-09 22:37:58 -04:00
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#include "soc/soc_caps.h"
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2019-06-04 23:32:20 -04:00
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#include "hal/i2c_types.h"
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2018-07-04 19:01:03 -04:00
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#define I2C_APB_CLK_FREQ APB_CLK_FREQ /*!< I2C source clock is APB clock, 80MHz */
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2019-06-04 23:32:20 -04:00
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#define I2C_NUM_0 (0) /*!< I2C port 0 */
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#define I2C_NUM_1 (1) /*!< I2C port 1 */
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#define I2C_NUM_MAX (SOC_I2C_NUM) /*!< I2C port max */
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2018-07-04 19:01:03 -04:00
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2020-02-12 11:01:14 -05:00
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typedef void *i2c_cmd_handle_t; /*!< I2C command handle */
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2018-07-04 19:01:03 -04:00
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/**
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* @brief I2C driver install
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*
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* @param i2c_num I2C port number
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* @param mode I2C mode( master or slave )
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* @param slv_rx_buf_len receiving buffer size for slave mode
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* @note
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* Only slave mode will use this value, driver will ignore this value in master mode.
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* @param slv_tx_buf_len sending buffer size for slave mode
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* @note
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* Only slave mode will use this value, driver will ignore this value in master mode.
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* @note
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* In master mode, if the cache is likely to be disabled(such as write flash) and the slave is time-sensitive,
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* `ESP_INTR_FLAG_IRAM` is suggested to be used. In this case, please use the memory allocated from internal RAM in i2c read and write function,
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* because we can not access the psram(if psram is enabled) in interrupt handle function when cache is disabled.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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* - ESP_FAIL Driver install error
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*/
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esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_buf_len, size_t slv_tx_buf_len, int intr_alloc_flags);
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/**
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* @brief I2C driver delete
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*
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* @param i2c_num I2C port number
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_driver_delete(i2c_port_t i2c_num);
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/**
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* @brief I2C parameter initialization
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*
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* @param i2c_num I2C port number
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* @param i2c_conf pointer to I2C parameter settings
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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2020-02-12 11:01:14 -05:00
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esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf);
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2018-07-04 19:01:03 -04:00
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/**
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* @brief reset I2C tx hardware fifo
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*
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* @param i2c_num I2C port number
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_reset_tx_fifo(i2c_port_t i2c_num);
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/**
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* @brief reset I2C rx fifo
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*
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* @param i2c_num I2C port number
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_reset_rx_fifo(i2c_port_t i2c_num);
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/**
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* @brief I2C isr handler register
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*
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* @param i2c_num I2C port number
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* @param fn isr handler function
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* @param arg parameter for isr handler function
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* @param intr_alloc_flags Flags used to allocate the interrupt. One or multiple (ORred)
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* ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
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* @param handle handle return from esp_intr_alloc.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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2020-02-12 11:01:14 -05:00
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esp_err_t i2c_isr_register(i2c_port_t i2c_num, void (*fn)(void *), void *arg, int intr_alloc_flags, intr_handle_t *handle);
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2018-07-04 19:01:03 -04:00
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/**
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* @brief to delete and free I2C isr.
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*
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* @param handle handle of isr.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_isr_free(intr_handle_t handle);
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/**
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* @brief Configure GPIO signal for I2C sck and sda
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*
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* @param i2c_num I2C port number
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* @param sda_io_num GPIO number for I2C sda signal
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* @param scl_io_num GPIO number for I2C scl signal
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* @param sda_pullup_en Whether to enable the internal pullup for sda pin
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* @param scl_pullup_en Whether to enable the internal pullup for scl pin
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* @param mode I2C mode
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_set_pin(i2c_port_t i2c_num, int sda_io_num, int scl_io_num,
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2019-06-04 23:32:20 -04:00
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bool sda_pullup_en, bool scl_pullup_en, i2c_mode_t mode);
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2018-07-04 19:01:03 -04:00
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/**
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* @brief Create and init I2C command link
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* @note
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* Before we build I2C command link, we need to call i2c_cmd_link_create() to create
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* a command link.
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* After we finish sending the commands, we need to call i2c_cmd_link_delete() to
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* release and return the resources.
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*
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* @return i2c command link handler
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*/
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2019-07-16 05:33:30 -04:00
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i2c_cmd_handle_t i2c_cmd_link_create(void);
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2018-07-04 19:01:03 -04:00
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/**
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* @brief Free I2C command link
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* @note
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* Before we build I2C command link, we need to call i2c_cmd_link_create() to create
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* a command link.
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* After we finish sending the commands, we need to call i2c_cmd_link_delete() to
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* release and return the resources.
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*
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* @param cmd_handle I2C command handle
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*/
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void i2c_cmd_link_delete(i2c_cmd_handle_t cmd_handle);
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/**
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* @brief Queue command for I2C master to generate a start signal
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_master_start(i2c_cmd_handle_t cmd_handle);
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/**
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* @brief Queue command for I2C master to write one byte to I2C bus
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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* @param data I2C one byte command to write to bus
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* @param ack_en enable ack check for master
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_master_write_byte(i2c_cmd_handle_t cmd_handle, uint8_t data, bool ack_en);
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/**
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* @brief Queue command for I2C master to write buffer to I2C bus
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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* @param data data to send
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* @note
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* If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM.
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* @param data_len data length
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* @param ack_en enable ack check for master
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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2020-05-17 14:16:43 -04:00
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esp_err_t i2c_master_write(i2c_cmd_handle_t cmd_handle, const uint8_t *data, size_t data_len, bool ack_en);
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2018-07-04 19:01:03 -04:00
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/**
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* @brief Queue command for I2C master to read one byte from I2C bus
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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* @param data pointer accept the data byte
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* @note
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* If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM.
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* @param ack ack value for read command
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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2020-02-12 11:01:14 -05:00
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esp_err_t i2c_master_read_byte(i2c_cmd_handle_t cmd_handle, uint8_t *data, i2c_ack_type_t ack);
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2018-07-04 19:01:03 -04:00
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/**
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* @brief Queue command for I2C master to read data from I2C bus
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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* @param data data buffer to accept the data from bus
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* @note
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* If the psram is enabled and intr_flag is `ESP_INTR_FLAG_IRAM`, please use the memory allocated from internal RAM.
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* @param data_len read data length
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* @param ack ack value for read command
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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2020-02-12 11:01:14 -05:00
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esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t data_len, i2c_ack_type_t ack);
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2018-07-04 19:01:03 -04:00
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/**
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* @brief Queue command for I2C master to generate a stop signal
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* @note
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* Only call this function in I2C master mode
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* Call i2c_master_cmd_begin() to send all queued commands
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*
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* @param cmd_handle I2C cmd link
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_master_stop(i2c_cmd_handle_t cmd_handle);
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/**
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* @brief I2C master send queued commands.
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* This function will trigger sending all queued commands.
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* The task will be blocked until all the commands have been sent out.
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* The I2C APIs are not thread-safe, if you want to use one I2C port in different tasks,
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* you need to take care of the multi-thread issue.
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* @note
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* Only call this function in I2C master mode
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*
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* @param i2c_num I2C port number
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* @param cmd_handle I2C command handler
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* @param ticks_to_wait maximum wait ticks.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
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* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
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* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
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*/
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esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, TickType_t ticks_to_wait);
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/**
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* @brief I2C slave write data to internal ringbuffer, when tx fifo empty, isr will fill the hardware
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* fifo from the internal ringbuffer
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* @note
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* Only call this function in I2C slave mode
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*
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* @param i2c_num I2C port number
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* @param data data pointer to write into internal buffer
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* @param size data size
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* @param ticks_to_wait Maximum waiting ticks
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*
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* @return
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* - ESP_FAIL(-1) Parameter error
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* - Others(>=0) The number of data bytes that pushed to the I2C slave buffer.
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*/
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2020-02-12 11:01:14 -05:00
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int i2c_slave_write_buffer(i2c_port_t i2c_num, const uint8_t *data, int size, TickType_t ticks_to_wait);
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2018-07-04 19:01:03 -04:00
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/**
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* @brief I2C slave read data from internal buffer. When I2C slave receive data, isr will copy received data
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* from hardware rx fifo to internal ringbuffer. Then users can read from internal ringbuffer.
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* @note
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* Only call this function in I2C slave mode
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*
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* @param i2c_num I2C port number
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2019-04-06 15:30:10 -04:00
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* @param data data pointer to accept data from internal buffer
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2018-07-04 19:01:03 -04:00
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* @param max_size Maximum data size to read
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* @param ticks_to_wait Maximum waiting ticks
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*
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* @return
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* - ESP_FAIL(-1) Parameter error
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* - Others(>=0) The number of data bytes that read from I2C slave buffer.
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*/
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2020-02-12 11:01:14 -05:00
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int i2c_slave_read_buffer(i2c_port_t i2c_num, uint8_t *data, size_t max_size, TickType_t ticks_to_wait);
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2018-07-04 19:01:03 -04:00
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/**
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* @brief set I2C master clock period
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*
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* @param i2c_num I2C port number
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* @param high_period clock cycle number during SCL is high level, high_period is a 14 bit value
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* @param low_period clock cycle number during SCL is low level, low_period is a 14 bit value
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
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esp_err_t i2c_set_period(i2c_port_t i2c_num, int high_period, int low_period);
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/**
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* @brief get I2C master clock period
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*
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* @param i2c_num I2C port number
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* @param high_period pointer to get clock cycle number during SCL is high level, will get a 14 bit value
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* @param low_period pointer to get clock cycle number during SCL is low level, will get a 14 bit value
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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*/
|
2020-02-12 11:01:14 -05:00
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esp_err_t i2c_get_period(i2c_port_t i2c_num, int *high_period, int *low_period);
|
2018-07-04 19:01:03 -04:00
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|
2018-11-15 07:21:49 -05:00
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/**
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* @brief enable hardware filter on I2C bus
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* Sometimes the I2C bus is disturbed by high frequency noise(about 20ns), or the rising edge of
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* the SCL clock is very slow, these may cause the master state machine broken. enable hardware
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* filter can filter out high frequency interference and make the master more stable.
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* @note
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* Enable filter will slow the SCL clock.
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*
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* @param i2c_num I2C port number
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* @param cyc_num the APB cycles need to be filtered(0<= cyc_num <=7).
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* When the period of a pulse is less than cyc_num * APB_cycle, the I2C controller will ignore this pulse.
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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|
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|
*/
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esp_err_t i2c_filter_enable(i2c_port_t i2c_num, uint8_t cyc_num);
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/**
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|
* @brief disable filter on I2C bus
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*
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|
* @param i2c_num I2C port number
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*
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|
* @return
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|
* - ESP_OK Success
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|
* - ESP_ERR_INVALID_ARG Parameter error
|
|
|
|
*/
|
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|
esp_err_t i2c_filter_disable(i2c_port_t i2c_num);
|
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|
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|
2018-07-04 19:01:03 -04:00
|
|
|
/**
|
|
|
|
* @brief set I2C master start signal timing
|
|
|
|
*
|
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|
|
* @param i2c_num I2C port number
|
|
|
|
* @param setup_time clock number between the falling-edge of SDA and rising-edge of SCL for start mark, it's a 10-bit value.
|
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|
|
* @param hold_time clock num between the falling-edge of SDA and falling-edge of SCL for start mark, it's a 10-bit value.
|
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|
|
*
|
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|
|
* @return
|
|
|
|
* - ESP_OK Success
|
|
|
|
* - ESP_ERR_INVALID_ARG Parameter error
|
|
|
|
*/
|
|
|
|
esp_err_t i2c_set_start_timing(i2c_port_t i2c_num, int setup_time, int hold_time);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief get I2C master start signal timing
|
|
|
|
*
|
|
|
|
* @param i2c_num I2C port number
|
|
|
|
* @param setup_time pointer to get setup time
|
|
|
|
* @param hold_time pointer to get hold time
|
|
|
|
*
|
|
|
|
* @return
|
|
|
|
* - ESP_OK Success
|
|
|
|
* - ESP_ERR_INVALID_ARG Parameter error
|
|
|
|
*/
|
2020-02-12 11:01:14 -05:00
|
|
|
esp_err_t i2c_get_start_timing(i2c_port_t i2c_num, int *setup_time, int *hold_time);
|
2018-07-04 19:01:03 -04:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief set I2C master stop signal timing
|
|
|
|
*
|
|
|
|
* @param i2c_num I2C port number
|
|
|
|
* @param setup_time clock num between the rising-edge of SCL and the rising-edge of SDA, it's a 10-bit value.
|
|
|
|
* @param hold_time clock number after the STOP bit's rising-edge, it's a 14-bit value.
|
|
|
|
*
|
|
|
|
* @return
|
|
|
|
* - ESP_OK Success
|
|
|
|
* - ESP_ERR_INVALID_ARG Parameter error
|
|
|
|
*/
|
|
|
|
esp_err_t i2c_set_stop_timing(i2c_port_t i2c_num, int setup_time, int hold_time);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief get I2C master stop signal timing
|
|
|
|
*
|
|
|
|
* @param i2c_num I2C port number
|
|
|
|
* @param setup_time pointer to get setup time.
|
|
|
|
* @param hold_time pointer to get hold time.
|
|
|
|
*
|
|
|
|
* @return
|
|
|
|
* - ESP_OK Success
|
|
|
|
* - ESP_ERR_INVALID_ARG Parameter error
|
|
|
|
*/
|
2020-02-12 11:01:14 -05:00
|
|
|
esp_err_t i2c_get_stop_timing(i2c_port_t i2c_num, int *setup_time, int *hold_time);
|
2018-07-04 19:01:03 -04:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief set I2C data signal timing
|
|
|
|
*
|
|
|
|
* @param i2c_num I2C port number
|
|
|
|
* @param sample_time clock number I2C used to sample data on SDA after the rising-edge of SCL, it's a 10-bit value
|
|
|
|
* @param hold_time clock number I2C used to hold the data after the falling-edge of SCL, it's a 10-bit value
|
|
|
|
*
|
|
|
|
* @return
|
|
|
|
* - ESP_OK Success
|
|
|
|
* - ESP_ERR_INVALID_ARG Parameter error
|
|
|
|
*/
|
|
|
|
esp_err_t i2c_set_data_timing(i2c_port_t i2c_num, int sample_time, int hold_time);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief get I2C data signal timing
|
|
|
|
*
|
|
|
|
* @param i2c_num I2C port number
|
|
|
|
* @param sample_time pointer to get sample time
|
|
|
|
* @param hold_time pointer to get hold time
|
|
|
|
*
|
|
|
|
* @return
|
|
|
|
* - ESP_OK Success
|
|
|
|
* - ESP_ERR_INVALID_ARG Parameter error
|
|
|
|
*/
|
2020-02-12 11:01:14 -05:00
|
|
|
esp_err_t i2c_get_data_timing(i2c_port_t i2c_num, int *sample_time, int *hold_time);
|
2018-07-04 19:01:03 -04:00
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief set I2C timeout value
|
|
|
|
* @param i2c_num I2C port number
|
|
|
|
* @param timeout timeout value for I2C bus (unit: APB 80Mhz clock cycle)
|
|
|
|
* @return
|
|
|
|
* - ESP_OK Success
|
|
|
|
* - ESP_ERR_INVALID_ARG Parameter error
|
|
|
|
*/
|
|
|
|
esp_err_t i2c_set_timeout(i2c_port_t i2c_num, int timeout);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief get I2C timeout value
|
|
|
|
* @param i2c_num I2C port number
|
|
|
|
* @param timeout pointer to get timeout value
|
|
|
|
* @return
|
|
|
|
* - ESP_OK Success
|
|
|
|
* - ESP_ERR_INVALID_ARG Parameter error
|
|
|
|
*/
|
2020-02-12 11:01:14 -05:00
|
|
|
esp_err_t i2c_get_timeout(i2c_port_t i2c_num, int *timeout);
|
2019-06-04 23:32:20 -04:00
|
|
|
|
2018-07-04 19:01:03 -04:00
|
|
|
/**
|
|
|
|
* @brief set I2C data transfer mode
|
|
|
|
*
|
|
|
|
* @param i2c_num I2C port number
|
|
|
|
* @param tx_trans_mode I2C sending data mode
|
|
|
|
* @param rx_trans_mode I2C receving data mode
|
|
|
|
*
|
|
|
|
* @return
|
|
|
|
* - ESP_OK Success
|
|
|
|
* - ESP_ERR_INVALID_ARG Parameter error
|
|
|
|
*/
|
|
|
|
esp_err_t i2c_set_data_mode(i2c_port_t i2c_num, i2c_trans_mode_t tx_trans_mode, i2c_trans_mode_t rx_trans_mode);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* @brief get I2C data transfer mode
|
|
|
|
*
|
|
|
|
* @param i2c_num I2C port number
|
|
|
|
* @param tx_trans_mode pointer to get I2C sending data mode
|
|
|
|
* @param rx_trans_mode pointer to get I2C receiving data mode
|
|
|
|
*
|
|
|
|
* @return
|
|
|
|
* - ESP_OK Success
|
|
|
|
* - ESP_ERR_INVALID_ARG Parameter error
|
|
|
|
*/
|
|
|
|
esp_err_t i2c_get_data_mode(i2c_port_t i2c_num, i2c_trans_mode_t *tx_trans_mode, i2c_trans_mode_t *rx_trans_mode);
|
|
|
|
|
|
|
|
#ifdef __cplusplus
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif /*_DRIVER_I2C_H_*/
|