2021-08-05 10:30:10 -04:00
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2021-02-26 02:16:08 -05:00
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#pragma once
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#include <stdbool.h>
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#include <stdint.h>
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#include "sdkconfig.h"
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#include "esp_bit_defs.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Chip models
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*/
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typedef enum {
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CHIP_ESP32 = 1, //!< ESP32
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CHIP_ESP32S2 = 2, //!< ESP32-S2
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2021-09-13 09:16:45 -04:00
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CHIP_ESP32S3 = 9, //!< ESP32-S3
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2021-02-26 02:16:08 -05:00
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CHIP_ESP32C3 = 5, //!< ESP32-C3
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2021-06-10 03:22:43 -04:00
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CHIP_ESP32H2 = 6, //!< ESP32-H2
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2021-11-06 05:23:21 -04:00
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CHIP_ESP8684 = 12, //!< ESP-8684
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2021-02-26 02:16:08 -05:00
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} esp_chip_model_t;
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/* Chip feature flags, used in esp_chip_info_t */
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#define CHIP_FEATURE_EMB_FLASH BIT(0) //!< Chip has embedded flash memory
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#define CHIP_FEATURE_WIFI_BGN BIT(1) //!< Chip has 2.4GHz WiFi
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#define CHIP_FEATURE_BLE BIT(4) //!< Chip has Bluetooth LE
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#define CHIP_FEATURE_BT BIT(5) //!< Chip has Bluetooth Classic
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2021-06-10 03:22:43 -04:00
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#define CHIP_FEATURE_IEEE802154 BIT(6) //!< Chip has IEEE 802.15.4
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2021-11-09 23:50:12 -05:00
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#define CHIP_FEATURE_EMB_PSRAM BIT(7) //!< Chip has embedded psram
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2021-02-26 02:16:08 -05:00
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/**
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* @brief The structure represents information about the chip
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*/
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typedef struct {
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esp_chip_model_t model; //!< chip model, one of esp_chip_model_t
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uint32_t features; //!< bit mask of CHIP_FEATURE_x feature flags
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uint8_t cores; //!< number of CPU cores
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uint8_t revision; //!< chip revision number
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} esp_chip_info_t;
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/**
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* @brief Fill an esp_chip_info_t structure with information about the chip
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* @param[out] out_info structure to be filled
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*/
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void esp_chip_info(esp_chip_info_t* out_info);
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#if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX
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/**
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* @brief Cache lock bug exists or not
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*
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* @return
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* - ture : bug exists
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* - false : bug not exists
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*/
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bool soc_has_cache_lock_bug(void);
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#endif
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#ifdef __cplusplus
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}
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#endif
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