2021-09-26 23:32:29 -04:00
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/*
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2023-09-11 00:58:38 -04:00
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* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
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2021-09-26 23:32:29 -04:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2021-02-26 00:58:04 -05:00
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#include "hal/lcd_hal.h"
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#include "hal/lcd_ll.h"
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2022-05-30 04:09:40 -04:00
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#include "hal/log.h"
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2021-02-26 00:58:04 -05:00
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void lcd_hal_init(lcd_hal_context_t *hal, int id)
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{
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hal->dev = LCD_LL_GET_HW(id);
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}
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2022-05-30 04:09:40 -04:00
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2023-11-13 04:50:29 -05:00
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uint32_t lcd_hal_cal_pclk_freq(lcd_hal_context_t *hal, uint32_t src_freq_hz, uint32_t expect_pclk_freq_hz, int lcd_clk_flags, hal_utils_clk_div_t* lcd_clk_div)
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2022-05-30 04:09:40 -04:00
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{
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// lcd_clk = module_clock_src / (n + b / a)
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// pixel_clk = lcd_clk / mo
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uint32_t mo = src_freq_hz / expect_pclk_freq_hz / LCD_LL_CLK_FRAC_DIV_N_MAX + 1;
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2022-07-15 06:07:52 -04:00
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if (mo == 1 && !(lcd_clk_flags & LCD_HAL_PCLK_FLAG_ALLOW_EQUAL_SYSCLK)) {
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mo = 2;
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}
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2023-09-11 00:58:38 -04:00
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hal_utils_clk_info_t lcd_clk_info = {
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.src_freq_hz = src_freq_hz,
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.exp_freq_hz = expect_pclk_freq_hz * mo,
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.max_integ = LCD_LL_CLK_FRAC_DIV_N_MAX,
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.min_integ = 2,
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.max_fract = LCD_LL_CLK_FRAC_DIV_AB_MAX,
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};
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2023-11-13 04:50:29 -05:00
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uint32_t real_freq = hal_utils_calc_clk_div_frac_fast(&lcd_clk_info, lcd_clk_div);
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HAL_EARLY_LOGD("lcd_hal", "n=%"PRIu32",a=%"PRIu32",b=%"PRIu32",mo=%"PRIu32, lcd_clk_div->integer, lcd_clk_div->denominator, lcd_clk_div->numerator, mo);
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2022-05-30 04:09:40 -04:00
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lcd_ll_set_pixel_clock_prescale(hal->dev, mo);
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2023-09-11 00:58:38 -04:00
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return real_freq / mo;
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2022-05-30 04:09:40 -04:00
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}
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