2021-08-05 10:30:10 -04:00
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/*
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2023-08-22 10:45:34 -04:00
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* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
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2021-08-05 10:30:10 -04:00
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2020-11-23 02:35:09 -05:00
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2022-12-01 07:48:27 -05:00
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#include <stdbool.h>
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2021-08-18 07:45:51 -04:00
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#include "soc/soc_caps.h"
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2021-12-02 07:24:19 -05:00
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#include "esp_err.h"
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2020-11-23 02:35:09 -05:00
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief This function is used to enable the digital RC_FAST clock,
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* to support the peripherals.
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*
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* @note If this function is called a number of times, the `periph_rtc_dig_clk8m_disable`
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* function needs to be called same times to disable.
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*
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2022-12-01 07:48:27 -05:00
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* @return true: success for enable the RC_FAST clock, false: RC_FAST clock enable failed
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2020-11-23 02:35:09 -05:00
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*/
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bool periph_rtc_dig_clk8m_enable(void);
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/**
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* @brief This function is used to disable the digital RC_FAST clock, which should be called
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* with the `periph_rtc_dig_clk8m_enable` pairedly
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*
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* @note If this function is called a number of times, the `periph_rtc_dig_clk8m_disable`
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* function needs to be called same times to disable.
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*/
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void periph_rtc_dig_clk8m_disable(void);
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/**
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* @brief This function is used to get the real clock frequency value of RC_FAST clock
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*
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* @return The real clock value, in Hz
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*/
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uint32_t periph_rtc_dig_clk8m_get_freq(void);
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2021-12-02 07:24:19 -05:00
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#if SOC_CLK_APLL_SUPPORTED
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/**
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* @brief Enable APLL power if it has not enabled
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*/
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void periph_rtc_apll_acquire(void);
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/**
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* @brief Shut down APLL power if no peripherals using APLL
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*/
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void periph_rtc_apll_release(void);
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/**
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* @brief Calculate and set APLL coefficients by given frequency
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* @note Have to call 'periph_rtc_apll_acquire' to enable APLL power before setting frequency
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* @note This calculation is based on the inequality:
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2023-09-05 22:55:47 -04:00
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* xtal_freq * (4 + sdm2 + sdm1/256 + sdm0/65536) >= CLK_LL_APLL_MULTIPLIER_MIN_HZ(350 MHz)
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* It will always calculate the minimum coefficients that can satisfy the inequality above, instead of loop them one by one.
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* which means more appropriate coefficients are likely to exist.
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* But this algorithm can meet almost all the cases and the accuracy can be guaranteed as well.
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* @note The APLL frequency is only allowed to set when there is only one peripheral refer to it.
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* If APLL is already set by another peripheral, this function will return `ESP_ERR_INVALID_STATE`
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* and output the current frequency by parameter `real_freq`.
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*
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* @param expt_freq Expected APLL frequency (unit: Hz)
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* @param real_freq APLL real working frequency [output] (unit: Hz)
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* @return
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* - ESP_OK: APLL frequency set success
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* - ESP_ERR_INVALID_ARG: The input expt_freq is out of APLL support range
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* - ESP_ERR_INVALID_STATE: APLL is refered by more than one peripherals, not allowed to change its frequency now
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*/
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esp_err_t periph_rtc_apll_freq_set(uint32_t expt_freq, uint32_t *real_freq);
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#endif // SOC_CLK_APLL_SUPPORTED
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2023-08-22 10:45:34 -04:00
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#if SOC_CLK_MPLL_SUPPORTED
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/**
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* @brief Enable MPLL power if it has not enabled (early version)
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*/
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void periph_rtc_mpll_early_acquire(void);
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/**
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* @brief Enable MPLL power if it has not enabled
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*/
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esp_err_t periph_rtc_mpll_acquire(void);
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/**
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* @brief Shut down MPLL power if no peripherals using APLL
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*/
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void periph_rtc_mpll_release(void);
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/**
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* @brief Configure MPLL frequency
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* @note Have to call 'periph_rtc_mpll_acquire' to enable MPLL power before setting frequency
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* @note The MPLL frequency is only allowed to set when there is only one peripheral refer to it.
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* If MPLL is already set by another peripheral, this function will return `ESP_ERR_INVALID_STATE`
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* and output the current frequency by parameter `real_freq`.
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*
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* @param expt_freq Expected MPLL frequency (unit: Hz)
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* @param real_freq MPLL current working frequency [output] (unit: Hz)
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* @return
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* - ESP_OK: MPLL frequency set success
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* - ESP_ERR_INVALID_STATE: MPLL is referred by more than one peripherals, not allowed to change its frequency now
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*/
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esp_err_t periph_rtc_mpll_freq_set(uint32_t expt_freq, uint32_t *real_freq);
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#endif // SOC_CLK_MPLL_SUPPORTED
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2020-11-23 02:35:09 -05:00
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#ifdef __cplusplus
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}
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#endif
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