2022-01-21 04:13:48 -05:00
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include "ulp_riscv_register_ops.h"
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/**
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* @brief Wakeup main CPU from sleep or deep sleep.
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*
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* This raises a software interrupt signal, if the
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* main CPU is configured the ULP as a wakeup source
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* calling this function will make the main CPU to
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* exit from sleep or deep sleep.
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*/
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void ulp_riscv_wakeup_main_processor(void);
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/**
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* @brief Rescues the cpu from monitor mode
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*
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* This function cancels the low power mode
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* of the ULP-RISC-V, should be called
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* every time the co-processor starts.
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*
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* @note by convenience this function is
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* automatically called in startup code.
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*/
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void ulp_riscv_rescue_from_monitor(void);
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/**
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* @brief Finishes the ULP program and powers down the ULP
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* until next wakeup.
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*
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* @note This function does not return. After called it will
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* fully reset the ULP.
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*
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* @note Returning from main() in the ULP program results on
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* calling this function.
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*
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* @note To stop the ULP from waking up, call ulp_riscv_timer_stop()
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* before halting.
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*
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* This function should be called after the ULP program Finishes
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* its processing, it will trigger the timer for the next wakeup,
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* put the ULP in monitor mode and triggers a reset.
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*
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*/
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void __attribute__((noreturn)) ulp_riscv_halt(void);
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#define ulp_riscv_shutdown ulp_riscv_halt
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/**
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* @brief Stop the ULP timer
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*
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* @note This will stop the ULP from waking up if halted, but will not abort any program
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* currently executing on the ULP.
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*/
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void ulp_riscv_timer_stop(void);
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/**
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* @brief Resumes the ULP timer
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*
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* @note This will resume an already configured timer, but does no other configuration
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*
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*/
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void ulp_riscv_timer_resume(void);
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#define ULP_RISCV_GET_CCOUNT() ({ int __ccount; \
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asm volatile("rdcycle %0;" : "=r"(__ccount)); \
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__ccount; })
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#if CONFIG_IDF_TARGET_ESP32S2
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/* These are only approximate default numbers, the default frequency
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of the 8M oscillator is 8.5MHz +/- 5%, at the default DCAP setting
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*/
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#define ULP_RISCV_CYCLES_PER_US 8.5
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#elif CONFIG_IDF_TARGET_ESP32S3
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#define ULP_RISCV_CYCLES_PER_US 17.5
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#endif
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#define ULP_RISCV_CYCLES_PER_MS ULP_RISCV_CYCLES_PER_US*1000
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/**
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* @brief Makes the co-processor busy wait for a certain number of cycles
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*
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* @param cycles Number of cycles to busy wait
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*/
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void ulp_riscv_delay_cycles(uint32_t cycles);
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2022-02-27 23:05:48 -05:00
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/**
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* @brief Clears the GPIO wakeup interrupt bit
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*
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*/
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void ulp_riscv_gpio_wakeup_clear(void);
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2022-01-21 04:13:48 -05:00
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#ifdef __cplusplus
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}
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#endif
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