2016-09-05 20:38:12 -04:00
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/**
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* \brief AES block cipher, ESP32 hardware accelerated version
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* Based on mbedTLS FIPS-197 compliant version.
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2016-08-05 05:40:32 -04:00
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*
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* Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
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2016-09-02 04:36:26 -04:00
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* Additions Copyright (C) 2016, Espressif Systems (Shanghai) PTE Ltd
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2016-08-05 05:40:32 -04:00
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
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/*
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* The AES block cipher was designed by Vincent Rijmen and Joan Daemen.
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*
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* http://csrc.nist.gov/encryption/aes/rijndael/Rijndael.pdf
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* http://csrc.nist.gov/publications/fips/fips197/fips-197.pdf
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*/
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#include <string.h>
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#include "hwcrypto/aes.h"
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#include "rom/aes.h"
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#include "soc/dport_reg.h"
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#include <sys/lock.h>
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static _lock_t aes_lock;
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void esp_aes_acquire_hardware( void )
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{
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/* newlib locks lazy initialize on ESP-IDF */
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_lock_acquire(&aes_lock);
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/* Enable AES hardware */
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DPORT_REG_SET_BIT(DPORT_PERI_CLK_EN_REG, DPORT_PERI_EN_AES);
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/* Clear reset on digital signature & secure boot units,
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otherwise AES unit is held in reset also. */
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DPORT_REG_CLR_BIT(DPORT_PERI_RST_EN_REG,
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DPORT_PERI_EN_AES
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| DPORT_PERI_EN_DIGITAL_SIGNATURE
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| DPORT_PERI_EN_SECUREBOOT);
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}
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void esp_aes_release_hardware( void )
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{
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/* Disable AES hardware */
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DPORT_REG_SET_BIT(DPORT_PERI_RST_EN_REG, DPORT_PERI_EN_AES);
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/* Don't return other units to reset, as this pulls
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reset on RSA & SHA units, respectively. */
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DPORT_REG_CLR_BIT(DPORT_PERI_CLK_EN_REG, DPORT_PERI_EN_AES);
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_lock_release(&aes_lock);
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}
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void esp_aes_init( esp_aes_context *ctx )
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{
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bzero( ctx, sizeof( esp_aes_context ) );
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}
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void esp_aes_free( esp_aes_context *ctx )
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{
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if ( ctx == NULL ) {
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return;
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}
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bzero( ctx, sizeof( esp_aes_context ) );
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}
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/* Translate number of bits to an AES_BITS enum */
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static int keybits_to_aesbits(unsigned int keybits)
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{
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switch (keybits) {
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case 128:
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return AES128;
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case 192:
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return AES192;
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break;
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case 256:
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return AES256;
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default:
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return ( ERR_ESP_AES_INVALID_KEY_LENGTH );
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}
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}
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2016-09-02 04:36:26 -04:00
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/*
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* AES key schedule (encryption)
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*
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*/
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int esp_aes_setkey_enc( esp_aes_context *ctx, const unsigned char *key,
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unsigned int keybits )
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{
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uint16_t keybytes = keybits / 8;
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int aesbits = keybits_to_aesbits(keybits);
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if (aesbits < 0) {
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return aesbits;
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}
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ctx->enc.aesbits = aesbits;
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bzero(ctx->enc.key, sizeof(ctx->enc.key));
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memcpy(ctx->enc.key, key, keybytes);
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return 0;
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}
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/*
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* AES key schedule (decryption)
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*
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*/
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int esp_aes_setkey_dec( esp_aes_context *ctx, const unsigned char *key,
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unsigned int keybits )
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{
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uint16_t keybytes = keybits / 8;
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int aesbits = keybits_to_aesbits(keybits);
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if (aesbits < 0) {
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return aesbits;
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}
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ctx->dec.aesbits = aesbits;
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bzero(ctx->dec.key, sizeof(ctx->dec.key));
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memcpy(ctx->dec.key, key, keybytes);
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return 0;
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}
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2016-09-02 04:36:26 -04:00
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/*
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* Helper function to copy key from esp_aes_context buffer
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* to hardware key registers.
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*
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* Only call when protected by esp_aes_acquire_hardware().
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*/
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static inline int esp_aes_setkey_hardware( esp_aes_context *ctx, int mode)
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{
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if ( mode == ESP_AES_ENCRYPT ) {
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ets_aes_setkey_enc(ctx->enc.key, ctx->enc.aesbits);
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} else {
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ets_aes_setkey_dec(ctx->dec.key, ctx->dec.aesbits);
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}
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return 0;
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2016-08-08 01:56:36 -04:00
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}
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2016-08-05 05:40:32 -04:00
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/*
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* AES-ECB block encryption
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*/
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void esp_aes_encrypt( esp_aes_context *ctx,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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esp_aes_acquire_hardware();
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esp_aes_setkey_hardware(ctx, ESP_AES_ENCRYPT);
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ets_aes_crypt(input, output);
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esp_aes_release_hardware();
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}
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/*
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* AES-ECB block decryption
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*/
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void esp_aes_decrypt( esp_aes_context *ctx,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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esp_aes_acquire_hardware();
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esp_aes_setkey_hardware(ctx, ESP_AES_DECRYPT);
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ets_aes_crypt(input, output);
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esp_aes_release_hardware();
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}
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/*
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* AES-ECB block encryption/decryption
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*/
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int esp_aes_crypt_ecb( esp_aes_context *ctx,
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int mode,
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const unsigned char input[16],
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unsigned char output[16] )
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{
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2016-09-02 04:36:26 -04:00
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esp_aes_acquire_hardware();
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esp_aes_setkey_hardware(ctx, mode);
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ets_aes_crypt(input, output);
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esp_aes_release_hardware();
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return 0;
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}
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/*
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* AES-CBC buffer encryption/decryption
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*/
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int esp_aes_crypt_cbc( esp_aes_context *ctx,
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int mode,
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size_t length,
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unsigned char iv[16],
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const unsigned char *input,
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unsigned char *output )
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{
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int i;
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unsigned char temp[16];
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if ( length % 16 ) {
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return ( ERR_ESP_AES_INVALID_INPUT_LENGTH );
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}
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2016-09-02 04:36:26 -04:00
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esp_aes_acquire_hardware();
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esp_aes_setkey_hardware(ctx, mode);
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2016-09-05 20:38:12 -04:00
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if ( mode == ESP_AES_DECRYPT ) {
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while ( length > 0 ) {
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memcpy( temp, input, 16 );
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ets_aes_crypt(input, output);
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for ( i = 0; i < 16; i++ ) {
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output[i] = (unsigned char)( output[i] ^ iv[i] );
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}
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memcpy( iv, temp, 16 );
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input += 16;
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output += 16;
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length -= 16;
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}
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} else {
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while ( length > 0 ) {
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for ( i = 0; i < 16; i++ ) {
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output[i] = (unsigned char)( input[i] ^ iv[i] );
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}
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ets_aes_crypt(output, output);
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memcpy( iv, output, 16 );
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input += 16;
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output += 16;
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length -= 16;
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}
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}
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2016-08-08 01:56:36 -04:00
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2016-09-02 04:36:26 -04:00
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esp_aes_release_hardware();
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2016-09-01 23:31:38 -04:00
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return 0;
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}
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/*
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* AES-CFB128 buffer encryption/decryption
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*/
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int esp_aes_crypt_cfb128( esp_aes_context *ctx,
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int mode,
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size_t length,
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size_t *iv_off,
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unsigned char iv[16],
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const unsigned char *input,
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unsigned char *output )
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{
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int c;
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size_t n = *iv_off;
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2016-09-02 04:36:26 -04:00
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esp_aes_acquire_hardware();
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2016-09-08 03:06:27 -04:00
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esp_aes_setkey_hardware(ctx, ESP_AES_ENCRYPT);
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2016-09-02 04:36:26 -04:00
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2016-09-05 20:38:12 -04:00
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if ( mode == ESP_AES_DECRYPT ) {
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2016-09-01 23:31:38 -04:00
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while ( length-- ) {
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if ( n == 0 ) {
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2016-09-07 00:48:20 -04:00
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ets_aes_crypt(iv, iv );
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}
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c = *input++;
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*output++ = (unsigned char)( c ^ iv[n] );
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iv[n] = (unsigned char) c;
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n = ( n + 1 ) & 0x0F;
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}
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} else {
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while ( length-- ) {
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if ( n == 0 ) {
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ets_aes_crypt(iv, iv );
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}
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iv[n] = *output++ = (unsigned char)( iv[n] ^ *input++ );
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n = ( n + 1 ) & 0x0F;
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}
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}
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*iv_off = n;
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|
|
2016-09-02 04:36:26 -04:00
|
|
|
esp_aes_release_hardware();
|
|
|
|
|
2016-09-01 23:31:38 -04:00
|
|
|
return 0;
|
2016-08-05 05:40:32 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* AES-CFB8 buffer encryption/decryption
|
|
|
|
*/
|
2016-09-05 20:38:12 -04:00
|
|
|
int esp_aes_crypt_cfb8( esp_aes_context *ctx,
|
2016-09-01 23:31:38 -04:00
|
|
|
int mode,
|
|
|
|
size_t length,
|
|
|
|
unsigned char iv[16],
|
|
|
|
const unsigned char *input,
|
|
|
|
unsigned char *output )
|
2016-08-05 05:40:32 -04:00
|
|
|
{
|
2016-09-01 23:31:38 -04:00
|
|
|
unsigned char c;
|
|
|
|
unsigned char ov[17];
|
|
|
|
|
2016-09-02 04:36:26 -04:00
|
|
|
esp_aes_acquire_hardware();
|
2016-09-08 03:06:27 -04:00
|
|
|
esp_aes_setkey_hardware(ctx, ESP_AES_ENCRYPT);
|
2016-09-02 04:36:26 -04:00
|
|
|
|
2016-09-01 23:31:38 -04:00
|
|
|
while ( length-- ) {
|
|
|
|
memcpy( ov, iv, 16 );
|
2016-09-07 00:48:20 -04:00
|
|
|
ets_aes_crypt(iv, iv);
|
2016-09-01 23:31:38 -04:00
|
|
|
|
2016-09-05 20:38:12 -04:00
|
|
|
if ( mode == ESP_AES_DECRYPT ) {
|
2016-09-01 23:31:38 -04:00
|
|
|
ov[16] = *input;
|
|
|
|
}
|
|
|
|
|
|
|
|
c = *output++ = (unsigned char)( iv[0] ^ *input++ );
|
|
|
|
|
2016-09-05 20:38:12 -04:00
|
|
|
if ( mode == ESP_AES_ENCRYPT ) {
|
2016-09-01 23:31:38 -04:00
|
|
|
ov[16] = c;
|
|
|
|
}
|
|
|
|
|
|
|
|
memcpy( iv, ov + 1, 16 );
|
|
|
|
}
|
|
|
|
|
2016-09-02 04:36:26 -04:00
|
|
|
esp_aes_release_hardware();
|
|
|
|
|
2016-09-01 23:31:38 -04:00
|
|
|
return 0;
|
2016-08-05 05:40:32 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* AES-CTR buffer encryption/decryption
|
|
|
|
*/
|
2016-09-05 20:38:12 -04:00
|
|
|
int esp_aes_crypt_ctr( esp_aes_context *ctx,
|
2016-08-05 05:40:32 -04:00
|
|
|
size_t length,
|
|
|
|
size_t *nc_off,
|
|
|
|
unsigned char nonce_counter[16],
|
|
|
|
unsigned char stream_block[16],
|
|
|
|
const unsigned char *input,
|
|
|
|
unsigned char *output )
|
2016-09-01 23:31:38 -04:00
|
|
|
{
|
|
|
|
int c, i;
|
2016-08-05 05:40:32 -04:00
|
|
|
size_t n = *nc_off;
|
|
|
|
|
2016-09-02 04:36:26 -04:00
|
|
|
esp_aes_acquire_hardware();
|
2016-09-07 00:48:20 -04:00
|
|
|
esp_aes_setkey_hardware(ctx, ESP_AES_ENCRYPT);
|
2016-09-02 04:36:26 -04:00
|
|
|
|
2016-09-01 23:31:38 -04:00
|
|
|
while ( length-- ) {
|
|
|
|
if ( n == 0 ) {
|
2016-09-07 00:48:20 -04:00
|
|
|
ets_aes_crypt(nonce_counter, stream_block);
|
2016-08-05 05:40:32 -04:00
|
|
|
|
2016-09-01 23:31:38 -04:00
|
|
|
for ( i = 16; i > 0; i-- )
|
|
|
|
if ( ++nonce_counter[i - 1] != 0 ) {
|
2016-08-05 05:40:32 -04:00
|
|
|
break;
|
2016-09-01 23:31:38 -04:00
|
|
|
}
|
2016-08-05 05:40:32 -04:00
|
|
|
}
|
|
|
|
c = *input++;
|
|
|
|
*output++ = (unsigned char)( c ^ stream_block[n] );
|
|
|
|
|
|
|
|
n = ( n + 1 ) & 0x0F;
|
|
|
|
}
|
|
|
|
|
|
|
|
*nc_off = n;
|
2016-08-08 01:56:36 -04:00
|
|
|
|
2016-09-02 04:36:26 -04:00
|
|
|
esp_aes_release_hardware();
|
|
|
|
|
2016-09-01 23:31:38 -04:00
|
|
|
return 0;
|
2016-08-05 05:40:32 -04:00
|
|
|
}
|