esp-idf/components/soc/esp32s3/include/soc/gpio_caps.h

/*
 * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#pragma once

#ifdef __cplusplus
extern "C" {
#endif

// ESP32-S3 has 1 GPIO peripheral
#define SOC_GPIO_PORT           (1U)
#define SOC_GPIO_PIN_COUNT      (49)

// On ESP32-S3, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.
#define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1)
// Force hold is a new function of ESP32-S3
#define SOC_GPIO_SUPPORT_FORCE_HOLD      (1)

// 0~48 except from 22~25 are valid
#define SOC_GPIO_VALID_GPIO_MASK         (0x1FFFFFFFFFFFFULL & ~(0ULL | BIT22 | BIT23 | BIT24 | BIT25))
// No GPIO is input only
#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK  (SOC_GPIO_VALID_GPIO_MASK)

// Support to configure slept status
#define SOC_GPIO_SUPPORT_SLP_SWITCH  (1)

#ifdef __cplusplus
}
#endif
build-system: include soc_caps defines into kconfig Adds gen_soc_caps_kconfig.py which parses the soc caps (soc_caps.h) into a format that can be included in kconfig. 2021-11-05 05:23:24 -04:00			`/*`
			`* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD`
			`*`
			`* SPDX-License-Identifier: Apache-2.0`
			`*/`
soc: add soc descriptions for esp32s3 2020-06-18 05:13:19 -04:00
			`#pragma once`

			`#ifdef __cplusplus`
			`extern "C" {`
			`#endif`

			`// ESP32-S3 has 1 GPIO peripheral`
build-system: include soc_caps defines into kconfig Adds gen_soc_caps_kconfig.py which parses the soc caps (soc_caps.h) into a format that can be included in kconfig. 2021-11-05 05:23:24 -04:00			`#define SOC_GPIO_PORT (1U)`
gpio:support gpio in/out/interrupt for esp32s3(728) Add support of gpio for esp32s3(728). Adjust some pins and comments in test_gpio.c. Add support for gpio functions for gpio19 and gpio20. Update S3 programming guide Peripheral API: gpio and sigmadelta. Add unit test for input and output function of S3 USB pins(GPIO19 and GPIO20) and C3 USB pins(GPIO18 and GPIO19). Adjust input only test in test_spi_master.c. 2021-06-09 05:18:39 -04:00			`#define SOC_GPIO_PIN_COUNT (49)`
soc: add soc descriptions for esp32s3 2020-06-18 05:13:19 -04:00
			`// On ESP32-S3, Digital IOs have their own registers to control pullup/down/capability, independent with RTC registers.`
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day. 2020-09-09 22:37:58 -04:00			`#define SOC_GPIO_SUPPORT_RTC_INDEPENDENT (1)`
soc: add soc descriptions for esp32s3 2020-06-18 05:13:19 -04:00			`// Force hold is a new function of ESP32-S3`
soc: combine xxx_caps.h into one soc_caps.h During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day. 2020-09-09 22:37:58 -04:00			`#define SOC_GPIO_SUPPORT_FORCE_HOLD (1)`
soc: add soc descriptions for esp32s3 2020-06-18 05:13:19 -04:00
gpio:support gpio in/out/interrupt for esp32s3(728) Add support of gpio for esp32s3(728). Adjust some pins and comments in test_gpio.c. Add support for gpio functions for gpio19 and gpio20. Update S3 programming guide Peripheral API: gpio and sigmadelta. Add unit test for input and output function of S3 USB pins(GPIO19 and GPIO20) and C3 USB pins(GPIO18 and GPIO19). Adjust input only test in test_spi_master.c. 2021-06-09 05:18:39 -04:00			`// 0~48 except from 22~25 are valid`
			`#define SOC_GPIO_VALID_GPIO_MASK (0x1FFFFFFFFFFFFULL & ~(0ULL \| BIT22 \| BIT23 \| BIT24 \| BIT25))`
			`// No GPIO is input only`
			`#define SOC_GPIO_VALID_OUTPUT_GPIO_MASK (SOC_GPIO_VALID_GPIO_MASK)`
soc: add soc descriptions for esp32s3 2020-06-18 05:13:19 -04:00
light sleep: add gpio configure workaround at slept status for esp32s3 2021-04-09 04:37:30 -04:00			`// Support to configure slept status`
			`#define SOC_GPIO_SUPPORT_SLP_SWITCH (1)`
soc: placeholder for esp32s3 HAL driver soc rtc 2020-07-31 06:26:07 -04:00
soc: add soc descriptions for esp32s3 2020-06-18 05:13:19 -04:00			`#ifdef __cplusplus`
			`}`
			`#endif`