2016-12-24 07:45:57 -05:00
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/* GPIO Example
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This example code is in the Public Domain (or CC0 licensed, at your option.)
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Unless required by applicable law or agreed to in writing, this
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software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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CONDITIONS OF ANY KIND, either express or implied.
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*/
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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2022-08-04 01:08:48 -04:00
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#include <inttypes.h>
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2016-12-24 07:45:57 -05:00
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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#include "driver/gpio.h"
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/**
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* Brief:
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* This test code shows how to configure gpio and how to use gpio interrupt.
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*
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* GPIO status:
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* GPIO18: output (ESP32C2/ESP32H4 uses GPIO8 as the second output pin)
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* GPIO19: output (ESP32C2/ESP32H4 uses GPIO9 as the second output pin)
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2016-12-24 07:45:57 -05:00
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* GPIO4: input, pulled up, interrupt from rising edge and falling edge
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* GPIO5: input, pulled up, interrupt from rising edge.
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*
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* Note. These are the default GPIO pins to be used in the example. You can
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* change IO pins in menuconfig.
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*
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2016-12-24 07:45:57 -05:00
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* Test:
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* Connect GPIO18(8) with GPIO4
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* Connect GPIO19(9) with GPIO5
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* Generate pulses on GPIO18(8)/19(9), that triggers interrupt on GPIO4/5
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*
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*/
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2021-10-26 23:56:56 -04:00
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#define GPIO_OUTPUT_IO_0 CONFIG_GPIO_OUTPUT_0
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#define GPIO_OUTPUT_IO_1 CONFIG_GPIO_OUTPUT_1
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#define GPIO_OUTPUT_PIN_SEL ((1ULL<<GPIO_OUTPUT_IO_0) | (1ULL<<GPIO_OUTPUT_IO_1))
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#define GPIO_INPUT_IO_0 CONFIG_GPIO_INPUT_0
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#define GPIO_INPUT_IO_1 CONFIG_GPIO_INPUT_1
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#define GPIO_INPUT_PIN_SEL ((1ULL<<GPIO_INPUT_IO_0) | (1ULL<<GPIO_INPUT_IO_1))
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#define ESP_INTR_FLAG_DEFAULT 0
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2022-02-08 04:39:38 -05:00
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static QueueHandle_t gpio_evt_queue = NULL;
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2016-12-24 07:45:57 -05:00
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2017-03-22 00:36:11 -04:00
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static void IRAM_ATTR gpio_isr_handler(void* arg)
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2016-12-24 07:45:57 -05:00
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{
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uint32_t gpio_num = (uint32_t) arg;
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xQueueSendFromISR(gpio_evt_queue, &gpio_num, NULL);
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}
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2017-03-22 00:36:11 -04:00
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static void gpio_task_example(void* arg)
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{
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uint32_t io_num;
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for(;;) {
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if(xQueueReceive(gpio_evt_queue, &io_num, portMAX_DELAY)) {
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printf("GPIO[%"PRIu32"] intr, val: %d\n", io_num, gpio_get_level(io_num));
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}
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}
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}
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2019-07-16 05:33:30 -04:00
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void app_main(void)
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{
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2021-08-30 10:59:36 -04:00
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//zero-initialize the config structure.
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gpio_config_t io_conf = {};
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//disable interrupt
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io_conf.intr_type = GPIO_INTR_DISABLE;
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//set as output mode
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io_conf.mode = GPIO_MODE_OUTPUT;
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//bit mask of the pins that you want to set,e.g.GPIO18/19
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io_conf.pin_bit_mask = GPIO_OUTPUT_PIN_SEL;
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//disable pull-down mode
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io_conf.pull_down_en = 0;
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//disable pull-up mode
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io_conf.pull_up_en = 0;
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//configure GPIO with the given settings
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gpio_config(&io_conf);
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//interrupt of rising edge
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io_conf.intr_type = GPIO_INTR_POSEDGE;
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//bit mask of the pins, use GPIO4/5 here
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io_conf.pin_bit_mask = GPIO_INPUT_PIN_SEL;
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//set as input mode
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io_conf.mode = GPIO_MODE_INPUT;
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//enable pull-up mode
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io_conf.pull_up_en = 1;
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gpio_config(&io_conf);
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2021-11-03 01:19:56 -04:00
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//change gpio interrupt type for one pin
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gpio_set_intr_type(GPIO_INPUT_IO_0, GPIO_INTR_ANYEDGE);
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//create a queue to handle gpio event from isr
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gpio_evt_queue = xQueueCreate(10, sizeof(uint32_t));
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//start gpio task
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xTaskCreate(gpio_task_example, "gpio_task_example", 2048, NULL, 10, NULL);
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//install gpio isr service
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gpio_install_isr_service(ESP_INTR_FLAG_DEFAULT);
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//hook isr handler for specific gpio pin
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gpio_isr_handler_add(GPIO_INPUT_IO_0, gpio_isr_handler, (void*) GPIO_INPUT_IO_0);
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//hook isr handler for specific gpio pin
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gpio_isr_handler_add(GPIO_INPUT_IO_1, gpio_isr_handler, (void*) GPIO_INPUT_IO_1);
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//remove isr handler for gpio number.
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gpio_isr_handler_remove(GPIO_INPUT_IO_0);
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//hook isr handler for specific gpio pin again
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gpio_isr_handler_add(GPIO_INPUT_IO_0, gpio_isr_handler, (void*) GPIO_INPUT_IO_0);
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2022-08-04 01:08:48 -04:00
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printf("Minimum free heap size: %"PRIu32" bytes\n", esp_get_minimum_free_heap_size());
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2020-07-21 04:00:05 -04:00
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2016-12-24 07:45:57 -05:00
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int cnt = 0;
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while(1) {
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printf("cnt: %d\n", cnt++);
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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gpio_set_level(GPIO_OUTPUT_IO_0, cnt % 2);
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gpio_set_level(GPIO_OUTPUT_IO_1, cnt % 2);
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}
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}
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