alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity
821977402c
esp-idf/components/esp_rom/esp32s3/Kconfig.soc_caps.in

93 lines
1.5 KiB
Plaintext
Raw Normal View History

build-system: include soc_caps defines into kconfig Adds gen_soc_caps_kconfig.py which parses the soc caps (soc_caps.h) into a format that can be included in kconfig.
2021-11-05 05:23:24 -04:00
#####################################################
# This file is auto-generated from SoC caps
# using gen_soc_caps_kconfig.py, do not edit manually
#####################################################
config ESP_ROM_HAS_CRC_LE
bool
default y
config ESP_ROM_HAS_CRC_BE
bool
default y
move {target}/rom/miniz.h to a common miniz.h - Move {target}/rom/miniz.h to common miniz.h - Add ESP_ROM_HAS_MZ_CRC32 for ESP32/S2/S3/C3/H4 - Alias mz_crc32 to crc32_le if chips not support ESP_ROM_HAS_MZ_CRC32 Closes https://github.com/espressif/esp-idf/issues/10177
2022-11-14 04:54:53 -05:00
config ESP_ROM_HAS_MZ_CRC32
bool
default y
build-system: include soc_caps defines into kconfig Adds gen_soc_caps_kconfig.py which parses the soc caps (soc_caps.h) into a format that can be included in kconfig.
2021-11-05 05:23:24 -04:00
config ESP_ROM_HAS_JPEG_DECODE
bool
default y
config ESP_ROM_UART_CLK_IS_XTAL
bool
default y
config ESP_ROM_HAS_RETARGETABLE_LOCKING
bool
default y
esp_rom: add USB_OTG "port" number for S2 and S3
2022-05-17 17:43:47 -04:00
config ESP_ROM_USB_OTG_NUM
int
default 3
build-system: include soc_caps defines into kconfig Adds gen_soc_caps_kconfig.py which parses the soc caps (soc_caps.h) into a format that can be included in kconfig.
2021-11-05 05:23:24 -04:00
config ESP_ROM_USB_SERIAL_DEVICE_NUM
int
default 4
config ESP_ROM_HAS_ERASE_0_REGION_BUG
bool
default y
fix(spi_flash): Fix issue that flash encryption failed while rom_impl config is enabled The issue is `esp_flash_write_encryped` function in ROM on ESP32C3, ESP32S3 calls legacy implementation, which uses old configuration. And this causes write fails. The solution in this commit is to compile and link this function(and related) in IRAM instead of the ROM one. The IRAM cost increases around 1.2KB after the fix
2024-02-22 05:05:47 -05:00
config ESP_ROM_HAS_ENCRYPTED_WRITES_USING_LEGACY_DRV
bool
default y
build-system: include soc_caps defines into kconfig Adds gen_soc_caps_kconfig.py which parses the soc caps (soc_caps.h) into a format that can be included in kconfig.
2021-11-05 05:23:24 -04:00
config ESP_ROM_GET_CLK_FREQ
bool
default y
hal: use ROM implementation for systimer and wdt on esp32c2
2022-05-06 06:57:14 -04:00
config ESP_ROM_HAS_HAL_WDT
bool
default y
newlib: Add workaround for printf functions using 32-bit time_t on first call sizeof(time_t) was previously switched from 4 to 8, ROM functions that use time_t or dependent types (such as "struct stat") are no longer called due as they still treat sizeof(time_t) as 4 (see commit 24c20d188e24c815e28351cddb838c01e7dfb241). However, there is a ROM callpath that was left out. If putchar is the first stdio print related call, the call path will result in cantwrite() -> __swsetup_r() -> __smakebuf_r() -> __swhatbuf_r() using the ROM "struct stat" (where sizeof(time_t)==4). Instead of removing all printf related ROM newlib functions (which will result in increased binary size), this commit adds a workaround to setup the stdio files before any print related calls occur. This results in cantwrite() always returning false, thus the callpath described above never being reached. Closes https://github.com/espressif/esp-idf/issues/9269
2022-08-18 09:23:53 -04:00
config ESP_ROM_NEEDS_SWSETUP_WORKAROUND
bool
default y
esp32c6: add esp_rom support (rom version: esp32c6-20220901)
2022-07-12 08:28:06 -04:00
config ESP_ROM_HAS_LAYOUT_TABLE
bool
default y
config ESP_ROM_HAS_SPI_FLASH
bool
default y
esp_rom: fix esp32s3 rom ets_printf bug
2022-10-13 06:23:42 -04:00
config ESP_ROM_HAS_ETS_PRINTF_BUG
bool
default y
newlib: update newlib nano documentation for C6 C6 ROM has the the full IO formatting functions included.
2023-02-02 04:24:31 -05:00
config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
bool
default y
esp_rom: add macro ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE for S3/C3/C2/C6/H2/H4
2023-03-06 03:49:10 -05:00
config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
bool
default y
system: fixed ram app cannot use mmu correctly issue
2023-03-09 01:45:45 -05:00
config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
bool
default y
cache: patch some rom cache api, rename those apis in ld 1. Cache_Count_Flash_Pages, fix this api return enexpected + 1 2. Cache_Suspend_I/DCache, add wait cache idle after suspend cache 3. Cache_Freeze_I/DCache_Enable, add wait cache idle after freeze
2023-06-18 22:44:41 -04:00
config ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG
bool
default y
config ESP_ROM_HAS_CACHE_SUSPEND_WAITI_BUG
bool
default y
fix(esp32s3): patch Cache_WriteBack_Addr api Need to ensure that the cacheline being written back will not be accessed during the write back process.
2023-07-20 23:28:12 -04:00
config ESP_ROM_HAS_CACHE_WRITEBACK_BUG
bool
default y
Reference in New Issue Copy Permalink