2021-12-06 04:38:11 -05:00
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stddef.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <esp_random.h>
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#include <esp_mac.h>
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#include "sdkconfig.h"
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#include "os/os.h"
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#include "sysinit/sysinit.h"
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#include "nimble/nimble_port.h"
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#include "nimble/nimble_port_freertos.h"
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#ifdef ESP_PLATFORM
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#include "esp_log.h"
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#endif
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#if CONFIG_SW_COEXIST_ENABLE
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#include "esp_coexist_internal.h"
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#endif
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2022-06-03 10:01:31 -04:00
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#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
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2021-12-06 04:38:11 -05:00
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#include "transport/uart/ble_hci_uart.h"
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#else
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#include "transport/ram/ble_hci_ram.h"
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#endif
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#include "nimble/ble_hci_trans.h"
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#include "nimble/nimble_npl_os.h"
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#include "esp_bt.h"
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#include "esp_intr_alloc.h"
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#include "esp_sleep.h"
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#include "esp_pm.h"
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#include "esp_phy_init.h"
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#include "soc/system_reg.h"
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#include "hal/hal_uart.h"
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2022-01-31 07:21:46 -05:00
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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#include "hci/hci_hal.h"
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#endif
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2021-12-06 04:38:11 -05:00
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "esp_private/periph_ctrl.h"
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2022-01-31 07:21:46 -05:00
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#include "nimble/hci_common.h"
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2021-12-06 04:38:11 -05:00
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/* Macro definition
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************************************************************************
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*/
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#define NIMBLE_PORT_LOG_TAG "BLE_INIT"
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#define OSI_COEX_VERSION 0x00010006
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#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
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/* Types definition
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************************************************************************
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*/
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struct osi_coex_funcs_t {
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uint32_t _magic;
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uint32_t _version;
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void (* _coex_wifi_sleep_set)(bool sleep);
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int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
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void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
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void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
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};
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struct ext_funcs_t {
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uint32_t ext_version;
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int (*_esp_intr_alloc)(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle);
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int (*_esp_intr_free)(void **ret_handle);
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void *(* _malloc)(size_t size);
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void (*_free)(void *p);
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void (*_hal_uart_start_tx)(int);
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int (*_hal_uart_init_cbs)(int, hal_uart_tx_char, hal_uart_tx_done, hal_uart_rx_char, void *);
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int (*_hal_uart_config)(int, int32_t, uint8_t, uint8_t, enum hal_uart_parity, enum hal_uart_flow_ctl);
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int (*_hal_uart_close)(int);
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void (*_hal_uart_blocking_tx)(int, uint8_t);
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int (*_hal_uart_init)(int, void *);
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int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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void (* _task_delete)(void *task_handle);
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void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
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uint32_t (* _os_random)(void);
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uint32_t magic;
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};
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/* External functions or variables
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************************************************************************
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*/
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extern int ble_plf_set_log_level(int level);
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extern int ble_osi_coex_funcs_register(struct osi_coex_funcs_t *coex_funcs);
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extern int coex_core_ble_conn_dyn_prio_get(bool *low, bool *high);
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extern int ble_controller_init(struct esp_bt_controller_config_t *cfg);
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extern int ble_controller_deinit(void);
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extern int ble_controller_enable(uint8_t mode);
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extern int ble_controller_disable(void);
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extern int esp_register_ext_funcs (struct ext_funcs_t *);
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extern void esp_unregister_ext_funcs (void);
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extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
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extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
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extern void esp_unregister_npl_funcs (void);
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extern void npl_freertos_mempool_deinit(void);
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2022-01-31 07:21:46 -05:00
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/* TX power */
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int ble_txpwr_set(int power_type, int power_level);
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int ble_txpwr_get(int power_type);
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2021-12-06 04:38:11 -05:00
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extern void bt_bb_v2_init_cmplx(uint8_t i);
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extern int os_msys_buf_alloc(void);
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extern uint32_t r_os_cputime_get32(void);
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extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
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extern void r_ble_ll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, void *w_arg, uint32_t us_to_enabled);
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extern int os_msys_init(void);
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extern void os_msys_buf_free(void);
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extern void esp_ble_register_trace_funcs(struct ble_ll_trace_func_t *funcs);
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extern void bt_bb_set_le_tx_on_delay(uint32_t delay_us);
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/* Local Function Declaration
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*********************************************************************
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*/
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static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
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static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
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static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
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static void task_delete_wrapper(void *task_handle);
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static void hal_uart_start_tx_wrapper(int uart_no);
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static int hal_uart_init_cbs_wrapper(int uart_no, hal_uart_tx_char tx_func,
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hal_uart_tx_done tx_done, hal_uart_rx_char rx_func, void *arg);
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static int hal_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits,
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enum hal_uart_parity parity, enum hal_uart_flow_ctl flow_ctl);
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static int hal_uart_close_wrapper(int uart_no);
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static void hal_uart_blocking_tx_wrapper(int port, uint8_t data);
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static int hal_uart_init_wrapper(int uart_no, void *cfg);
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static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in);
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static int esp_intr_free_wrapper(void **ret_handle);
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static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
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static uint32_t osi_random_wrapper(void);
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/* Local variable definition
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***************************************************************************
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*/
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/* Static variable declare */
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static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
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static bool s_is_sleep_state = false;
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#ifdef CONFIG_PM_ENABLE
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#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
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uint32_t s_sleep_tick;
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#endif
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#endif
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#ifdef CONFIG_PM_ENABLE
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static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr = NULL;
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static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
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static bool s_pm_lock_acquired = true;
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static DRAM_ATTR bool s_btdm_allow_light_sleep;
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// pm_lock to prevent light sleep when using main crystal as Bluetooth low power clock
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static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
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static void btdm_slp_tmr_callback(void *arg);
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#define BTDM_MIN_TIMER_UNCERTAINTY_US (200)
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#endif /* #ifdef CONFIG_PM_ENABLE */
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#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER
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#define BLE_RTC_DELAY_US (1100)
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#else
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#define BLE_RTC_DELAY_US (0)
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#endif
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static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
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._magic = OSI_COEX_MAGIC_VALUE,
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._version = OSI_COEX_VERSION,
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._coex_wifi_sleep_set = NULL,
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._coex_core_ble_conn_dyn_prio_get = NULL,
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._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
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._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
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};
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struct ext_funcs_t ext_funcs_ro = {
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.ext_version = 0xE0000001,
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._esp_intr_alloc = esp_intr_alloc_wrapper,
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._esp_intr_free = esp_intr_free_wrapper,
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._malloc = malloc,
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._free = free,
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._hal_uart_start_tx = hal_uart_start_tx_wrapper,
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._hal_uart_init_cbs = hal_uart_init_cbs_wrapper,
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._hal_uart_config = hal_uart_config_wrapper,
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._hal_uart_close = hal_uart_close_wrapper,
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._hal_uart_blocking_tx = hal_uart_blocking_tx_wrapper,
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._hal_uart_init = hal_uart_init_wrapper,
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._task_create = task_create_wrapper,
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._task_delete = task_delete_wrapper,
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._osi_assert = osi_assert_wrapper,
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._os_random = osi_random_wrapper,
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.magic = 0xA5A5A5A5,
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};
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static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2)
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{
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assert(0);
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}
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static uint32_t IRAM_ATTR osi_random_wrapper(void)
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{
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return esp_random();
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}
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static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
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{
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#if CONFIG_SW_COEXIST_ENABLE
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coex_schm_status_bit_set(type, status);
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#endif
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}
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static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
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{
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#if CONFIG_SW_COEXIST_ENABLE
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coex_schm_status_bit_clear(type, status);
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#endif
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}
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2022-01-31 07:21:46 -05:00
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#ifdef CONFIG_BT_BLUEDROID_ENABLED
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bool esp_vhci_host_check_send_available(void)
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{
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if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
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return false;
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}
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2022-06-03 10:01:31 -04:00
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return true;
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2022-01-31 07:21:46 -05:00
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}
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/**
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* Allocates an mbuf for use by the nimble host.
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*/
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static struct os_mbuf *
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ble_hs_mbuf_gen_pkt(uint16_t leading_space)
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{
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struct os_mbuf *om;
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int rc;
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om = os_msys_get_pkthdr(0, 0);
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if (om == NULL) {
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return NULL;
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}
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if (om->om_omp->omp_databuf_len < leading_space) {
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rc = os_mbuf_free_chain(om);
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assert(rc == 0);
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return NULL;
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}
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om->om_data += leading_space;
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return om;
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}
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/**
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* Allocates an mbuf suitable for an HCI ACL data packet.
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*
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* @return An empty mbuf on success; null on memory
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* exhaustion.
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*/
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struct os_mbuf *
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ble_hs_mbuf_acl_pkt(void)
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{
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return ble_hs_mbuf_gen_pkt(4 + 1);
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}
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void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
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{
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if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
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return;
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}
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2022-06-03 10:01:31 -04:00
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if (*(data) == DATA_TYPE_COMMAND) {
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struct ble_hci_cmd *cmd = NULL;
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cmd = (struct ble_hci_cmd *) ble_hci_trans_buf_alloc(BLE_HCI_TRANS_BUF_CMD);
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memcpy((uint8_t *)cmd, data + 1, len - 1);
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ble_hci_trans_hs_cmd_tx((uint8_t *)cmd);
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2022-01-31 07:21:46 -05:00
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}
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2022-06-03 10:01:31 -04:00
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if (*(data) == DATA_TYPE_ACL) {
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struct os_mbuf *om = os_msys_get_pkthdr(0, 0);
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assert(om);
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memcpy(om->om_data, &data[1], len - 1);
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om->om_len = len - 1;
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OS_MBUF_PKTHDR(om)->omp_len = len - 1;
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ble_hci_trans_hs_acl_tx(om);
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}
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}
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esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
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{
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if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
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return ESP_FAIL;
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}
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ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt,NULL,ble_hs_rx_data,NULL);
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return ESP_OK;
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}
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2021-12-06 04:38:11 -05:00
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2022-01-31 07:21:46 -05:00
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#endif
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2021-12-06 04:38:11 -05:00
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static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
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{
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return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
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}
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static void task_delete_wrapper(void *task_handle)
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{
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|
|
|
vTaskDelete(task_handle);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void hal_uart_start_tx_wrapper(int uart_no)
|
|
|
|
{
|
2022-06-03 10:01:31 -04:00
|
|
|
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
2021-12-06 04:38:11 -05:00
|
|
|
hal_uart_start_tx(uart_no);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hal_uart_init_cbs_wrapper(int uart_no, hal_uart_tx_char tx_func,
|
|
|
|
hal_uart_tx_done tx_done, hal_uart_rx_char rx_func, void *arg)
|
|
|
|
{
|
|
|
|
int rc = -1;
|
2022-06-03 10:01:31 -04:00
|
|
|
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
2021-12-06 04:38:11 -05:00
|
|
|
rc = hal_uart_init_cbs(uart_no, tx_func, tx_done, rx_func, arg);
|
|
|
|
#endif
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hal_uart_config_wrapper(int uart_no, int32_t speed, uint8_t databits, uint8_t stopbits,
|
|
|
|
enum hal_uart_parity parity, enum hal_uart_flow_ctl flow_ctl)
|
|
|
|
{
|
|
|
|
int rc = -1;
|
2022-06-03 10:01:31 -04:00
|
|
|
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
2021-12-06 04:38:11 -05:00
|
|
|
rc = hal_uart_config(uart_no, speed, databits, stopbits, parity, flow_ctl);
|
|
|
|
#endif
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hal_uart_close_wrapper(int uart_no)
|
|
|
|
{
|
|
|
|
int rc = -1;
|
2022-06-03 10:01:31 -04:00
|
|
|
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
2021-12-06 04:38:11 -05:00
|
|
|
rc = hal_uart_close(uart_no);
|
|
|
|
#endif
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void hal_uart_blocking_tx_wrapper(int port, uint8_t data)
|
|
|
|
{
|
2022-06-03 10:01:31 -04:00
|
|
|
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
2021-12-06 04:38:11 -05:00
|
|
|
hal_uart_blocking_tx(port, data);
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
static int hal_uart_init_wrapper(int uart_no, void *cfg)
|
|
|
|
{
|
|
|
|
int rc = -1;
|
2022-06-03 10:01:31 -04:00
|
|
|
#ifdef CONFIG_BT_LE_HCI_INTERFACE_USE_UART
|
2021-12-06 04:38:11 -05:00
|
|
|
rc = hal_uart_init(uart_no, cfg);
|
|
|
|
#endif
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int esp_intr_alloc_wrapper(int source, int flags, intr_handler_t handler, void *arg, void **ret_handle_in)
|
|
|
|
{
|
|
|
|
int rc = esp_intr_alloc(source, flags, handler, arg, (intr_handle_t *)ret_handle_in);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int esp_intr_free_wrapper(void **ret_handle)
|
|
|
|
{
|
|
|
|
int rc = 0;
|
|
|
|
rc = esp_intr_free((intr_handle_t) * ret_handle);
|
|
|
|
*ret_handle = NULL;
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
|
|
|
|
{
|
|
|
|
if (s_is_sleep_state) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "sleep state error");
|
|
|
|
assert(0);
|
|
|
|
}
|
|
|
|
s_is_sleep_state = true;
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
|
|
uint32_t tick_invalid = *(uint32_t *)(arg);
|
|
|
|
if (!tick_invalid) {
|
|
|
|
s_sleep_tick = r_os_cputime_get32();
|
|
|
|
assert(enable_tick >= s_sleep_tick);
|
|
|
|
// start a timer to wake up and acquire the pm_lock before modem_sleep awakes
|
|
|
|
uint32_t us_to_sleep = os_cputime_ticks_to_usecs(enable_tick - s_sleep_tick);
|
|
|
|
assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
|
|
|
|
if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - BTDM_MIN_TIMER_UNCERTAINTY_US) != ESP_OK) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "timer start failed");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif // CONFIG_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
|
|
if (s_pm_lock_acquired) {
|
|
|
|
esp_pm_lock_release(s_pm_lock);
|
|
|
|
s_pm_lock_acquired = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif // CONFIG_PM_ENABLE
|
|
|
|
}
|
|
|
|
|
|
|
|
IRAM_ATTR void controller_wakeup_cb(void *arg)
|
|
|
|
{
|
|
|
|
if (!s_is_sleep_state) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "wake up state error");
|
|
|
|
assert(0);
|
|
|
|
}
|
|
|
|
s_is_sleep_state = false;
|
|
|
|
|
|
|
|
// need to check if need to call pm lock here
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
if (!s_pm_lock_acquired) {
|
|
|
|
s_pm_lock_acquired = true;
|
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
}
|
|
|
|
#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
|
|
if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_TIMER) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "wake up source %d", esp_sleep_get_wakeup_cause());
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
|
|
|
if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_BT) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "wake up source %d", esp_sleep_get_wakeup_cause());
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
|
|
static void btdm_slp_tmr_callback(void *arg)
|
|
|
|
{
|
|
|
|
(void)(arg);
|
|
|
|
if (!s_pm_lock_acquired) {
|
|
|
|
s_pm_lock_acquired = true;
|
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
#endif // CONFIG_PM_ENABLE
|
|
|
|
|
|
|
|
void controller_sleep_init(void)
|
|
|
|
{
|
|
|
|
|
|
|
|
#ifdef CONFIG_NIMBLE_SLEEP_ENABLE
|
|
|
|
s_is_sleep_state = false;
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
s_btdm_allow_light_sleep = true;
|
|
|
|
#endif // CONFIG_PM_ENABLE
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled");
|
|
|
|
// register sleep callbacks
|
|
|
|
r_ble_ll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0, 500 + BLE_RTC_DELAY_US);
|
|
|
|
#else
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
s_btdm_allow_light_sleep = false;
|
|
|
|
#endif // CONFIG_PM_ENABLE
|
|
|
|
#endif // CONFIG_NIMBLE_SLEEP_ENABLE
|
|
|
|
|
|
|
|
// enable light sleep
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
if (!s_btdm_allow_light_sleep) {
|
|
|
|
if (esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btnosleep", &s_light_sleep_pm_lock) != ESP_OK) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock) != ESP_OK) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
|
|
esp_timer_create_args_t create_args = {
|
|
|
|
.callback = btdm_slp_tmr_callback,
|
|
|
|
.arg = NULL,
|
|
|
|
.name = "btSlp"
|
|
|
|
};
|
|
|
|
if ( esp_timer_create(&create_args, &s_btdm_slp_tmr) != ESP_OK) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "light sleep enable success, CPU RTC timer wake up");
|
|
|
|
#endif //CONFIG_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
|
|
|
|
|
|
#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
|
|
|
esp_sleep_enable_bt_wakeup();
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "light sleep enable success, BLE RTC timer wake up");
|
|
|
|
#endif // CONFIG_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
|
|
|
|
|
|
|
s_pm_lock_acquired = true;
|
|
|
|
|
|
|
|
if (!s_btdm_allow_light_sleep) {
|
|
|
|
esp_pm_lock_acquire(s_light_sleep_pm_lock);
|
|
|
|
}
|
|
|
|
if (s_pm_lock) {
|
|
|
|
esp_pm_lock_acquire(s_pm_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
error:
|
|
|
|
if (!s_btdm_allow_light_sleep) {
|
|
|
|
if (s_light_sleep_pm_lock != NULL) {
|
|
|
|
esp_pm_lock_delete(s_light_sleep_pm_lock);
|
|
|
|
s_light_sleep_pm_lock = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (s_pm_lock != NULL) {
|
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
|
|
s_pm_lock = NULL;
|
|
|
|
}
|
|
|
|
#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
|
|
if (s_btdm_slp_tmr != NULL) {
|
|
|
|
esp_timer_delete(s_btdm_slp_tmr);
|
|
|
|
s_btdm_slp_tmr = NULL;
|
|
|
|
}
|
2022-06-03 10:01:31 -04:00
|
|
|
#endif // CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
2021-12-06 04:38:11 -05:00
|
|
|
#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
|
|
|
esp_sleep_disable_bt_wakeup();
|
2022-06-03 10:01:31 -04:00
|
|
|
#endif // CONFIG_BT_NIMBLE_WAKEUP_SOURCE_BLE_RTC_TIMER
|
2021-12-06 04:38:11 -05:00
|
|
|
#endif
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
void controller_sleep_deinit(void)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_PM_ENABLE
|
|
|
|
if (!s_btdm_allow_light_sleep) {
|
|
|
|
if (s_light_sleep_pm_lock != NULL) {
|
|
|
|
esp_pm_lock_delete(s_light_sleep_pm_lock);
|
|
|
|
s_light_sleep_pm_lock = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (s_pm_lock != NULL) {
|
|
|
|
esp_pm_lock_delete(s_pm_lock);
|
|
|
|
s_pm_lock = NULL;
|
|
|
|
}
|
|
|
|
#ifdef CONFIG_BT_NIMBLE_WAKEUP_SOURCE_CPU_RTC_TIMER
|
|
|
|
if (s_btdm_slp_tmr != NULL) {
|
|
|
|
esp_timer_stop(s_btdm_slp_tmr);
|
|
|
|
esp_timer_delete(s_btdm_slp_tmr);
|
|
|
|
s_btdm_slp_tmr = NULL;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
s_pm_lock_acquired = false;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_init(struct esp_bt_controller_config_t *cfg)
|
|
|
|
{
|
|
|
|
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
if (cfg == NULL) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (esp_register_ext_funcs(&ext_funcs_ro) != 0) {
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Initialize the function pointers for OS porting */
|
|
|
|
npl_freertos_funcs_init();
|
|
|
|
|
|
|
|
struct npl_funcs_t *p_npl_funcs = npl_freertos_funcs_get();
|
|
|
|
if (!p_npl_funcs) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions get failed");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (esp_register_npl_funcs(p_npl_funcs) != 0) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions register failed");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (npl_freertos_mempool_init() != 0) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Initialize the global memory pool */
|
|
|
|
if (os_msys_buf_alloc() != 0) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
os_msys_init();
|
2022-01-31 07:21:46 -05:00
|
|
|
#if CONFIG_BT_NIMBLE_ENABLED
|
2021-12-06 04:38:11 -05:00
|
|
|
// ble_npl_eventq_init() need to use npl function in rom and must be called after esp_bt_controller_init()
|
|
|
|
/* Initialize default event queue */
|
|
|
|
ble_npl_eventq_init(nimble_port_get_dflt_eventq());
|
2022-01-31 07:21:46 -05:00
|
|
|
#endif
|
2021-12-06 04:38:11 -05:00
|
|
|
periph_module_enable(PERIPH_BT_MODULE);
|
|
|
|
|
|
|
|
// init phy
|
|
|
|
esp_phy_enable();
|
|
|
|
|
|
|
|
// set bb delay
|
|
|
|
bt_bb_set_le_tx_on_delay(50);
|
|
|
|
|
|
|
|
if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
|
|
|
|
return ESP_ERR_INVALID_ARG;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
2022-06-03 10:01:31 -04:00
|
|
|
coex_init();
|
2021-12-06 04:38:11 -05:00
|
|
|
#endif
|
|
|
|
|
|
|
|
if (ble_controller_init(cfg) != 0) {
|
|
|
|
return ESP_ERR_NO_MEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
controller_sleep_init();
|
|
|
|
|
|
|
|
uint8_t mac[6];
|
|
|
|
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
|
|
|
|
|
|
|
|
swap_in_place(mac, 6);
|
|
|
|
|
|
|
|
esp_ble_ll_set_public_addr(mac);
|
|
|
|
|
|
|
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
|
2022-01-31 07:21:46 -05:00
|
|
|
#ifdef CONFIG_BT_BLUEDROID_ENABLED
|
|
|
|
ble_hci_trans_cfg_hs(ble_hs_hci_rx_evt,NULL,ble_hs_rx_data,NULL);
|
|
|
|
#endif
|
2021-12-06 04:38:11 -05:00
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_deinit(void)
|
|
|
|
{
|
|
|
|
if ((ble_controller_status < ESP_BT_CONTROLLER_STATUS_INITED) || (ble_controller_status >= ESP_BT_CONTROLLER_STATUS_ENABLED)) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
controller_sleep_deinit();
|
|
|
|
|
|
|
|
if (ble_controller_deinit() != 0) {
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
2022-01-31 07:21:46 -05:00
|
|
|
#if CONFIG_BT_NIMBLE_ENABLED
|
2021-12-06 04:38:11 -05:00
|
|
|
/* De-initialize default event queue */
|
|
|
|
ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
|
2022-01-31 07:21:46 -05:00
|
|
|
#endif
|
2021-12-06 04:38:11 -05:00
|
|
|
os_msys_buf_free();
|
|
|
|
|
|
|
|
esp_unregister_npl_funcs();
|
|
|
|
|
|
|
|
esp_unregister_ext_funcs();
|
|
|
|
|
|
|
|
/* De-initialize npl functions */
|
|
|
|
npl_freertos_funcs_deinit();
|
|
|
|
|
|
|
|
npl_freertos_mempool_deinit();
|
|
|
|
|
|
|
|
esp_phy_disable();
|
|
|
|
|
|
|
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
|
|
|
|
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2022-01-31 07:21:46 -05:00
|
|
|
esp_bt_controller_status_t esp_bt_controller_get_status(void)
|
|
|
|
{
|
|
|
|
return ble_controller_status;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* extra functions */
|
|
|
|
esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
|
|
|
|
{
|
|
|
|
esp_err_t stat = ESP_FAIL;
|
|
|
|
|
|
|
|
switch (power_type) {
|
|
|
|
case ESP_BLE_PWR_TYPE_ADV:
|
|
|
|
case ESP_BLE_PWR_TYPE_SCAN:
|
|
|
|
case ESP_BLE_PWR_TYPE_DEFAULT:
|
|
|
|
if (ble_txpwr_set(power_type, power_level) == 0) {
|
|
|
|
stat = ESP_OK;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
stat = ESP_ERR_NOT_SUPPORTED;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return stat;
|
|
|
|
}
|
|
|
|
|
|
|
|
int ble_txpwr_get(int power_type)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int ble_txpwr_set(int power_type, int power_level)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
|
|
|
|
{
|
|
|
|
esp_power_level_t lvl;
|
|
|
|
|
|
|
|
switch (power_type) {
|
|
|
|
case ESP_BLE_PWR_TYPE_ADV:
|
|
|
|
case ESP_BLE_PWR_TYPE_SCAN:
|
|
|
|
lvl = (esp_power_level_t)ble_txpwr_get(power_type);
|
|
|
|
break;
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL0:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL1:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL2:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL3:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL4:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL5:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL6:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL7:
|
|
|
|
case ESP_BLE_PWR_TYPE_CONN_HDL8:
|
|
|
|
case ESP_BLE_PWR_TYPE_DEFAULT:
|
|
|
|
lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
lvl = ESP_PWR_LVL_INVALID;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return lvl;
|
|
|
|
}
|
|
|
|
|
2021-12-06 04:38:11 -05:00
|
|
|
esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
|
|
|
|
{
|
|
|
|
if (mode != ESP_BT_MODE_BLE) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller mode");
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
2022-06-03 10:01:31 -04:00
|
|
|
|
|
|
|
#if CONFIG_SW_COEXIST_ENABLE
|
|
|
|
coex_enable();
|
|
|
|
#endif
|
|
|
|
|
2021-12-06 04:38:11 -05:00
|
|
|
if (ble_controller_enable(mode) != 0) {
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
|
|
|
|
ble_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
esp_err_t esp_bt_controller_disable(void)
|
|
|
|
{
|
|
|
|
if (ble_controller_status < ESP_BT_CONTROLLER_STATUS_ENABLED) {
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
if (ble_controller_disable() != 0) {
|
|
|
|
return ESP_FAIL;
|
|
|
|
}
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2022-01-31 07:21:46 -05:00
|
|
|
esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
|
|
|
|
{
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
|
|
|
|
return ESP_OK;
|
|
|
|
}
|
|
|
|
|
2021-12-06 04:38:11 -05:00
|
|
|
esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
|
|
|
|
{
|
|
|
|
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
|
|
|
|
return ESP_OK;
|
|
|
|
}
|