2022-05-28 05:03:05 -04:00
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <stdarg.h>
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#include <sys/cdefs.h>
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#include "sdkconfig.h"
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#if CONFIG_MCPWM_ENABLE_DEBUG_LOG
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// The local log level must be defined before including esp_log.h
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// Set the maximum log level for this source file
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#define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
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#endif
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#include "freertos/FreeRTOS.h"
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#include "esp_attr.h"
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#include "esp_check.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "esp_memory_utils.h"
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#include "soc/soc_caps.h"
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#include "soc/mcpwm_periph.h"
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#include "hal/mcpwm_ll.h"
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#include "driver/mcpwm_fault.h"
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#include "driver/gpio.h"
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#include "mcpwm_private.h"
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static const char *TAG = "mcpwm";
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static void mcpwm_gpio_fault_default_isr(void *args);
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static esp_err_t mcpwm_del_gpio_fault(mcpwm_fault_handle_t fault);
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static esp_err_t mcpwm_del_soft_fault(mcpwm_fault_handle_t fault);
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static esp_err_t mcpwm_gpio_fault_register_to_group(mcpwm_gpio_fault_t *fault, int group_id)
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{
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mcpwm_group_t *group = mcpwm_acquire_group_handle(group_id);
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ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no mem for group (%d)", group_id);
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int fault_id = -1;
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portENTER_CRITICAL(&group->spinlock);
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for (int i = 0; i < SOC_MCPWM_GPIO_FAULTS_PER_GROUP; i++) {
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if (!group->gpio_faults[i]) {
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fault_id = i;
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group->gpio_faults[i] = fault;
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break;
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}
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}
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portEXIT_CRITICAL(&group->spinlock);
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if (fault_id < 0) {
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mcpwm_release_group_handle(group);
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group = NULL;
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} else {
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fault->base.group = group;
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fault->fault_id = fault_id;
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}
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ESP_RETURN_ON_FALSE(fault_id >= 0, ESP_ERR_NOT_FOUND, TAG, "no free gpio fault in group (%d)", group_id);
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return ESP_OK;
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}
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static void mcpwm_gpio_fault_unregister_from_group(mcpwm_gpio_fault_t *fault)
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{
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mcpwm_group_t *group = fault->base.group;
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int fault_id = fault->fault_id;
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portENTER_CRITICAL(&group->spinlock);
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group->gpio_faults[fault_id] = NULL;
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portEXIT_CRITICAL(&group->spinlock);
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// fault has a reference on group, release it now
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mcpwm_release_group_handle(group);
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}
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static esp_err_t mcpwm_gpio_fault_destory(mcpwm_gpio_fault_t *fault)
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{
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if (fault->intr) {
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ESP_RETURN_ON_ERROR(esp_intr_free(fault->intr), TAG, "uninstall interrupt service failed");
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}
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if (fault->base.group) {
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mcpwm_gpio_fault_unregister_from_group(fault);
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}
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free(fault);
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return ESP_OK;
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}
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esp_err_t mcpwm_new_gpio_fault(const mcpwm_gpio_fault_config_t *config, mcpwm_fault_handle_t *ret_fault)
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{
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#if CONFIG_MCPWM_ENABLE_DEBUG_LOG
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esp_log_level_set(TAG, ESP_LOG_DEBUG);
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#endif
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esp_err_t ret = ESP_OK;
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mcpwm_gpio_fault_t *fault = NULL;
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ESP_GOTO_ON_FALSE(config && ret_fault, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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ESP_GOTO_ON_FALSE(config->group_id < SOC_MCPWM_GROUPS && config->group_id >= 0, ESP_ERR_INVALID_ARG,
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err, TAG, "invalid group ID:%d", config->group_id);
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fault = heap_caps_calloc(1, sizeof(mcpwm_gpio_fault_t), MCPWM_MEM_ALLOC_CAPS);
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ESP_GOTO_ON_FALSE(fault, ESP_ERR_NO_MEM, err, TAG, "no mem for gpio fault");
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ESP_GOTO_ON_ERROR(mcpwm_gpio_fault_register_to_group(fault, config->group_id), err, TAG, "register gpio fault failed");
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mcpwm_group_t *group = fault->base.group;
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int group_id = group->group_id;
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mcpwm_hal_context_t *hal = &group->hal;
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int fault_id = fault->fault_id;
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// GPIO configuration
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gpio_config_t gpio_conf = {
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.intr_type = GPIO_INTR_DISABLE,
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.mode = GPIO_MODE_INPUT | (config->flags.io_loop_back ? GPIO_MODE_OUTPUT : 0), // also enable the output path if `io_loop_back` is enabled
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.pin_bit_mask = (1ULL << config->gpio_num),
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.pull_down_en = config->flags.pull_down,
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.pull_up_en = config->flags.pull_up,
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};
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ESP_GOTO_ON_ERROR(gpio_config(&gpio_conf), err, TAG, "config fault GPIO failed");
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esp_rom_gpio_connect_in_signal(config->gpio_num, mcpwm_periph_signals.groups[group_id].gpio_faults[fault_id].fault_sig, 0);
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// set fault detection polarity
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// different gpio faults share the same config register, using a group level spin lock
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portENTER_CRITICAL(&group->spinlock);
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mcpwm_ll_fault_set_active_level(hal->dev, fault_id, config->flags.active_level);
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portEXIT_CRITICAL(&group->spinlock);
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// enable fault detection
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mcpwm_ll_fault_enable_detection(hal->dev, fault_id, true);
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// fill in other operator members
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fault->base.type = MCPWM_FAULT_TYPE_GPIO;
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fault->gpio_num = config->gpio_num;
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fault->base.del = mcpwm_del_gpio_fault;
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*ret_fault = &fault->base;
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ESP_LOGD(TAG, "new gpio fault (%d,%d) at %p, GPIO: %d", group_id, fault_id, fault, config->gpio_num);
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return ESP_OK;
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err:
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if (fault) {
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mcpwm_gpio_fault_destory(fault);
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}
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return ret;
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}
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static esp_err_t mcpwm_del_gpio_fault(mcpwm_fault_handle_t fault)
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{
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mcpwm_gpio_fault_t *gpio_fault = __containerof(fault, mcpwm_gpio_fault_t, base);
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mcpwm_group_t *group = fault->group;
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mcpwm_hal_context_t *hal = &group->hal;
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int fault_id = gpio_fault->fault_id;
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ESP_LOGD(TAG, "del GPIO fault (%d,%d)", group->group_id, fault_id);
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gpio_reset_pin(gpio_fault->gpio_num);
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portENTER_CRITICAL(&group->spinlock);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_FAULT_MASK(fault_id), false);
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mcpwm_ll_intr_clear_status(hal->dev, MCPWM_LL_EVENT_FAULT_MASK(fault_id));
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portEXIT_CRITICAL(&group->spinlock);
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// disable fault detection
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mcpwm_ll_fault_enable_detection(hal->dev, fault_id, false);
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// recycle memory resource
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ESP_RETURN_ON_ERROR(mcpwm_gpio_fault_destory(gpio_fault), TAG, "destory GPIO fault failed");
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return ESP_OK;
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}
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esp_err_t mcpwm_new_soft_fault(const mcpwm_soft_fault_config_t *config, mcpwm_fault_handle_t *ret_fault)
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{
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esp_err_t ret = ESP_OK;
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mcpwm_soft_fault_t *soft_fault = NULL;
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ESP_GOTO_ON_FALSE(config && ret_fault, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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soft_fault = heap_caps_calloc(1, sizeof(mcpwm_soft_fault_t), MCPWM_MEM_ALLOC_CAPS);
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ESP_GOTO_ON_FALSE(soft_fault, ESP_ERR_NO_MEM, err, TAG, "no mem for soft fault");
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// fill in other fault members
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soft_fault->base.type = MCPWM_FAULT_TYPE_SOFT;
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soft_fault->base.del = mcpwm_del_soft_fault;
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*ret_fault = &soft_fault->base;
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ESP_LOGD(TAG, "new soft fault at %p", soft_fault);
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return ESP_OK;
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err:
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2022-07-28 01:05:18 -04:00
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// soft_fault must be NULL in the error handling path, and it's a determined behaviour to free a NULL pointer in esp-idf
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free(soft_fault);
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2022-05-28 05:03:05 -04:00
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return ret;
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}
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static esp_err_t mcpwm_del_soft_fault(mcpwm_fault_handle_t fault)
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{
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mcpwm_soft_fault_t *soft_fault = __containerof(fault, mcpwm_soft_fault_t, base);
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ESP_LOGD(TAG, "del soft fault %p", soft_fault);
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free(soft_fault);
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return ESP_OK;
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}
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esp_err_t mcpwm_soft_fault_activate(mcpwm_fault_handle_t fault)
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{
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ESP_RETURN_ON_FALSE(fault, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(fault->type == MCPWM_FAULT_TYPE_SOFT, ESP_ERR_INVALID_ARG, TAG, "not a valid soft fault");
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mcpwm_group_t *group = fault->group;
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mcpwm_soft_fault_t *soft_fault = __containerof(fault, mcpwm_soft_fault_t, base);
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2022-08-16 05:57:02 -04:00
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mcpwm_oper_t *oper = soft_fault->oper;
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ESP_RETURN_ON_FALSE(oper, ESP_ERR_INVALID_STATE, TAG, "no operator is assigned to the fault");
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2022-05-28 05:03:05 -04:00
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2022-08-16 05:57:02 -04:00
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switch (oper->brake_mode_on_soft_fault) {
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2022-05-28 05:03:05 -04:00
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case MCPWM_OPER_BRAKE_MODE_CBC:
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2022-08-16 05:57:02 -04:00
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mcpwm_ll_brake_trigger_soft_cbc(group->hal.dev, oper->oper_id);
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2022-05-28 05:03:05 -04:00
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break;
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case MCPWM_OPER_BRAKE_MODE_OST:
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2022-08-16 05:57:02 -04:00
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mcpwm_ll_brake_trigger_soft_ost(group->hal.dev, oper->oper_id);
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2022-05-28 05:03:05 -04:00
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break;
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default:
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2022-08-16 05:57:02 -04:00
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ESP_RETURN_ON_FALSE(false, ESP_ERR_INVALID_STATE, TAG, "unknown brake mode:%d", oper->brake_mode_on_soft_fault);
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2022-05-28 05:03:05 -04:00
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break;
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}
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return ESP_OK;
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}
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esp_err_t mcpwm_del_fault(mcpwm_fault_handle_t fault)
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{
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ESP_RETURN_ON_FALSE(fault, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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return fault->del(fault);
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}
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esp_err_t mcpwm_fault_register_event_callbacks(mcpwm_fault_handle_t fault, const mcpwm_fault_event_callbacks_t *cbs, void *user_data)
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{
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ESP_RETURN_ON_FALSE(fault && cbs, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(fault->type == MCPWM_FAULT_TYPE_GPIO, ESP_ERR_INVALID_ARG, TAG, "only gpio fault can register event callback");
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mcpwm_gpio_fault_t *gpio_fault = __containerof(fault, mcpwm_gpio_fault_t, base);
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mcpwm_group_t *group = fault->group;
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int group_id = group->group_id;
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mcpwm_hal_context_t *hal = &group->hal;
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int fault_id = gpio_fault->fault_id;
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#if CONFIG_MCWPM_ISR_IRAM_SAFE
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if (cbs->on_fault_enter) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_fault_enter), ESP_ERR_INVALID_ARG, TAG, "on_fault_enter callback not in IRAM");
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}
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if (cbs->on_fault_exit) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_fault_exit), ESP_ERR_INVALID_ARG, TAG, "on_fault_exit callback not in IRAM");
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}
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if (user_data) {
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ESP_RETURN_ON_FALSE(esp_ptr_internal(user_data), ESP_ERR_INVALID_ARG, TAG, "user context not in internal RAM");
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}
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#endif
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// lazy install interrupt service
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if (!gpio_fault->intr) {
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2022-08-06 02:52:22 -04:00
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// we want the interrupt service to be enabled after allocation successfully
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2022-05-28 05:03:05 -04:00
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int isr_flags = MCPWM_INTR_ALLOC_FLAG & ~ESP_INTR_FLAG_INTRDISABLED;
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ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(mcpwm_periph_signals.groups[group_id].irq_id, isr_flags,
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(uint32_t)mcpwm_ll_intr_get_status_reg(hal->dev), MCPWM_LL_EVENT_FAULT_MASK(fault_id),
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mcpwm_gpio_fault_default_isr, gpio_fault, &gpio_fault->intr), TAG, "install interrupt service for gpio fault failed");
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}
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// different mcpwm events share the same interrupt control register
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portENTER_CRITICAL(&group->spinlock);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_FAULT_ENTER(fault_id), cbs->on_fault_enter != NULL);
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mcpwm_ll_intr_enable(hal->dev, MCPWM_LL_EVENT_FAULT_EXIT(fault_id), cbs->on_fault_exit != NULL);
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portEXIT_CRITICAL(&group->spinlock);
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gpio_fault->on_fault_enter = cbs->on_fault_enter;
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gpio_fault->on_fault_exit = cbs->on_fault_exit;
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gpio_fault->user_data = user_data;
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return ESP_OK;
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}
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static void IRAM_ATTR mcpwm_gpio_fault_default_isr(void *args)
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{
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mcpwm_gpio_fault_t *fault = (mcpwm_gpio_fault_t *)args;
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mcpwm_group_t *group = fault->base.group;
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mcpwm_hal_context_t *hal = &group->hal;
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int fault_id = fault->fault_id;
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bool need_yield = false;
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uint32_t status = mcpwm_ll_intr_get_status(hal->dev);
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mcpwm_ll_intr_clear_status(hal->dev, status & MCPWM_LL_EVENT_FAULT_MASK(fault_id));
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mcpwm_fault_event_data_t edata = {
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2022-09-20 03:34:45 -04:00
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// TBD
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2022-05-28 05:03:05 -04:00
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};
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if (status & MCPWM_LL_EVENT_FAULT_ENTER(fault_id)) {
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mcpwm_fault_event_cb_t cb = fault->on_fault_enter;
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if (cb) {
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if (cb(&fault->base, &edata, fault->user_data)) {
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need_yield = true;
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}
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}
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}
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if (status & MCPWM_LL_EVENT_FAULT_EXIT(fault_id)) {
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mcpwm_fault_event_cb_t cb = fault->on_fault_exit;
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if (cb) {
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if (cb(&fault->base, &edata, fault->user_data)) {
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need_yield = true;
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}
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}
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}
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if (need_yield) {
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portYIELD_FROM_ISR();
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}
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|
}
|