2020-11-05 23:00:07 -05:00
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set(srcs "ccomp_timer.c"
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2021-11-18 01:27:30 -05:00
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"memory_checks.c"
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2020-11-05 23:00:07 -05:00
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"test_runner.c"
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"test_utils.c")
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if(CONFIG_IDF_TARGET_ESP32)
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2022-01-17 01:45:56 -05:00
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# ESP32's timer group doesn't have XTAL clock source,
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# so we can't implement a timekeeping that can work during DFS
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# but we can work around that by combining RMT and PCNT
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# where PCNT can count the pulses generated by RMT, and RMT is clocked from REF_TICK
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# REF_TICK won't be affected by DFS
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2020-11-05 23:00:07 -05:00
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list(APPEND srcs "ref_clock_impl_rmt_pcnt.c")
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else()
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list(APPEND srcs "ref_clock_impl_timergroup.c")
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endif()
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if(CONFIG_IDF_TARGET_ARCH_RISCV)
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list(APPEND srcs "ccomp_timer_impl_riscv.c")
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endif()
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if(CONFIG_IDF_TARGET_ARCH_XTENSA)
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list(APPEND srcs "ccomp_timer_impl_xtensa.c")
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endif()
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idf_component_register(SRCS ${srcs}
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2019-04-28 03:39:02 -04:00
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INCLUDE_DIRS include
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2019-09-02 23:49:58 -04:00
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PRIV_INCLUDE_DIRS private_include
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2022-10-14 08:15:32 -04:00
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REQUIRES esp_partition idf_test cmock
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2022-04-16 02:42:01 -04:00
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PRIV_REQUIRES perfmon driver esp_netif)
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2022-07-06 16:17:27 -04:00
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target_compile_options(${COMPONENT_LIB} PRIVATE "-Wno-format")
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