mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
82 lines
1.9 KiB
YAML
82 lines
1.9 KiB
YAML
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test cases:
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- CI ready: 'Yes'
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ID: SYS_MISC_0101
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SDK: |-
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8266_NonOS
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8266_RTOS
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ESP32_IDF
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Test App: SSC
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allow fail: ''
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auto test: 'Yes'
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category: Function
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cmd set:
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- ''
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- - SSC SSC1 reboot
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- - R SSC1 C !!!ready!!!
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execution time: 0.0
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expected result: 重启成功
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initial condition: None
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level: Integration
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module: System
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steps: 系统重启
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sub module: Misc
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summary: test reboot function
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test environment: SSC_T1_1
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test point 1: basic function
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test point 2: sw reboot
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version: v1 (2016-8-15)
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- CI ready: 'Yes'
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ID: SYS_MISC_0201
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SDK: |-
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8266_NonOS
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8266_RTOS
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ESP32_IDF
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Test App: SSC
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allow fail: ''
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auto test: 'Yes'
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category: Function
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cmd set:
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- ''
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- - SSC SSC1 ram -H
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- - R SSC1 RE FREEHEAP:\d+\r\n
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execution time: 0.0
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expected result: |2
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可以查询到一个数值
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initial condition: None
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level: Integration
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module: System
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steps: 查询空闲ram
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sub module: Misc
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summary: get heap size test
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test environment: SSC_T1_1
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test point 1: basic function
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test point 2: 'get heap size '
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version: v1 (2016-8-15)
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- CI ready: 'No'
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ID: SYS_MISC_5001
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SDK: |-
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8266_NonOS
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8266_RTOS
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Test App: SSC
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auto test: 'Yes'
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category: Stress
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cmd set: ''
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execution time: 12.0
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expected result: 4.target1正常运行,无异常
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initial condition: None
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level: Integration
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module: System
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steps: |-
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1.target1、target2通过UART与PC相连接
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2.target1的晶振为40MHz晶振,烧录SDK的时候选择26MHz晶振
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3.target2的GPIO PIN脚通过排线与target1的电源相连接,target1与target2 GND通过排线连接
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4.PC发送命令控制target2使GPIO不停的拉高拉低
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sub module: Misc
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summary: random reboot to confirm default init data bin will not overwrite user
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config
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test environment: SSC_T1_InitData
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test point 1: stress
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test point 2: reboot when using user defined init data bin
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version: v1 (2016-8-15)
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