2021-08-05 11:35:07 -04:00
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2016-12-07 08:30:21 -05:00
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/*
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2016-12-07 23:38:22 -05:00
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Tests for the interrupt allocator.
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2016-12-07 08:30:21 -05:00
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*/
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#include <stdio.h>
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2021-02-01 08:14:59 -05:00
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#include "esp_types.h"
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2020-07-21 01:07:34 -04:00
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#include "esp_rom_sys.h"
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2016-12-07 08:30:21 -05:00
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/queue.h"
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#include "unity.h"
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#include "esp_intr_alloc.h"
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2018-04-24 04:38:46 -04:00
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#include "driver/periph_ctrl.h"
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2016-12-07 08:30:21 -05:00
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#include "driver/timer.h"
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2021-02-01 08:14:59 -05:00
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#include "soc/soc_caps.h"
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#include "soc/spi_periph.h"
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#include "hal/spi_ll.h"
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2020-09-29 19:44:12 -04:00
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#include "sdkconfig.h"
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2016-12-07 08:30:21 -05:00
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2021-02-01 08:14:59 -05:00
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#define TIMER_DIVIDER (16) /*!< Hardware timer clock divider */
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#define TIMER_SCALE (APB_CLK_FREQ / TIMER_DIVIDER) /*!< used to calculate counter value */
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#define TIMER_INTERVAL0_SEC (3) /*!< test interval for timer 0 */
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#define TIMER_INTERVAL1_SEC (5) /*!< test interval for timer 1 */
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2016-12-07 08:30:21 -05:00
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2021-02-01 08:14:59 -05:00
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static void my_timer_init(int timer_group, int timer_idx, uint64_t alarm_value)
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2016-12-07 08:30:21 -05:00
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{
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2021-02-01 08:14:59 -05:00
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timer_config_t config = {
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.alarm_en = 1,
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.auto_reload = 1,
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.counter_dir = TIMER_COUNT_UP,
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.divider = TIMER_DIVIDER,
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};
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2016-12-07 08:30:21 -05:00
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/*Configure timer*/
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timer_init(timer_group, timer_idx, &config);
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/*Stop timer counter*/
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timer_pause(timer_group, timer_idx);
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/*Load counter value */
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2021-02-01 08:14:59 -05:00
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timer_set_counter_value(timer_group, timer_idx, 0);
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2016-12-07 08:30:21 -05:00
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/*Set alarm value*/
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2021-02-01 08:14:59 -05:00
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timer_set_alarm_value(timer_group, timer_idx, alarm_value);
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2016-12-07 08:30:21 -05:00
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/*Enable timer interrupt*/
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timer_enable_intr(timer_group, timer_idx);
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}
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2021-02-01 08:14:59 -05:00
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static volatile int count[SOC_TIMER_GROUP_TOTAL_TIMERS] = {0};
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2016-12-07 08:30:21 -05:00
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static void timer_isr(void *arg)
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{
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int timer_idx = (int)arg;
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2021-02-01 08:14:59 -05:00
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int group_id = timer_idx / SOC_TIMER_GROUP_TIMERS_PER_GROUP;
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int timer_id = timer_idx % SOC_TIMER_GROUP_TIMERS_PER_GROUP;
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2016-12-07 23:38:22 -05:00
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count[timer_idx]++;
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2021-02-01 08:14:59 -05:00
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timer_group_clr_intr_status_in_isr(group_id, timer_id);
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timer_group_enable_alarm_in_isr(group_id, timer_id);
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}
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static void timer_test(int flags)
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{
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timer_isr_handle_t inth[SOC_TIMER_GROUP_TOTAL_TIMERS];
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for (int i = 0; i < SOC_TIMER_GROUPS; i++) {
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for (int j = 0; j < SOC_TIMER_GROUP_TIMERS_PER_GROUP; j++) {
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my_timer_init(i, j, 100000 + 10000 * (i * SOC_TIMER_GROUP_TIMERS_PER_GROUP + j + 1));
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}
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2016-12-07 23:38:22 -05:00
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}
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2021-02-01 08:14:59 -05:00
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timer_isr_register(0, 0, timer_isr, (void *)0, flags | ESP_INTR_FLAG_INTRDISABLED, &inth[0]);
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printf("Interrupts allocated: %d (dis)\r\n", esp_intr_get_intno(inth[0]));
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for (int j = 1; j < SOC_TIMER_GROUP_TIMERS_PER_GROUP; j++) {
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timer_isr_register(0, j, timer_isr, (void *)1, flags, &inth[j]);
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printf("Interrupts allocated: %d\r\n", esp_intr_get_intno(inth[j]));
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2016-12-07 23:38:22 -05:00
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}
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2021-02-01 08:14:59 -05:00
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for (int i = 1; i < SOC_TIMER_GROUPS; i++) {
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for (int j = 0; j < SOC_TIMER_GROUP_TIMERS_PER_GROUP; j++) {
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timer_isr_register(i, j, timer_isr, (void *)(i * SOC_TIMER_GROUP_TIMERS_PER_GROUP + j), flags, &inth[i * SOC_TIMER_GROUP_TIMERS_PER_GROUP + j]);
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printf("Interrupts allocated: %d\r\n", esp_intr_get_intno(inth[i * SOC_TIMER_GROUP_TIMERS_PER_GROUP + j]));
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}
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2016-12-07 23:38:22 -05:00
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}
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2021-02-01 08:14:59 -05:00
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for (int i = 0; i < SOC_TIMER_GROUPS; i++) {
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for (int j = 0; j < SOC_TIMER_GROUP_TIMERS_PER_GROUP; j++) {
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timer_start(i, j);
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}
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2016-12-07 23:38:22 -05:00
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}
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2016-12-07 08:30:21 -05:00
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2021-02-01 08:14:59 -05:00
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printf("Timer values on start:");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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count[i] = 0;
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printf(" %d", count[i]);
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}
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printf("\r\n");
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2016-12-07 08:30:21 -05:00
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2022-11-04 02:01:22 -04:00
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if ((flags & ESP_INTR_FLAG_SHARED)) {
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/* Check that the allocated interrupts are acutally shared */
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int intr_num = esp_intr_get_intno(inth[0]);
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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TEST_ASSERT_EQUAL(intr_num, esp_intr_get_intno(inth[i]));
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}
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}
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2016-12-21 20:42:21 -05:00
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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2021-02-01 08:14:59 -05:00
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printf("Timer values after 1 sec:");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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printf(" %d", count[i]);
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}
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printf("\r\n");
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2016-12-07 23:04:26 -05:00
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2021-02-01 08:14:59 -05:00
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TEST_ASSERT(count[0] == 0);
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for (int i = 1; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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TEST_ASSERT(count[i] != 0);
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}
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2016-12-07 23:04:26 -05:00
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2021-02-01 08:14:59 -05:00
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printf("Disabling half of timers' interrupt...\r\n");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i++) {
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esp_intr_disable(inth[i]);
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}
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for (int i = SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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esp_intr_enable(inth[i]);
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}
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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count[i] = 0;
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}
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2016-12-07 23:04:26 -05:00
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2016-12-21 20:42:21 -05:00
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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2021-02-01 08:14:59 -05:00
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printf("Timer values after 1 sec:");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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printf(" %d", count[i]);
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}
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printf("\r\n");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i++) {
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TEST_ASSERT(count[i] == 0);
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}
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for (int i = SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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TEST_ASSERT(count[i] != 0);
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}
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2016-12-07 23:38:22 -05:00
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2021-02-01 08:14:59 -05:00
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printf("Disabling another half...\r\n");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i++) {
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esp_intr_enable(inth[i]);
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}
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for (int i = SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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esp_intr_disable(inth[i]);
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}
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for (int x = 0; x < SOC_TIMER_GROUP_TOTAL_TIMERS; x++) {
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count[x] = 0;
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}
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2016-12-21 20:42:21 -05:00
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vTaskDelay(1000 / portTICK_PERIOD_MS);
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2021-02-01 08:14:59 -05:00
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printf("Timer values after 1 sec:");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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printf(" %d", count[i]);
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}
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printf("\r\n");
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i++) {
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TEST_ASSERT(count[i] != 0);
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}
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for (int i = SOC_TIMER_GROUP_TOTAL_TIMERS / 2; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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TEST_ASSERT(count[i] == 0);
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}
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2016-12-07 23:38:22 -05:00
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printf("Done.\n");
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2021-02-01 08:14:59 -05:00
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for (int i = 0; i < SOC_TIMER_GROUP_TOTAL_TIMERS; i++) {
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esp_intr_free(inth[i]);
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}
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2016-12-07 23:04:26 -05:00
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}
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2016-12-07 08:30:21 -05:00
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2020-04-03 05:11:39 -04:00
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TEST_CASE("Intr_alloc test, private ints", "[intr_alloc]")
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2016-12-07 08:30:21 -05:00
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{
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2016-12-07 23:38:22 -05:00
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timer_test(0);
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2016-12-07 08:30:21 -05:00
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}
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2020-04-03 05:11:39 -04:00
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TEST_CASE("Intr_alloc test, shared ints", "[intr_alloc]")
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2016-12-07 08:30:21 -05:00
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{
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2016-12-07 23:38:22 -05:00
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timer_test(ESP_INTR_FLAG_SHARED);
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2016-12-07 08:30:21 -05:00
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}
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2017-01-10 12:14:18 -05:00
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2022-11-04 02:01:22 -04:00
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void static test_isr(void*arg)
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{
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/* ISR should never be called */
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abort();
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}
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TEST_CASE("Allocate previously freed interrupt, with different flags", "[intr_alloc]")
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{
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intr_handle_t intr;
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int test_intr_source = ETS_GPIO_INTR_SOURCE;
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int isr_flags = ESP_INTR_FLAG_LEVEL2;
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TEST_ESP_OK(esp_intr_alloc(test_intr_source, isr_flags, test_isr, NULL, &intr));
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TEST_ESP_OK(esp_intr_free(intr));
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isr_flags = ESP_INTR_FLAG_LEVEL3;
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TEST_ESP_OK(esp_intr_alloc(test_intr_source, isr_flags, test_isr, NULL, &intr));
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TEST_ESP_OK(esp_intr_free(intr));
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}
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2017-08-18 03:15:47 -04:00
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typedef struct {
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bool flag1;
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bool flag2;
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bool flag3;
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bool flag4;
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} intr_alloc_test_ctx_t;
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2021-02-01 08:14:59 -05:00
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void IRAM_ATTR int_handler1(void *arg)
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2017-08-18 03:15:47 -04:00
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{
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2021-02-01 08:14:59 -05:00
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intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
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2020-07-21 01:07:34 -04:00
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esp_rom_printf("handler 1 called.\n");
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2017-08-18 03:15:47 -04:00
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if ( ctx->flag1 ) {
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ctx->flag3 = true;
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} else {
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ctx->flag1 = true;
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}
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2020-09-29 19:44:12 -04:00
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2021-02-01 08:14:59 -05:00
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#ifdef CONFIG_IDF_TARGET_ESP32
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spi_ll_clear_int_stat(&SPI2);
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#else
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spi_ll_clear_int_stat(&GPSPI2);
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#endif
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2017-08-18 03:15:47 -04:00
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}
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2021-02-01 08:14:59 -05:00
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void IRAM_ATTR int_handler2(void *arg)
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2017-08-18 03:15:47 -04:00
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{
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2021-02-01 08:14:59 -05:00
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intr_alloc_test_ctx_t *ctx = (intr_alloc_test_ctx_t *)arg;
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2020-07-21 01:07:34 -04:00
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esp_rom_printf("handler 2 called.\n");
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2017-08-18 03:15:47 -04:00
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if ( ctx->flag2 ) {
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ctx->flag4 = true;
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} else {
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ctx->flag2 = true;
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}
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}
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2021-02-01 08:14:59 -05:00
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TEST_CASE("allocate 2 handlers for a same source and remove the later one", "[intr_alloc]")
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2017-08-18 03:15:47 -04:00
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{
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intr_alloc_test_ctx_t ctx = {false, false, false, false };
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intr_handle_t handle1, handle2;
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2020-11-10 02:40:01 -05:00
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2021-02-01 08:14:59 -05:00
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// enable SPI2
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periph_module_enable(spi_periph_signal[1].module);
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2017-08-18 03:15:47 -04:00
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esp_err_t r;
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2021-02-01 08:14:59 -05:00
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r = esp_intr_alloc(spi_periph_signal[1].irq, ESP_INTR_FLAG_SHARED, int_handler1, &ctx, &handle1);
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2017-08-18 03:15:47 -04:00
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TEST_ESP_OK(r);
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//try an invalid assign first
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2021-02-01 08:14:59 -05:00
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r = esp_intr_alloc(spi_periph_signal[1].irq, 0, int_handler2, NULL, &handle2);
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TEST_ASSERT_EQUAL_INT(ESP_ERR_NOT_FOUND, r);
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2017-08-18 03:15:47 -04:00
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//assign shared then
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2021-02-01 08:14:59 -05:00
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r = esp_intr_alloc(spi_periph_signal[1].irq, ESP_INTR_FLAG_SHARED, int_handler2, &ctx, &handle2);
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2017-08-18 03:15:47 -04:00
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TEST_ESP_OK(r);
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2020-09-29 19:44:12 -04:00
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2021-02-01 08:14:59 -05:00
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#ifdef CONFIG_IDF_TARGET_ESP32
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spi_ll_enable_int(&SPI2);
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#else
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spi_ll_enable_int(&GPSPI2);
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#endif
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2019-07-24 11:18:19 -04:00
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2017-08-18 03:15:47 -04:00
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printf("trigger first time.\n");
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2020-09-29 19:44:12 -04:00
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2021-02-01 08:14:59 -05:00
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#ifdef CONFIG_IDF_TARGET_ESP32
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spi_ll_set_int_stat(&SPI2);
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#else
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spi_ll_set_int_stat(&GPSPI2);
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#endif
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2017-08-18 03:15:47 -04:00
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vTaskDelay(100);
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TEST_ASSERT( ctx.flag1 && ctx.flag2 );
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printf("remove intr 1.\n");
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2021-02-01 08:14:59 -05:00
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r = esp_intr_free(handle2);
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2017-08-18 03:15:47 -04:00
|
|
|
|
|
|
|
printf("trigger second time.\n");
|
2020-11-10 02:40:01 -05:00
|
|
|
|
2021-02-01 08:14:59 -05:00
|
|
|
#ifdef CONFIG_IDF_TARGET_ESP32
|
|
|
|
spi_ll_set_int_stat(&SPI2);
|
|
|
|
#else
|
|
|
|
spi_ll_set_int_stat(&GPSPI2);
|
|
|
|
#endif
|
2017-08-18 03:15:47 -04:00
|
|
|
|
|
|
|
vTaskDelay(500);
|
|
|
|
TEST_ASSERT( ctx.flag3 && !ctx.flag4 );
|
|
|
|
printf("test passed.\n");
|
2021-02-01 08:14:59 -05:00
|
|
|
esp_intr_free(handle1);
|
2017-08-18 03:15:47 -04:00
|
|
|
}
|
2018-09-20 00:13:43 -04:00
|
|
|
|
2021-02-01 08:14:59 -05:00
|
|
|
static void dummy(void *arg)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
static IRAM_ATTR void dummy_iram(void *arg)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
static RTC_IRAM_ATTR void dummy_rtc(void *arg)
|
|
|
|
{
|
|
|
|
}
|
2020-09-29 19:44:12 -04:00
|
|
|
|
2021-02-01 08:14:59 -05:00
|
|
|
TEST_CASE("Can allocate IRAM int only with an IRAM handler", "[intr_alloc]")
|
|
|
|
{
|
|
|
|
intr_handle_t ih;
|
|
|
|
esp_err_t err = esp_intr_alloc(spi_periph_signal[1].irq,
|
|
|
|
ESP_INTR_FLAG_IRAM, &dummy, NULL, &ih);
|
|
|
|
TEST_ASSERT_EQUAL_INT(ESP_ERR_INVALID_ARG, err);
|
|
|
|
err = esp_intr_alloc(spi_periph_signal[1].irq,
|
|
|
|
ESP_INTR_FLAG_IRAM, &dummy_iram, NULL, &ih);
|
|
|
|
TEST_ESP_OK(err);
|
|
|
|
err = esp_intr_free(ih);
|
|
|
|
TEST_ESP_OK(err);
|
|
|
|
err = esp_intr_alloc(spi_periph_signal[1].irq,
|
|
|
|
ESP_INTR_FLAG_IRAM, &dummy_rtc, NULL, &ih);
|
|
|
|
TEST_ESP_OK(err);
|
|
|
|
err = esp_intr_free(ih);
|
|
|
|
TEST_ESP_OK(err);
|
|
|
|
}
|
2018-09-20 00:13:43 -04:00
|
|
|
|
2021-02-01 08:14:59 -05:00
|
|
|
#ifndef CONFIG_FREERTOS_UNICORE
|
2018-09-20 00:13:43 -04:00
|
|
|
void isr_free_task(void *param)
|
|
|
|
{
|
|
|
|
esp_err_t ret = ESP_FAIL;
|
|
|
|
intr_handle_t *test_handle = (intr_handle_t *)param;
|
2021-02-01 08:14:59 -05:00
|
|
|
if (*test_handle != NULL) {
|
2018-09-20 00:13:43 -04:00
|
|
|
ret = esp_intr_free(*test_handle);
|
2021-02-01 08:14:59 -05:00
|
|
|
if (ret == ESP_OK) {
|
2018-09-20 00:13:43 -04:00
|
|
|
*test_handle = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
vTaskDelete(NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
void isr_alloc_free_test(void)
|
|
|
|
{
|
|
|
|
intr_handle_t test_handle = NULL;
|
2021-02-01 08:14:59 -05:00
|
|
|
esp_err_t ret = esp_intr_alloc(spi_periph_signal[1].irq, 0, int_handler1, NULL, &test_handle);
|
|
|
|
if (ret != ESP_OK) {
|
2018-09-20 00:13:43 -04:00
|
|
|
printf("alloc isr handle fail\n");
|
|
|
|
} else {
|
2021-02-01 08:14:59 -05:00
|
|
|
printf("alloc isr handle on core %d\n", esp_intr_get_cpu(test_handle));
|
2018-09-20 00:13:43 -04:00
|
|
|
}
|
|
|
|
TEST_ASSERT(ret == ESP_OK);
|
2021-02-01 08:14:59 -05:00
|
|
|
xTaskCreatePinnedToCore(isr_free_task, "isr_free_task", 1024 * 2, (void *)&test_handle, 10, NULL, !xPortGetCoreID());
|
|
|
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
2018-09-20 00:13:43 -04:00
|
|
|
TEST_ASSERT(test_handle == NULL);
|
|
|
|
printf("test passed\n");
|
|
|
|
}
|
|
|
|
|
2020-04-03 05:11:39 -04:00
|
|
|
TEST_CASE("alloc and free isr handle on different core", "[intr_alloc]")
|
2018-09-20 00:13:43 -04:00
|
|
|
{
|
|
|
|
isr_alloc_free_test();
|
|
|
|
}
|
2019-05-13 06:02:45 -04:00
|
|
|
#endif
|
2021-02-01 08:14:59 -05:00
|
|
|
|
|
|
|
#if __XTENSA__
|
|
|
|
static volatile int int_timer_ctr;
|
|
|
|
|
|
|
|
void int_timer_handler(void *arg)
|
|
|
|
{
|
|
|
|
xthal_set_ccompare(1, xthal_get_ccount() + 8000000);
|
|
|
|
int_timer_ctr++;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void local_timer_test(void)
|
|
|
|
{
|
|
|
|
intr_handle_t ih;
|
|
|
|
esp_err_t r;
|
|
|
|
r = esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, 0, int_timer_handler, NULL, &ih);
|
|
|
|
TEST_ASSERT(r == ESP_OK);
|
|
|
|
printf("Int timer 1 intno %d\n", esp_intr_get_intno(ih));
|
|
|
|
xthal_set_ccompare(1, xthal_get_ccount() + 8000000);
|
|
|
|
int_timer_ctr = 0;
|
|
|
|
vTaskDelay(1000 / portTICK_PERIOD_MS);
|
|
|
|
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
|
|
|
TEST_ASSERT(int_timer_ctr != 0);
|
|
|
|
printf("Disabling int\n");
|
|
|
|
esp_intr_disable(ih);
|
|
|
|
int_timer_ctr = 0;
|
|
|
|
vTaskDelay(1000 / portTICK_PERIOD_MS);
|
|
|
|
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
|
|
|
TEST_ASSERT(int_timer_ctr == 0);
|
|
|
|
printf("Re-enabling\n");
|
|
|
|
esp_intr_enable(ih);
|
|
|
|
vTaskDelay(1000 / portTICK_PERIOD_MS);
|
|
|
|
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
|
|
|
TEST_ASSERT(int_timer_ctr != 0);
|
|
|
|
|
|
|
|
printf("Free int, re-alloc disabled\n");
|
|
|
|
r = esp_intr_free(ih);
|
|
|
|
TEST_ASSERT(r == ESP_OK);
|
|
|
|
r = esp_intr_alloc(ETS_INTERNAL_TIMER1_INTR_SOURCE, ESP_INTR_FLAG_INTRDISABLED, int_timer_handler, NULL, &ih);
|
|
|
|
TEST_ASSERT(r == ESP_OK);
|
|
|
|
int_timer_ctr = 0;
|
|
|
|
vTaskDelay(1000 / portTICK_PERIOD_MS);
|
|
|
|
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
|
|
|
TEST_ASSERT(int_timer_ctr == 0);
|
|
|
|
printf("Re-enabling\n");
|
|
|
|
esp_intr_enable(ih);
|
|
|
|
vTaskDelay(1000 / portTICK_PERIOD_MS);
|
|
|
|
printf("Timer val after 1 sec: %d\n", int_timer_ctr);
|
|
|
|
TEST_ASSERT(int_timer_ctr != 0);
|
|
|
|
r = esp_intr_free(ih);
|
|
|
|
TEST_ASSERT(r == ESP_OK);
|
|
|
|
printf("Done.\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
TEST_CASE("Intr_alloc test, CPU-local int source", "[intr_alloc]")
|
|
|
|
{
|
|
|
|
local_timer_test();
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif // #if __XTENSA__
|