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24 lines
608 B
Plaintext
24 lines
608 B
Plaintext
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# This example supports running on the SPI1 bus, which is shared with SPI flash accessed by the
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# cache. When doing transaction on SPI1 bus, data cannot be fetched from the flash, so all the data
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# used during this time should be put into the internal RAM.
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[mapping:eeprom]
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archive: libeeprom.a
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entries:
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* (noflash)
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[mapping:ext_driver]
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archive: libdriver.a
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entries:
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# gpio_set_level, gpio_get_level, gpio_context, _gpio_hal, etc...
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gpio (noflash)
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[mapping:ext_soc]
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archive: libsoc.a
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entries:
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gpio_hal (noflash)
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[mapping:ext_newlib]
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archive: libnewlib.a
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entries:
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time:usleep (noflash)
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