2022-07-13 06:41:55 -04:00
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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2017-08-07 16:21:19 -04:00
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#include <stdio.h>
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#include <stdlib.h>
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2022-10-24 08:35:32 -04:00
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#include <inttypes.h>
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2017-08-07 16:21:19 -04:00
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#include <time.h>
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#include <sys/time.h>
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#include "unity.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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2022-06-27 03:24:07 -04:00
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#include "spi_flash_mmap.h"
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2020-11-26 03:56:13 -05:00
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#include "esp_rom_sys.h"
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#include "esp_private/spi_flash_os.h"
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2020-02-06 01:00:18 -05:00
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#if CONFIG_IDF_TARGET_ESP32
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2020-07-21 01:07:34 -04:00
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#include "esp32/rom/ets_sys.h" // for ETSTimer type
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2020-02-06 01:00:18 -05:00
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/ets_sys.h"
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2020-08-13 23:36:58 -04:00
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#elif CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/ets_sys.h"
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2020-11-26 03:56:13 -05:00
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#elif CONFIG_IDF_TARGET_ESP32C3
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#include "esp32c3/rom/ets_sys.h"
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2022-10-19 03:57:24 -04:00
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#elif CONFIG_IDF_TARGET_ESP32H4
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#include "esp32h4/rom/ets_sys.h"
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2022-05-20 06:16:47 -04:00
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#elif CONFIG_IDF_TARGET_ESP32C2
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#include "esp32c2/rom/ets_sys.h"
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2022-07-12 08:44:58 -04:00
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#elif CONFIG_IDF_TARGET_ESP32C6
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#include "esp32c6/rom/ets_sys.h"
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#endif
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2017-08-07 16:21:19 -04:00
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2021-09-01 20:45:19 -04:00
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static void test_correct_delay_timer_func(void* arg)
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{
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struct timeval* ptv = (struct timeval*) arg;
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gettimeofday(ptv, NULL);
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}
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2017-08-07 16:21:19 -04:00
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2021-09-01 20:45:19 -04:00
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TEST_CASE("ets_timer produces correct delay", "[ets_timer]")
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{
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2017-08-07 16:21:19 -04:00
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ETSTimer timer1 = {0};
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const int delays_ms[] = {20, 100, 200, 250};
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const size_t delays_count = sizeof(delays_ms) / sizeof(delays_ms[0]);
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for (size_t i = 0; i < delays_count; ++i) {
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struct timeval tv_end = {0};
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2021-09-01 20:45:19 -04:00
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ets_timer_setfn(&timer1, &test_correct_delay_timer_func, &tv_end);
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2017-08-07 16:21:19 -04:00
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struct timeval tv_start;
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gettimeofday(&tv_start, NULL);
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ets_timer_arm(&timer1, delays_ms[i], false);
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vTaskDelay(delays_ms[i] * 2 / portTICK_PERIOD_MS);
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int32_t ms_diff = (tv_end.tv_sec - tv_start.tv_sec) * 1000 +
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(tv_end.tv_usec - tv_start.tv_usec) / 1000;
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printf("%d %"PRIi32"\n", delays_ms[i], ms_diff);
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2017-08-07 16:21:19 -04:00
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TEST_ASSERT_INT32_WITHIN(portTICK_PERIOD_MS, delays_ms[i], ms_diff);
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}
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ets_timer_disarm(&timer1);
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ets_timer_done(&timer1);
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}
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2021-09-01 20:45:19 -04:00
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// no, we can't make this a const size_t (§6.7.5.2)
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#define NUM_INTERVALS 16
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typedef struct {
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ETSTimer *timer;
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size_t cur_interval;
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int intervals[NUM_INTERVALS];
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struct timeval tv_start;
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} test_periodic_correct_delays_args_t;
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static void test_periodic_correct_delays_timer_func(void* arg)
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{
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test_periodic_correct_delays_args_t *p_args = (test_periodic_correct_delays_args_t *) arg;
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struct timeval tv_now;
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gettimeofday(&tv_now, NULL);
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int32_t ms_diff = (tv_now.tv_sec - p_args->tv_start.tv_sec) * 1000 +
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(tv_now.tv_usec - p_args->tv_start.tv_usec) / 1000;
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printf("timer #%d %"PRIi32"ms\n", p_args->cur_interval, ms_diff);
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p_args->intervals[p_args->cur_interval++] = ms_diff;
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// Deliberately make timer handler run longer.
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// We check that this doesn't affect the result.
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esp_rom_delay_us(10 * 1000);
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if (p_args->cur_interval == NUM_INTERVALS) {
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printf("done\n");
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ets_timer_disarm(p_args->timer);
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}
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2021-09-01 20:45:19 -04:00
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}
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2017-08-07 16:21:19 -04:00
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2021-09-01 20:45:19 -04:00
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TEST_CASE("periodic ets_timer produces correct delays", "[ets_timer]")
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{
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const int delay_ms = 100;
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ETSTimer timer1 = {0};
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test_periodic_correct_delays_args_t args = {0};
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2017-08-07 16:21:19 -04:00
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args.timer = &timer1;
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gettimeofday(&args.tv_start, NULL);
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ets_timer_setfn(&timer1, &test_periodic_correct_delays_timer_func, &args);
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2017-08-07 16:21:19 -04:00
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ets_timer_arm(&timer1, delay_ms, true);
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vTaskDelay(delay_ms * (NUM_INTERVALS + 1));
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TEST_ASSERT_EQUAL_UINT32(NUM_INTERVALS, args.cur_interval);
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for (size_t i = 0; i < NUM_INTERVALS; ++i) {
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TEST_ASSERT_INT32_WITHIN(portTICK_PERIOD_MS, (i + 1) * delay_ms, args.intervals[i]);
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}
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2020-11-13 03:46:21 -05:00
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ets_timer_done(&timer1);
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}
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#undef NUM_INTERVALS
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#define N 5
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2021-09-01 20:45:19 -04:00
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typedef struct {
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const int order[N * 3];
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size_t count;
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} test_timers_ordered_correctly_common_t;
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typedef struct {
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int timer_index;
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const int intervals[N];
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size_t intervals_count;
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ETSTimer* timer;
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test_timers_ordered_correctly_common_t* common;
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bool pass;
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SemaphoreHandle_t done;
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} test_timers_ordered_correctly_args_t;
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static void test_timers_ordered_correctly_timer_func(void* arg)
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{
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test_timers_ordered_correctly_args_t* p_args = (test_timers_ordered_correctly_args_t*) arg;
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// check order
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size_t count = p_args->common->count;
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int expected_index = p_args->common->order[count];
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printf("At count %d, expected timer %d, got timer %d\n",
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count, expected_index, p_args->timer_index);
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if (expected_index != p_args->timer_index) {
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p_args->pass = false;
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ets_timer_disarm(p_args->timer);
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xSemaphoreGive(p_args->done);
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return;
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}
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p_args->common->count++;
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if (++p_args->intervals_count == N) {
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ets_timer_disarm(p_args->timer);
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xSemaphoreGive(p_args->done);
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return;
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}
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int next_interval = p_args->intervals[p_args->intervals_count];
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printf("timer %d interval #%d, %d ms\n",
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p_args->timer_index, p_args->intervals_count, next_interval);
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ets_timer_arm(p_args->timer, next_interval, false);
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}
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2017-08-07 16:21:19 -04:00
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2021-09-01 20:45:19 -04:00
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TEST_CASE("multiple ETSTimers are ordered correctly", "[ets_timer]")
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{
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ETSTimer timer1;
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ETSTimer timer2;
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ETSTimer timer3;
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2021-09-01 20:45:19 -04:00
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test_timers_ordered_correctly_common_t common = {
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.order = {1, 2, 3, 2, 1, 3, 1, 2, 1, 3, 2, 1, 3, 3, 2},
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.count = 0
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};
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SemaphoreHandle_t done = xSemaphoreCreateCounting(3, 0);
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2021-09-01 20:45:19 -04:00
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test_timers_ordered_correctly_args_t args1 = {
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.timer_index = 1,
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.intervals = {10, 40, 20, 40, 30},
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.timer = &timer1,
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.common = &common,
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.pass = true,
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.done = done
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};
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2021-09-01 20:45:19 -04:00
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test_timers_ordered_correctly_args_t args2 = {
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.timer_index = 2,
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.intervals = {20, 20, 60, 30, 40},
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.timer = &timer2,
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.common = &common,
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.pass = true,
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.done = done
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};
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2021-09-01 20:45:19 -04:00
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test_timers_ordered_correctly_args_t args3 = {
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2017-08-07 16:21:19 -04:00
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.timer_index = 3,
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.intervals = {30, 30, 60, 30, 10},
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.timer = &timer3,
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.common = &common,
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.pass = true,
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.done = done
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};
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2021-09-01 20:45:19 -04:00
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ets_timer_setfn(&timer1, &test_timers_ordered_correctly_timer_func, &args1);
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ets_timer_setfn(&timer2, &test_timers_ordered_correctly_timer_func, &args2);
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ets_timer_setfn(&timer3, &test_timers_ordered_correctly_timer_func, &args3);
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2017-08-07 16:21:19 -04:00
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ets_timer_arm(&timer1, args1.intervals[0], false);
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ets_timer_arm(&timer2, args2.intervals[0], false);
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ets_timer_arm(&timer3, args3.intervals[0], false);
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for (int i = 0; i < 3; ++i) {
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int result = xSemaphoreTake(done, 180 / portTICK_PERIOD_MS);
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TEST_ASSERT_TRUE(result == pdPASS);
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}
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TEST_ASSERT_TRUE(args1.pass);
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TEST_ASSERT_TRUE(args2.pass);
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TEST_ASSERT_TRUE(args3.pass);
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2020-11-13 03:46:21 -05:00
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ets_timer_done(&timer1);
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ets_timer_done(&timer2);
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ets_timer_done(&timer3);
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}
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2017-08-07 16:21:19 -04:00
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#undef N
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static void IRAM_ATTR test_iram_timer_func(void* arg)
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{
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volatile bool *b = (volatile bool *)arg;
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*b = true;
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2017-08-07 16:21:19 -04:00
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}
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2017-10-16 07:16:20 -04:00
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/* WiFi/BT coexistence will sometimes arm/disarm
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timers from an ISR where flash may be disabled. */
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IRAM_ATTR TEST_CASE("ETSTimers arm & disarm run from IRAM", "[ets_timer]")
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{
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volatile bool flag = false;
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ETSTimer timer1;
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const int INTERVAL = 5;
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2021-09-01 20:45:19 -04:00
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ets_timer_setfn(&timer1, &test_iram_timer_func, (void *)&flag);
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2017-10-16 07:16:20 -04:00
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/* arm a disabled timer, then disarm a live timer */
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2017-11-16 23:00:51 -05:00
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spi_flash_guard_get()->start(); // Disables flash cache
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2017-10-16 07:16:20 -04:00
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ets_timer_arm(&timer1, INTERVAL, false);
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// redundant call is deliberate (test code path if already armed)
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ets_timer_arm(&timer1, INTERVAL, false);
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ets_timer_disarm(&timer1);
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2017-11-16 23:00:51 -05:00
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spi_flash_guard_get()->end(); // Re-enables flash cache
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2017-10-16 07:16:20 -04:00
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TEST_ASSERT_FALSE(flag); // didn't expire yet
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/* do the same thing but wait for the timer to expire */
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2017-11-16 23:00:51 -05:00
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spi_flash_guard_get()->start();
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2017-10-16 07:16:20 -04:00
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ets_timer_arm(&timer1, INTERVAL, false);
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2017-11-16 23:00:51 -05:00
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spi_flash_guard_get()->end();
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2017-10-16 07:16:20 -04:00
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vTaskDelay(2 * INTERVAL / portTICK_PERIOD_MS);
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TEST_ASSERT_TRUE(flag);
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2017-11-16 23:00:51 -05:00
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spi_flash_guard_get()->start();
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2017-10-16 07:16:20 -04:00
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ets_timer_disarm(&timer1);
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2017-11-16 23:00:51 -05:00
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spi_flash_guard_get()->end();
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2020-11-13 03:46:21 -05:00
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ets_timer_done(&timer1);
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2017-10-16 07:16:20 -04:00
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}
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