2023-03-01 06:50:45 -05:00
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/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <inttypes.h>
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#include "sdkconfig.h"
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2023-03-13 00:34:53 -04:00
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#if CONFIG_ANA_CMPR_ENABLE_DEBUG_LOG
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// The local log level must be defined before including esp_log.h
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// Set the maximum log level for this source file
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#define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
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#endif
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#include "freertos/FreeRTOS.h"
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2023-04-23 03:49:59 -04:00
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#include "esp_clk_tree.h"
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2023-03-01 06:50:45 -05:00
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#include "esp_types.h"
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#include "esp_attr.h"
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#include "esp_check.h"
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#include "esp_pm.h"
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#include "esp_heap_caps.h"
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#include "esp_intr_alloc.h"
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#include "esp_memory_utils.h"
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#include "soc/periph_defs.h"
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#include "soc/ana_cmpr_periph.h"
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#include "hal/ana_cmpr_ll.h"
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#include "driver/ana_cmpr.h"
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#include "driver/gpio.h"
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#include "esp_private/io_mux.h"
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#include "esp_private/esp_clk.h"
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struct ana_cmpr_t {
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ana_cmpr_unit_t unit; /*!< Analog comparator unit id */
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analog_cmpr_dev_t *dev; /*!< Analog comparator unit device address */
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ana_cmpr_ref_source_t ref_src; /*!< Analog comparator reference source, internal or external */
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bool is_enabled; /*!< Whether the Analog comparator unit is enabled */
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ana_cmpr_event_callbacks_t cbs; /*!< The callback group that set by user */
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intr_handle_t intr_handle; /*!< Interrupt handle */
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uint32_t intr_mask; /*!< Interrupt mask */
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int intr_priority; /*!< Interrupt priority */
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void *user_data; /*!< User data that passed to the callbacks */
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uint32_t src_clk_freq_hz; /*!< Source clock frequency of the Analog Comparator unit */
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esp_pm_lock_handle_t pm_lock; /*!< The Power Management lock that used to avoid unexpected power down of the clock domain */
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};
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/* Helper macros */
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#define ANA_CMPR_NULL_POINTER_CHECK(p) ESP_RETURN_ON_FALSE((p), ESP_ERR_INVALID_ARG, TAG, "input parameter '"#p"' is NULL")
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#define ANA_CMPR_NULL_POINTER_CHECK_ISR(p) ESP_RETURN_ON_FALSE_ISR((p), ESP_ERR_INVALID_ARG, TAG, "input parameter '"#p"' is NULL")
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#define ANA_CMPR_UNIT_CHECK(unit) ESP_RETURN_ON_FALSE((unit) >= 0 && (unit) < SOC_ANA_CMPR_NUM, \
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ESP_ERR_INVALID_ARG, TAG, "invalid uint number");
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/* Memory allocation caps which decide the section that memory supposed to allocate */
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#if CONFIG_ANA_CMPR_ISR_IRAM_SAFE
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#define ANA_CMPR_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
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#define ANA_CMPR_INTR_FLAG (ESP_INTR_FLAG_IRAM)
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#else
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#define ANA_CMPR_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
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#define ANA_CMPR_INTR_FLAG (0)
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#endif
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/* Driver tag */
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static const char *TAG = "ana_cmpr";
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/* Global static object of the Analog Comparator unit */
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static ana_cmpr_handle_t s_ana_cmpr[SOC_ANA_CMPR_NUM] = {
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[0 ...(SOC_ANA_CMPR_NUM - 1)] = NULL,
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};
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/* Global spin lock */
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static portMUX_TYPE s_spinlock = portMUX_INITIALIZER_UNLOCKED;
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static void IRAM_ATTR s_ana_cmpr_default_intr_handler(void *usr_data)
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{
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ana_cmpr_handle_t cmpr_handle = (ana_cmpr_handle_t)usr_data;
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bool need_yield = false;
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ana_cmpr_cross_event_data_t evt_data = {.cross_type = ANA_CMPR_CROSS_ANY};
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/* Get and clear the interrupt status */
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uint32_t status = analog_cmpr_ll_get_intr_status(cmpr_handle->dev);
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analog_cmpr_ll_clear_intr(cmpr_handle->dev, status);
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/* Call the user callback function if it is specified and the corresponding event triggers*/
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if (cmpr_handle->cbs.on_cross && (status & cmpr_handle->intr_mask)) {
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#if SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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if (status & ANALOG_CMPR_LL_POS_CROSS_MASK(cmpr_handle->unit)) {
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evt_data.cross_type = ANA_CMPR_CROSS_POS;
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} else if (status & ANALOG_CMPR_LL_NEG_CROSS_MASK(cmpr_handle->unit)) {
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evt_data.cross_type = ANA_CMPR_CROSS_NEG;
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}
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#endif // SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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need_yield = cmpr_handle->cbs.on_cross(cmpr_handle, &evt_data, cmpr_handle->user_data);
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}
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if (need_yield) {
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portYIELD_FROM_ISR();
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}
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}
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2023-07-30 22:43:54 -04:00
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static esp_err_t s_ana_cmpr_init_gpio(ana_cmpr_handle_t cmpr, bool is_external_ref)
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{
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uint64_t pin_mask = BIT64(ana_cmpr_periph[cmpr->unit].src_gpio);
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if (is_external_ref) {
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pin_mask |= BIT64(ana_cmpr_periph[cmpr->unit].ext_ref_gpio);
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}
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gpio_config_t ana_cmpr_gpio_cfg = {
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.pin_bit_mask = pin_mask,
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.mode = GPIO_MODE_DISABLE,
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.pull_up_en = GPIO_PULLUP_DISABLE,
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.pull_down_en = GPIO_PULLDOWN_DISABLE,
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.intr_type = GPIO_INTR_DISABLE,
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};
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return gpio_config(&ana_cmpr_gpio_cfg);
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}
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2023-03-01 06:50:45 -05:00
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esp_err_t ana_cmpr_new_unit(const ana_cmpr_config_t *config, ana_cmpr_handle_t *ret_cmpr)
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{
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#if CONFIG_ANA_CMPR_ENABLE_DEBUG_LOG
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esp_log_level_set(TAG, ESP_LOG_DEBUG);
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#endif
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ANA_CMPR_NULL_POINTER_CHECK(config);
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ANA_CMPR_NULL_POINTER_CHECK(ret_cmpr);
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ana_cmpr_unit_t unit = config->unit;
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ANA_CMPR_UNIT_CHECK(unit);
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ESP_RETURN_ON_FALSE(config->intr_priority >= 0 && config->intr_priority <= 7, ESP_ERR_INVALID_ARG, TAG, "interrupt priority should be within 0~7");
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ESP_RETURN_ON_FALSE(!s_ana_cmpr[unit], ESP_ERR_INVALID_STATE, TAG,
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"unit has been allocated already");
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esp_err_t ret = ESP_OK;
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/* Allocate analog comparator unit */
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s_ana_cmpr[unit] = (ana_cmpr_handle_t)heap_caps_calloc(1, sizeof(struct ana_cmpr_t), ANA_CMPR_MEM_ALLOC_CAPS);
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ESP_RETURN_ON_FALSE(s_ana_cmpr[unit], ESP_ERR_NO_MEM, TAG, "no memory for analog comparator struct");
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/* Assign analog comparator unit */
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s_ana_cmpr[unit]->dev = ANALOG_CMPR_LL_GET_HW(unit);
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s_ana_cmpr[unit]->ref_src = config->ref_src;
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s_ana_cmpr[unit]->intr_priority = config->intr_priority;
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s_ana_cmpr[unit]->is_enabled = false;
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s_ana_cmpr[unit]->pm_lock = NULL;
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#if CONFIG_PM_ENABLE
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/* Create PM lock */
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char lock_name[10] = "ana_cmpr\0";
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lock_name[8] = '0' + unit;
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ret = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, lock_name, &s_ana_cmpr[unit]->pm_lock);
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ESP_GOTO_ON_ERROR(ret, err, TAG, "create NO_LIGHT_SLEEP, lock failed");
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#endif
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2023-07-30 22:43:54 -04:00
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if (!config->flags.io_loop_back) {
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ESP_GOTO_ON_ERROR(s_ana_cmpr_init_gpio(s_ana_cmpr[unit], config->ref_src == ANA_CMPR_REF_SRC_EXTERNAL), err, TAG, "failed to initialize GPIO");
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}
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2023-03-01 06:50:45 -05:00
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/* Analog clock comes from IO MUX, but IO MUX clock might be shared with other submodules as well */
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2023-04-23 03:49:59 -04:00
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ESP_GOTO_ON_ERROR(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)config->clk_src,
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ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED,
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&s_ana_cmpr[unit]->src_clk_freq_hz),
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err, TAG, "get source clock frequency failed");
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2023-03-13 00:34:53 -04:00
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ESP_GOTO_ON_ERROR(io_mux_set_clock_source((soc_module_clk_t)(config->clk_src)), err, TAG,
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"potential clock source conflicts from other IOMUX peripherals");
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2023-03-01 06:50:45 -05:00
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/* Configure the register */
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portENTER_CRITICAL(&s_spinlock);
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analog_cmpr_ll_set_ref_source(s_ana_cmpr[unit]->dev, config->ref_src);
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#if !SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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analog_cmpr_ll_set_cross_type(s_ana_cmpr[unit]->dev, config->cross_type);
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#endif // SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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/* Record the interrupt mask, the interrupt will be lazy installed when register the callbacks */
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s_ana_cmpr[unit]->intr_mask = analog_cmpr_ll_get_intr_mask_by_type(s_ana_cmpr[unit]->dev, config->cross_type);
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portEXIT_CRITICAL(&s_spinlock);
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if (config->ref_src == ANA_CMPR_REF_SRC_INTERNAL) {
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ESP_LOGD(TAG, "unit %d allocated, source signal: GPIO %d, reference signal: internal",
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(int)unit, ana_cmpr_periph[unit].src_gpio);
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} else {
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ESP_LOGD(TAG, "unit %d allocated, source signal: GPIO %d, reference signal: GPIO %d",
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(int)unit, ana_cmpr_periph[unit].src_gpio, ana_cmpr_periph[unit].ext_ref_gpio);
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}
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*ret_cmpr = s_ana_cmpr[unit];
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return ESP_OK;
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err:
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/* Delete the unit if allocation failed */
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ana_cmpr_del_unit(s_ana_cmpr[unit]);
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2023-03-01 06:50:45 -05:00
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return ret;
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}
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esp_err_t ana_cmpr_del_unit(ana_cmpr_handle_t cmpr)
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{
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ANA_CMPR_NULL_POINTER_CHECK(cmpr);
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/* Search the global object array to check if the input handle is valid */
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int unit = -1;
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for (int i = 0; i < SOC_ANA_CMPR_NUM; i++) {
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if (s_ana_cmpr[i] == cmpr) {
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unit = i;
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break;
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}
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}
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2023-04-28 02:52:50 -04:00
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ESP_RETURN_ON_FALSE(unit != -1, ESP_ERR_INVALID_ARG, TAG, "wrong analog comparator handle");
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2023-03-01 06:50:45 -05:00
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ESP_RETURN_ON_FALSE(!cmpr->is_enabled, ESP_ERR_INVALID_STATE, TAG, "this analog comparator unit not disabled yet");
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/* Delete the pm lock if the unit has */
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if (cmpr->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_delete(cmpr->pm_lock), TAG, "delete pm lock failed");
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}
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/* Free interrupt and other resources */
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2023-03-13 00:34:53 -04:00
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if (cmpr->intr_handle) {
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esp_intr_free(cmpr->intr_handle);
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}
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2023-03-01 06:50:45 -05:00
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free(s_ana_cmpr[unit]);
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s_ana_cmpr[unit] = NULL;
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ESP_LOGD(TAG, "unit %d deleted", (int)unit);
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return ESP_OK;
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}
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2023-03-13 00:34:53 -04:00
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esp_err_t ana_cmpr_set_internal_reference(ana_cmpr_handle_t cmpr, const ana_cmpr_internal_ref_config_t *ref_cfg)
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{
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ANA_CMPR_NULL_POINTER_CHECK_ISR(cmpr);
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ANA_CMPR_NULL_POINTER_CHECK_ISR(ref_cfg);
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2023-03-06 23:09:07 -05:00
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ESP_RETURN_ON_FALSE_ISR(cmpr->ref_src == ANA_CMPR_REF_SRC_INTERNAL, ESP_ERR_INVALID_STATE,
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TAG, "the reference channel is not internal, no need to configure internal reference");
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2023-03-01 06:50:45 -05:00
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/* Set internal reference voltage */
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2023-03-06 23:09:07 -05:00
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portENTER_CRITICAL_SAFE(&s_spinlock);
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2023-03-01 06:50:45 -05:00
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analog_cmpr_ll_set_internal_ref_voltage(cmpr->dev, ref_cfg->ref_volt);
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2023-03-06 23:09:07 -05:00
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portEXIT_CRITICAL_SAFE(&s_spinlock);
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2023-03-01 06:50:45 -05:00
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ESP_EARLY_LOGD(TAG, "unit %d internal voltage level %"PRIu32, (int)cmpr->unit, ref_cfg->ref_volt);
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return ESP_OK;
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}
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esp_err_t ana_cmpr_set_debounce(ana_cmpr_handle_t cmpr, const ana_cmpr_debounce_config_t *dbc_cfg)
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{
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ANA_CMPR_NULL_POINTER_CHECK_ISR(cmpr);
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ANA_CMPR_NULL_POINTER_CHECK_ISR(dbc_cfg);
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/* Transfer the time to clock cycles */
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2023-03-13 00:34:53 -04:00
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uint32_t wait_cycle = (uint32_t)(dbc_cfg->wait_us * (cmpr->src_clk_freq_hz / 1000000));
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2023-03-01 06:50:45 -05:00
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/* Set the waiting clock cycles */
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2023-03-06 23:09:07 -05:00
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portENTER_CRITICAL_SAFE(&s_spinlock);
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2023-03-01 06:50:45 -05:00
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analog_cmpr_ll_set_debounce_cycle(cmpr->dev, wait_cycle);
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2023-03-06 23:09:07 -05:00
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portEXIT_CRITICAL_SAFE(&s_spinlock);
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2023-03-01 06:50:45 -05:00
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ESP_EARLY_LOGD(TAG, "unit %d debounce wait cycle %"PRIu32, (int)cmpr->unit, wait_cycle);
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return ESP_OK;
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}
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2023-03-13 00:34:53 -04:00
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esp_err_t ana_cmpr_set_cross_type(ana_cmpr_handle_t cmpr, ana_cmpr_cross_type_t cross_type)
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{
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2023-07-30 22:43:54 -04:00
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#if SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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/* Not support to set the cross type after initialized, because it relies on the interrupt types to distinguish the edge,
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* i.e. have to re-allocate the interrupt to change the cross type */
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(void)cmpr;
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(void)cross_type;
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return ESP_ERR_NOT_SUPPORTED;
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#else
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2023-03-13 00:34:53 -04:00
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ANA_CMPR_NULL_POINTER_CHECK_ISR(cmpr);
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ESP_RETURN_ON_FALSE_ISR(cross_type >= ANA_CMPR_CROSS_DISABLE && cross_type <= ANA_CMPR_CROSS_ANY,
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ESP_ERR_INVALID_ARG, TAG, "invalid cross type");
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portENTER_CRITICAL_SAFE(&s_spinlock);
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2023-07-30 22:43:54 -04:00
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#if !SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
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2023-03-13 00:34:53 -04:00
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analog_cmpr_ll_set_cross_type(cmpr->dev, cross_type);
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2023-07-18 08:08:22 -04:00
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#endif
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cmpr->intr_mask = analog_cmpr_ll_get_intr_mask_by_type(cmpr->dev, cross_type);
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2023-03-13 00:34:53 -04:00
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portEXIT_CRITICAL_SAFE(&s_spinlock);
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ESP_EARLY_LOGD(TAG, "unit %d cross type updated to %d", (int)cmpr->unit, cross_type);
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return ESP_OK;
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2023-07-30 22:43:54 -04:00
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#endif
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2023-03-13 00:34:53 -04:00
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}
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2023-03-01 06:50:45 -05:00
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esp_err_t ana_cmpr_register_event_callbacks(ana_cmpr_handle_t cmpr, const ana_cmpr_event_callbacks_t *cbs, void *user_data)
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{
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ANA_CMPR_NULL_POINTER_CHECK(cmpr);
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ANA_CMPR_NULL_POINTER_CHECK(cbs);
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ESP_RETURN_ON_FALSE(!cmpr->is_enabled, ESP_ERR_INVALID_STATE, TAG,
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"please disable the analog comparator before registering the callbacks");
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2023-03-06 23:09:07 -05:00
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#if CONFIG_ANA_CMPR_ISR_IRAM_SAFE
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if (cbs->on_cross) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_cross), ESP_ERR_INVALID_ARG, TAG,
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2023-03-13 00:34:53 -04:00
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"ANA_CMPR_ISR_IRAM_SAFE enabled but the callback function is not in IRAM");
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}
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if (user_data) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(user_data), ESP_ERR_INVALID_ARG, TAG,
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"ANA_CMPR_ISR_IRAM_SAFE enabled but the user_data is not in IRAM");
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2023-03-06 23:09:07 -05:00
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}
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#endif
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2023-03-01 06:50:45 -05:00
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2023-07-30 22:43:54 -04:00
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/* Allocate the interrupt, the interrupt source of Analog Comparator is shared with GPIO interrupt source on ESP32H2 */
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if (!cmpr->intr_handle) {
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int intr_flags = ANA_CMPR_INTR_FLAG | (cmpr->intr_priority ? BIT(cmpr->intr_priority) : ESP_INTR_FLAG_LOWMED);
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#if SOC_ANA_CMPR_INTR_SHARE_WITH_GPIO
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intr_flags |= ESP_INTR_FLAG_SHARED;
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#endif // SOC_ANA_CMPR_INTR_SHARE_WITH_GPIO
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ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(ana_cmpr_periph[cmpr->unit].intr_src, intr_flags, (uint32_t)analog_cmpr_ll_get_intr_status_reg(cmpr->dev),
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2023-11-09 03:54:18 -05:00
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cmpr->intr_mask, s_ana_cmpr_default_intr_handler, cmpr, &cmpr->intr_handle), TAG, "allocate interrupt failed");
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2023-07-30 22:43:54 -04:00
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}
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2023-03-01 06:50:45 -05:00
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/* Save the callback group */
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memcpy(&(cmpr->cbs), cbs, sizeof(ana_cmpr_event_callbacks_t));
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cmpr->user_data = user_data;
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ESP_LOGD(TAG, "unit %d event callback registered", (int)cmpr->unit);
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return ESP_OK;
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}
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esp_err_t ana_cmpr_enable(ana_cmpr_handle_t cmpr)
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{
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ANA_CMPR_NULL_POINTER_CHECK(cmpr);
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ESP_RETURN_ON_FALSE(!cmpr->is_enabled, ESP_ERR_INVALID_STATE, TAG,
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"the analog comparator has enabled already");
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/* Update the driver status */
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cmpr->is_enabled = true;
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/* Acquire the pm lock if the unit has, to avoid the system start light sleep while Analog comparator still working */
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if (cmpr->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(cmpr->pm_lock), TAG, "acquire pm_lock failed");
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}
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/* Enable the Analog Comparator */
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portENTER_CRITICAL(&s_spinlock);
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2023-07-18 08:08:22 -04:00
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analog_cmpr_ll_enable_intr(cmpr->dev, cmpr->intr_mask, true);
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2023-03-01 06:50:45 -05:00
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analog_cmpr_ll_enable(cmpr->dev, true);
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portEXIT_CRITICAL(&s_spinlock);
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ESP_LOGD(TAG, "unit %d enabled", (int)cmpr->unit);
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return ESP_OK;
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}
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esp_err_t ana_cmpr_disable(ana_cmpr_handle_t cmpr)
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{
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ANA_CMPR_NULL_POINTER_CHECK(cmpr);
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ESP_RETURN_ON_FALSE(cmpr->is_enabled, ESP_ERR_INVALID_STATE, TAG,
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"the analog comparator not enabled yet");
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/* Disable the Analog Comparator */
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portENTER_CRITICAL(&s_spinlock);
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2023-07-18 08:08:22 -04:00
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analog_cmpr_ll_enable_intr(cmpr->dev, cmpr->intr_mask, false);
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2023-03-01 06:50:45 -05:00
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analog_cmpr_ll_enable(cmpr->dev, false);
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portEXIT_CRITICAL(&s_spinlock);
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/* Release the pm lock, allow light sleep then */
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if (cmpr->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_release(cmpr->pm_lock), TAG, "release pm_lock failed");
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}
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/* Update the driver status */
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cmpr->is_enabled = false;
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ESP_LOGD(TAG, "unit %d disabled", (int)cmpr->unit);
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return ESP_OK;
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}
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esp_err_t ana_cmpr_get_gpio(ana_cmpr_unit_t unit, ana_cmpr_channel_type_t chan_type, int *gpio_num)
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{
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ANA_CMPR_NULL_POINTER_CHECK(gpio_num);
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ANA_CMPR_UNIT_CHECK(unit);
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/* Get the gpio number according to the channel type */
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switch (chan_type) {
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case ANA_CMPR_SOURCE_CHAN:
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2023-07-30 22:43:54 -04:00
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*gpio_num = ana_cmpr_periph[unit].src_gpio;
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2023-03-01 06:50:45 -05:00
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break;
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case ANA_CMPR_EXT_REF_CHAN:
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2023-07-30 22:43:54 -04:00
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*gpio_num = ana_cmpr_periph[unit].ext_ref_gpio;
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2023-03-01 06:50:45 -05:00
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break;
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default:
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ESP_LOGE(TAG, "invalid channel type");
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return ESP_ERR_INVALID_ARG;
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}
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return ESP_OK;
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}
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2023-07-30 22:43:54 -04:00
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ana_cmpr_unit_t ana_cmpr_priv_get_unit_by_handle(ana_cmpr_handle_t cmpr)
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{
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if (!cmpr) {
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return -1;
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}
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return cmpr->unit;
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}
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